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31. 发明申请

US20070049237A1 Semiconductor integrated circuit device and high frequency power amplifier module 有权
标题翻译：半导体集成电路器件和高频功率放大器模块
公开(公告)号：US20070049237A1
公开(公告)日：2007-03-01
申请号：US11511300
申请日：2006-08-29
申请人： Toshihiro Miura , Hitoshi Akamine , Yasushi Shigeno , Akishige Nakajima , Masahiro Tsuchiya
发明人： Toshihiro Miura , Hitoshi Akamine , Yasushi Shigeno , Akishige Nakajima , Masahiro Tsuchiya
IPC分类号： H04B1/44 , H04B1/28
CPC分类号： H04B1/48
摘要： Switching characteristics in an SPDT switch are improved to reduce the rise delay in a low power slot following after a high power slot. Control terminals of an SPDT switch are respectively provided with backflow prevention circuits. The backflow prevention circuit is configured to have two transistors and a diode. In a transmission mode, for example, when a time slot where a high power passes through transistors is followed by a time slot where a low power passes through, the electric charges accumulated in the gates of the transistors are blocked. In the case where the transistors are in the OFF state, the electric charges accumulated in the gates of the transistors are immediately discharged to allow the transistors to be completely turned OFF.
摘要翻译： SPDT开关中的开关特性得到改善，可以降低高功率插槽后的低功率插槽的上升延时。 SPDT开关的控制端子分别设有防回流电路。防回流电路被配置为具有两个晶体管和二极管。在传输模式中，例如，当高功率通过晶体管的时隙之后是低功率通过的时隙时，积聚在晶体管的栅极中的电荷被阻断。在晶体管处于截止状态的情况下，立即放电晶体管的栅极中累积的电荷，使晶体管完全截止。

32. 发明授权

US07650133B2 Semiconductor integrated circuit device and high frequency power amplifier module 有权
标题翻译：半导体集成电路器件和高频功率放大器模块
公开(公告)号：US07650133B2
公开(公告)日：2010-01-19
申请号：US11511300
申请日：2006-08-29
申请人： Toshihiro Miura , Hitoshi Akamine , Yasushi Shigeno , Akishige Nakajima , Masahiro Tsuchiya
发明人： Toshihiro Miura , Hitoshi Akamine , Yasushi Shigeno , Akishige Nakajima , Masahiro Tsuchiya
IPC分类号： H04B1/16
CPC分类号： H04B1/48
摘要： Switching characteristics in an SPDT switch are improved to reduce the rise delay in a low power slot following after a high power slot. Control terminals of an SPDT switch are respectively provided with backflow prevention circuits. The backflow prevention circuit is configured to have two transistors and a diode. In a transmission mode, for example, when a time slot where a high power passes through transistors is followed by a time slot where a low power passes through, the electric charges accumulated in the gates of the transistors are blocked. In the case where the transistors are in the OFF state, the electric charges accumulated in the gates of the transistors are immediately discharged to allow the transistors to be completely turned OFF.
摘要翻译： SPDT开关中的开关特性得到改善，可以降低高功率插槽后的低功率插槽的上升延时。 SPDT开关的控制端子分别设有防回流电路。防回流电路被配置为具有两个晶体管和二极管。在传输模式中，例如，当高功率通过晶体管的时隙之后是低功率通过的时隙时，积聚在晶体管的栅极中的电荷被阻断。在晶体管处于截止状态的情况下，立即放电晶体管的栅极中累积的电荷，使晶体管完全截止。

33. 发明申请

US20050079829A1 Antenna switch 审中-公开
标题翻译：天线开关
公开(公告)号：US20050079829A1
公开(公告)日：2005-04-14
申请号：US10921815
申请日：2004-08-20
申请人： Takashi Ogawa , Hiroshi Kondoh , Hidenori Suenaga , Akishige Nakajima
发明人： Takashi Ogawa , Hiroshi Kondoh , Hidenori Suenaga , Akishige Nakajima
IPC分类号： H01P1/15 , H04B1/44 , H04B1/48
CPC分类号： H04B1/48
摘要： An antenna switch having a simple configuration and realizing high isolation between transmitting and receiving is provided. The antenna switch has a first switch connected between a transmitting terminal 31 and an antenna terminal 4, a transmission circuit 9 whose one end is connected to the antenna terminal and which shifts a phase of a transmitting signal by 90 degrees at use frequency, a second switch 6 whose one end is connected to the other end of the transmission circuit 9 and whose other end is grounded, and a plurality of third switches 7, 8 connected between the other end of the transmission circuit 9 and the plurality of receiving terminals 32, 33.
摘要翻译：提供具有简单配置并实现发送和接收之间高隔离度的天线开关。天线开关具有连接在发送端子31和天线端子4之间的第一开关，发送电路9的一端连接到天线端子，并且使用频率将发送信号的相位移位90度，第二开关开关6的一端连接到发送电路9的另一端并且另一端接地，以及连接在发送电路9的另一端和多个接收端子32之间的多个第三开关7,8， 33。

34. 发明授权

US5574402A Monolithic integrated circuit device having microwave power amplifier including a matching circuit using distributed lines 失效
标题翻译：具有微波功率放大器的单片集成电路器件包括使用分布线路的匹配电路
公开(公告)号：US5574402A
公开(公告)日：1996-11-12
申请号：US524188
申请日：1995-09-06
申请人： Akishige Nakajima , Tooru Fujioka , Eiichi Hase
发明人： Akishige Nakajima , Tooru Fujioka , Eiichi Hase
IPC分类号： H01L25/16 , H03F3/193 , H03F3/60 , H03F3/195
CPC分类号： H03F3/601 , H01L23/66 , H03F3/1935 , H01L2223/6644 , H01L2223/6683 , H01L2924/0002 , H01L2924/3011 , H03F2200/294 , H03F2200/372
摘要： A microwave multi-stage power amplifier has matching circuits for input and output stages and one or more inter-stage matching circuits. The amplifier and a signal output pad and first and second voltage supply pads are formed at one and the same semi-insulating substrate. A first FET in the output stage has its drain connected to the first voltage supply pad through a first distributed line and further connected to the signal output pad through a second distributed line in which the first and second distributed lines contribute to formation of the matching circuit for the output stage. A second FET in a stage preceding to the output stage has its drain connected to the second voltage supply pad through a third distributed line serving as a connection conductor. The first distributed line has a width larger than that of the third distributed line and has a length which limits an impedance seen at the drain of the output stage FET towards the first voltage supply pad at an operation frequency of the amplifier to a value other than infinity.
摘要翻译：微波多级功率放大器具有用于输入和输出级和一个或多个级间匹配电路的匹配电路。放大器和信号输出焊盘以及第一和第二电压供给焊盘形成在同一半绝缘基板上。输出级中的第一FET通过第一分布线将漏极连接到第一电压焊盘，并通过第二分布线连接到信号输出焊盘，其中第一和第二分布线有助于形成匹配电路用于输出级。在输出级之前的阶段中的第二FET的漏极通过用作连接导体的第三分布线连接到第二电压源焊盘。第一分布线的宽度大于第三分布线的宽度，并且具有将放大器的工作频率处的输出级FET的漏极处的阻抗朝向第一电压源焊盘限制为除了第二分配线以外的值的长度无穷。

35. 发明授权

US07312482B2 Semiconductor device, power amplifier device and PC card 失效
标题翻译：半导体器件，功率放大器和PC卡
公开(公告)号：US07312482B2
公开(公告)日：2007-12-25
申请号：US11541606
申请日：2006-10-03
申请人： Akishige Nakajima , Hidenori Suenaga , Eigo Tange
发明人： Akishige Nakajima , Hidenori Suenaga , Eigo Tange
IPC分类号： H01L29/49
CPC分类号： H01L23/66 , H01L23/3107 , H01L23/49541 , H01L23/5227 , H01L24/48 , H01L24/49 , H01L29/41758 , H01L29/4238 , H01L2223/6644 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/48465 , H01L2224/49171 , H01L2224/49175 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01031 , H01L2924/01042 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/10329 , H01L2924/10336 , H01L2924/1305 , H01L2924/1306 , H01L2924/13063 , H01L2924/13064 , H01L2924/13091 , H01L2924/14 , H01L2924/1423 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/19051 , H01L2924/30105 , H01L2924/30107 , H03F3/601 , H03F2200/294 , H03F2200/372 , H01L2924/00 , H01L2924/20752 , H01L2224/45099
摘要： The present invention is directed to improve high frequency characteristics by reducing inductance of a source. In an HEMT assembled in a power amplifier device, each of a drain electrode, a source electrode, and a gate electrode is constructed by a base portion and a plurality of fingers projected in a comb-teeth shape from the base portion, and the fingers of the electrodes mesh with each other. In the source electrode, a width of the fingers positioned at both ends of the plurality of fingers is wider than a width of each of the fingers positioned between both ends. The width of each of the fingers positioned at both ends is a width equal to or larger than a sum of the widths of the plurality of fingers positioned between both ends, and the width of the base portion is wider than that of each of the fingers positioned at both ends. An electrode pad provided for the source base portion and an external electrode terminal are connected to each other via a conductive wire.
摘要翻译：本发明旨在通过减少源的电感来改善高频特性。在组装在功率放大器装置中的HEMT中，漏电极，源电极和栅电极中的每一个由基部和从基部突出成梳齿形状的多个指状构成，并且手指的电极彼此啮合。在源电极中，位于多个手指的两端的手指的宽度比位于两端之间的每个手指的宽度宽。位于两端的每个手指的宽度是等于或大于位于两端之间的多个手指的宽度之和的宽度，并且基部的宽度比每个手指的宽度宽位于两端。用于源极基部的电极焊盘和外部电极端子经由导线彼此连接。

36. 发明授权

US5548138A Semiconductor device with reduced tunnel resistance and circuitry using the same 失效
标题翻译：具有减小的隧道电阻的半导体器件和使用其的电路
公开(公告)号：US5548138A
公开(公告)日：1996-08-20
申请号：US120818
申请日：1993-09-15
申请人： Takuma Tanimoto , Makoto Kudo , Tomoyoshi Mishima , Akishige Nakajima , Mitsuhiro Mori , Masao Yamane
发明人： Takuma Tanimoto , Makoto Kudo , Tomoyoshi Mishima , Akishige Nakajima , Mitsuhiro Mori , Masao Yamane
IPC分类号： H01L29/205 , H01L21/331 , H01L21/338 , H01L29/68 , H01L29/73 , H01L29/737 , H01L29/778 , H01L29/80 , H01L29/812 , H01L31/0328 , H01L31/0336
CPC分类号： H01L29/7376 , H01L29/802
摘要： In a semiconductor device using tunnel current and a barrier layer, arrangements are provided to lower the resistance of the semiconductor device. In particular, arrangements are provided to lower the parasitic resistance of a device such as a field effect transistor or an HBT, as well as to provide high-performance low noise amplifiers, mixers and the like using such reduced resistance semiconductor devices. To achieve this reduced resistance, carrier concentration or effective mass is designed not to be uniform in at least one of the semiconductor layers holding a barrier layer therebetween. For example, in an area near the barrier layer, the carrier concentration distribution can be large or the effective mass distribution can be small.
摘要翻译：在使用隧道电流和阻挡层的半导体器件中，提供了降低半导体器件的电阻的布置。特别地，提供了降低诸如场效应晶体管或HBT的器件的寄生电阻的布置，以及使用这种降低电阻的半导体器件来提供高性能低噪声放大器，混频器等。为了实现这种降低的电阻，在其间保持阻挡层的至少一个半导体层中设计载流子浓度或有效质量不均匀。例如，在阻挡层附近的区域中，载流子浓度分布可以较大，有效质量分布可以较小。

37. 发明授权

US5514992A Low-distortion cascode circuit 失效
标题翻译：低失真共源共栅电路
公开(公告)号：US5514992A
公开(公告)日：1996-05-07
申请号：US273800
申请日：1994-07-12
申请人： Satoshi Tanaka , Akishige Nakajima , Eiichi Hase , Chushiro Kusano
发明人： Satoshi Tanaka , Akishige Nakajima , Eiichi Hase , Chushiro Kusano
IPC分类号： H03D7/12 , H01L27/095 , H03F1/08 , H03F1/22 , H03B19/00 , H03K3/353
CPC分类号： H03F1/226 , H01L27/095
摘要： An electronic circuit is provided with a first field effect transistor and a second field effect transistor, in which a drain of the first field effect transistor connected to a source of the second field effect transistor. This electronic circuit inputs a first signal to a gate electrode of the first field effect transistor, inputs a second signal to a gate electrode of the second field effect transistor and outputs a signal from a drain of the second field effect transistor. This electronic circuit is a cascode circuit related to the current drivability of the second field effect transistor is set to be larger than the current drivability of the first field effect transistor, and there is an effect that third-order or higher order distortion characteristics of a cascode type or dual-gate circuit can be reduced.
摘要翻译：电子电路设置有第一场效应晶体管和第二场效应晶体管，其中第一场效应晶体管的漏极连接到第二场效应晶体管的源极。该电子电路将第一信号输入到第一场效应晶体管的栅电极，将第二信号输入到第二场效应晶体管的栅极，并输出来自第二场效应晶体管的漏极的信号。该电子电路是与第二场效应晶体管的电流驱动能力相关的共源共栅电路被设定为大于第一场效应晶体管的电流驱动能力，并且具有以下效果：第一场效应晶体管的三阶或更高阶失真特性可以降低共源共栅型或双栅极电路。

38. 发明申请

US20070023897A1 Semiconductor device, power amplifier device and PC card 失效
公开(公告)号：US20070023897A1
公开(公告)日：2007-02-01
申请号：US11541606
申请日：2006-10-03
申请人： Akishige Nakajima , Hidenori Suenaga , Eigo Tange
发明人： Akishige Nakajima , Hidenori Suenaga , Eigo Tange
IPC分类号： H01L23/34
CPC分类号： H01L23/66 , H01L23/3107 , H01L23/49541 , H01L23/5227 , H01L24/48 , H01L24/49 , H01L29/41758 , H01L29/4238 , H01L2223/6644 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/48465 , H01L2224/49171 , H01L2224/49175 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01031 , H01L2924/01042 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/10329 , H01L2924/10336 , H01L2924/1305 , H01L2924/1306 , H01L2924/13063 , H01L2924/13064 , H01L2924/13091 , H01L2924/14 , H01L2924/1423 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/19051 , H01L2924/30105 , H01L2924/30107 , H03F3/601 , H03F2200/294 , H03F2200/372 , H01L2924/00 , H01L2924/20752 , H01L2224/45099
摘要： The present invention is directed to improve high frequency characteristics by reducing inductance of a source. In an HEMT assembled in a power amplifier device, each of a drain electrode, a source electrode, and a gate electrode is constructed by a base portion and a plurality of fingers projected in a comb-teeth shape from the base portion, and the fingers of the electrodes mesh with each other. In the source electrode, a width of the fingers positioned at both ends of the plurality of fingers is wider than a width of each of the fingers positioned between both ends. The width of each of the fingers positioned at both ends is a width equal to or larger than a sum of the widths of the plurality of fingers positioned between both ends, and the width of the base portion is wider than that of each of the fingers positioned at both ends. An electrode pad provided for the source base portion and an external electrode terminal are connected to each other via a conductive wire.

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