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1. 发明授权

US07439622B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07439622B2
公开(公告)日：2008-10-21
申请号：US11581587
申请日：2006-10-17
申请人： Hitoshi Akamine , Masashi Suzuki , Masao Yamane , Tetsuaki Adachi
发明人： Hitoshi Akamine , Masashi Suzuki , Masao Yamane , Tetsuaki Adachi
IPC分类号： H01L23/48 , H01L23/52 , H01R11/00
CPC分类号： H01L27/0207 , H01L23/4824 , H01L23/66 , H01L24/48 , H01L24/49 , H01L25/16 , H01L27/088 , H01L29/0696 , H01L29/1083 , H01L29/4175 , H01L29/41758 , H01L29/4238 , H01L29/7835 , H01L2223/6644 , H01L2223/6688 , H01L2224/05599 , H01L2224/45099 , H01L2224/49111 , H01L2224/85399 , H01L2924/00014 , H01L2924/13091 , H01L2924/19041 , H01L2924/19105 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H03F3/189 , H03F3/211 , H03F3/601 , H03F3/68 , H03F3/72 , H03F2200/294 , H03F2200/372 , H01L2224/45015 , H01L2924/207
摘要： The present invention provides a semiconductor device comprising a semiconductor substrate, and transistors formed on the semiconductor substrate, wherein control electrode terminals constituting external electrode terminals of the transistors, and first electrode terminals which transmit output signals, are provided on a main surface of the semiconductor substrate, wherein the control electrode terminals are provided at least one, and a plurality of the first electrode terminals are arranged on one side and a plurality of the first electrode terminals are arranged on the other side with the control electrode terminals being interposed therebetween, wherein a portion including the control electrode terminals and a plurality of the first electrode terminals located on one side of the control electrode terminals constitute a first transistor portion, and wherein a portion including the control electrode terminals and a plurality of the first electrode terminals located on the other side of the control electrode terminals constitute a second transistor portion. The semiconductor device is quadrangular.
摘要翻译：本发明提供一种半导体器件，包括半导体衬底和形成在半导体衬底上的晶体管，其中构成晶体管的外部电极端子的控制电极端子和传输输出信号的第一电极端子设置在半导体的主表面上基板，其中控制电极端子设置为至少一个，并且多个第一电极端子布置在一侧，并且多个第一电极端子布置在另一侧，其中控制电极端子插入其间，其中包括控制电极端子和位于控制电极端子一侧的多个第一电极端子的部分构成第一晶体管部分，并且其中包括控制电极端子和位于第一晶体管部分上的多个第一电极端子的部分另一边的控制电极端子构成第二晶体管部分。半导体器件是四边形。

2. 发明授权

US07145394B2 High frequency power amplifier module, and wireless communication system 失效
标题翻译：高频功率放大器模块和无线通信系统
公开(公告)号：US07145394B2
公开(公告)日：2006-12-05
申请号：US11098454
申请日：2005-04-05
申请人： Masahito Numanami , Hitoshi Akamine , Tsuyoshi Shibuya , Tetsuaki Adachi , Masatoshi Morikawa , Yasuhiro Nunogawa
发明人： Masahito Numanami , Hitoshi Akamine , Tsuyoshi Shibuya , Tetsuaki Adachi , Masatoshi Morikawa , Yasuhiro Nunogawa
IPC分类号： H03F3/16
CPC分类号： H01L29/7835 , H01L29/1045 , H01L29/4175 , H01L29/7831 , H01L2924/0002 , H03F1/02 , H03F1/223 , H03F3/24 , H03F3/601 , H03F3/72 , H03F2203/7206 , H03G1/007 , H04B2001/045 , H01L2924/00
摘要： A high frequency power amplifier module of a multistage amplifier construction comprising: an input terminal; an output terminal; a control terminal; and a mode switching terminal. The first amplification stage includes a dual gate FET, and a bias voltage according to a signal is applied to the first gate and the second gate of the dual gate FET from the control terminal and the mode switching terminal, and a radio signal from the input terminal is applied to the second gate such as the source of the dual gate FET. In dependence upon the signal from the mode switching terminal, the mode of the high frequency power amplifier module is for the GSM (i.e., for a non-linear amplifying action) and for the EDGE (for a linear amplifying action).
摘要翻译：一种多级放大器结构的高频功率放大器模块，包括：输入端; 输出端子; 一个控制终端; 和模式切换终端。第一放大级包括双栅极FET，并且根据信号的偏置电压从控制端子和模式切换端子施加到双栅极FET的第一栅极和第二栅极，以及来自输入端的无线电信号端子施加到第二栅极，例如双栅极FET的源极。根据来自模式切换端子的信号，高频功率放大器模块的模式用于GSM（即，用于非线性放大动作）和EDGE（用于线性放大动作）。

3. 发明授权

US07050769B2 Electronic apparatus and design method 有权
标题翻译：电子设备及设计方法
公开(公告)号：US07050769B2
公开(公告)日：2006-05-23
申请号：US10170375
申请日：2002-06-14
申请人： Shun Imai , Hitoshi Akamine , Takashi Ito , Satoshi Arai
发明人： Shun Imai , Hitoshi Akamine , Takashi Ito , Satoshi Arai
IPC分类号： H04B1/04
CPC分类号： H04B1/005 , H01L24/73 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/15153 , H01L2924/19105 , H01L2924/30107 , H01L2924/3011 , H04B1/406 , H04B1/48 , H01L2924/00012 , H01L2924/00
摘要： The invention realizes a wireless communication module that is capable of transmitting the fundamental wave with low loss and reducing the double higher harmonic wave level to a desired level or lower as the whole module. The invention provides a front end module to be used for a wireless communication system such as cellular phone in which at least an output power amplifier, a matching circuit, and a low-pass filter are mounted on one insulating substrate and these circuits are connected in the above-mentioned order, wherein the relative phase of the double higher harmonic wave impedance between phases in view of the matching circuit side and the low-pass filter side from the connection point between the matching circuit and the low-pass filter is set in a range of 180 degrees ±90 degrees.
摘要翻译：本发明实现了一种无线通信模块，其能够以低损耗发送基波，并将整个模块的双倍高次谐波水平降低到期望水平或更低。本发明提供一种前端模块，用于无线通信系统，例如蜂窝电话，其中至少一个输出功率放大器，匹配电路和低通滤波器安装在一个绝缘基板上，这些电路连接在上述顺序，其中从匹配电路和低通滤波器之间的连接点考虑到匹配电路侧和低通滤波器侧的相位之间的双重高次谐波阻抗的相对相位设置在范围为180度±90度。

4. 发明申请

US20060066398A1 High frequency power amplifier circuit and electric component for high frequency power amplifier 有权
标题翻译：高频功率放大器电路和高频功率放大器电气元件
公开(公告)号：US20060066398A1
公开(公告)日：2006-03-30
申请号：US11227109
申请日：2005-09-16
申请人： Hitoshi Akamine , Masahiro Tsuchiya , Kyoichi Takahashi , Kazuhiro Koshio
发明人： Hitoshi Akamine , Masahiro Tsuchiya , Kyoichi Takahashi , Kazuhiro Koshio
IPC分类号： H03G3/20
CPC分类号： H03F3/191 , H03F1/30 , H03F1/32 , H03G1/007 , H03G3/004 , H03G3/3047 , H03G2201/103 , H03G2201/206 , H03G2201/307 , H03G2201/40
摘要： In a high frequency power amplifier circuit in which bias voltages are applied to the transistors for amplification by current mirroring, this invention enables preventing waveform distortion near the peak output power level by allowing sufficient idle currents to flow through the transistors for amplification, while enhancing the power efficiency in a low output power region. The power amplifier includes a detection circuit comprising a transistor for detection which receives the AC component of an input signal to the last-stage transistor for amplification at its control terminal, a current mirror circuit which mirrors current flowing through that transistor, and a current-voltage conversion means which converts current flowing in the slave side of the current mirror circuit into a voltage. In the detection circuit, a voltage from a bias circuit for generating the bias voltages for the transistors for amplification is applied to the control terminal of the transistor for detection and output of the detection circuit is applied to the control terminal of the last-stage transistor for amplification.
摘要翻译：在通过电流镜像将偏置电压施加到晶体管以进行放大的高频功率放大器电路中，本发明能够通过允许足够的空闲电流流过晶体管进行放大，从而防止峰值输出功率电平附近的波形失真，同时增强低输出功率区域的功率效率。功率放大器包括检测电路，该检测电路包括用于检测的晶体管，其将用于在其控制端子处放大的最后级晶体管的输入信号的AC分量接收;反射电流流过该晶体管的电流镜电路，电压转换装置，其将在电流镜电路的从侧中流动的电流转换成电压。在检测电路中，用于产生用于放大的晶体管的偏置电压的偏置电路的电压被施加到用于检测的晶体管的控制端，并且检测电路的输出被施加到最后级晶体管的控制端用于扩增。

5. 发明授权

US06919762B2 High frequency power amplifier electric parts and radio telecommunication system 失效
标题翻译：高频功率放大器电器零件和无线电通信系统
公开(公告)号：US06919762B2
公开(公告)日：2005-07-19
申请号：US10722532
申请日：2003-11-28
申请人： Hitoshi Akamine , Kyoichi Takahashi , Masahiro Tsuchiya
发明人： Hitoshi Akamine , Kyoichi Takahashi , Masahiro Tsuchiya
IPC分类号： H03F3/68 , H03F1/02 , H03F1/32 , H03F3/24 , H03G3/30 , H03G5/16
CPC分类号： H03G3/3047 , H03F1/0272 , H03F2200/294 , H03F2200/372
摘要： The present invention provides a high frequency power amplifier of a multi-stage configuration in which a plurality of transistors for power amplification are cascaded, with reduced distortion of a signal in a region where an output power level is low and improved power efficiency. In a high frequency power amplifier electric part in which a plurality of transistors for power amplification are cascaded, a transistor for output level detection is provided whose gate terminal receives a gate input of a transistor for power amplification in the final stage via a resistive element of which resistance value is 100 Ω or less. Current detected by the transistor is converted to voltage. The voltage is compared with output control voltage by an error amplifier. Voltage according to the potential difference is applied to the gate terminals of the transistors for power amplification in the amplification stages to thereby pass idle current.
摘要翻译：本发明提供一种多级配置的高频功率放大器，其中用于功率放大的多个晶体管级联，降低输出功率电平低的区域中的信号失真并提高功率效率。在用于功率放大的多个晶体管级联的高频功率放大器电气部件中，提供用于输出电平检测的晶体管，其栅极端子经由电阻元件的电阻元件在最终级中接收用于功率放大的晶体管的栅极输入该电阻值为100Ω以下。由晶体管检测的电流转换为电压。通过误差放大器将电压与输出控制电压进行比较。根据电位差的电压被施加到放大级中用于功率放大的晶体管的栅极端子，从而使空闲电流通过。

6. 发明申请

US20050134405A1 Electronic device and semiconductor device 审中-公开
标题翻译：电子设备和半导体器件
公开(公告)号：US20050134405A1
公开(公告)日：2005-06-23
申请号：US10999953
申请日：2004-12-01
申请人： Kentaro Ochi , Akira Mishima , Hitoshi Akamine
发明人： Kentaro Ochi , Akira Mishima , Hitoshi Akamine
IPC分类号： H01F17/00 , H01F27/00 , H03H5/02 , H03H7/01
CPC分类号： H03H7/0115 , H01F17/0013 , H01F2017/0026 , H01F2017/0053 , H03H7/1758 , H03H7/1766 , H03H7/38 , H03H7/463 , H03H2001/0085
摘要： This invention improves electric characteristics of electronic devices and semiconductor devices. An electronic device comprising an inductive conductor section 4 forming a coil pattern 3 on each of three primary dielectric substrates 1a which are laminated into a multi-layer part, a capacitive conductor section 6 forming a capacitance pattern 5 on each of two secondary dielectric substrates 1b which are laminated into another multi-layer part, and external connection terminals 9 which are connected to both ends of the inductive conductor section 4 and the capacitive conductor section 6 by means of through-hole wiring 8; wherein the conductor sections 4 and 6 are laminated, each of the capacitive conductor sections 6 forming a capacitance pattern 5 has a slit 10 to shut off a flow of an eddy current from the coil pattern 3 to the conductor section 6, and this configuration can suppress a loss of eddy current and reduction in the Q factor and inductance (L) of the inductive conductor section 4.
摘要翻译：本发明改善了电子器件和半导体器件的电特性。一种电子设备，包括：在层叠在多层部分中的三个一次介质基板1a的每一个上形成线圈图案3的感应导体部分4，在两个二次介质基板中的每一个上形成电容图案5的电容性导体部分6 1b层叠在另一层叠部分中，外部连接端子9通过通孔布线8连接到感应导体部分4和电容性导体部分6的两端; 其中导体部分4和6层压，形成电容图案5的每个电容性导体部分6具有狭缝10，以切断涡流从线圈图案3到导体部分6的流动，并且该构造可以抑制涡电流的损失，并降低感应导体部分4的Q因子和电感（L）。

7. 发明授权

US06617927B2 High frequency power amplifier module, and wireless communications system 失效
公开(公告)号：US06617927B2
公开(公告)日：2003-09-09
申请号：US10122382
申请日：2002-04-16
申请人： Masahito Numanami , Hitoshi Akamine , Tsuyoshi Shibuya , Tetsuaki Adachi , Masatoshi Morikawa , Yasuhiro Nunogawa
发明人： Masahito Numanami , Hitoshi Akamine , Tsuyoshi Shibuya , Tetsuaki Adachi , Masatoshi Morikawa , Yasuhiro Nunogawa
IPC分类号： H03F316
CPC分类号： H01L29/7835 , H01L29/1045 , H01L29/4175 , H01L29/7831 , H01L2924/0002 , H03F1/02 , H03F1/223 , H03F3/24 , H03F3/601 , H03F3/72 , H03F2203/7206 , H03G1/007 , H04B2001/045 , H01L2924/00
摘要： A high frequency power amplifier module of a multistage amplifier construction comprising: an input terminal; an output terminal; a control terminal; and a mode switching terminal. The first amplification stage includes a dual gate FET, and a bias voltage according to a signal is applied to the first gate and the second gate of the dual gate FET from the control terminal and the mode switching terminal, and a radio signal from the input terminal is applied to the second gate such as the source of the dual gate FET. In dependence upon the signal from the mode switching terminal, the mode of the high frequency power amplifier module is for the GSM (i.e., for a non-linear amplifying action) and for the EDGE (for a linear amplifying action).

8. 发明授权

US5075803A Signal discriminating device for VTR having expanded dynamic range 失效
标题翻译：用于具有扩展动态范围的录像机的信号识别装置
公开(公告)号：US5075803A
公开(公告)日：1991-12-24
申请号：US333901
申请日：1989-04-06
申请人： Eiji Moro , Hitoshi Akamine , Hiroyuki Torii , Kuniaki Miura
发明人： Eiji Moro , Hitoshi Akamine , Hiroyuki Torii , Kuniaki Miura
IPC分类号： G11B5/027 , G11B20/02 , G11B20/06 , H04N5/93 , H04N9/79 , H04N9/83
CPC分类号： H04N5/93 , H04N9/7925 , H04N9/832 , H04N9/833
摘要： A magnetic recording and reproducing apparatus having a first recording mode and a second recording mode in which a luminance signal of a video signal is converted into FM luminance signal related to a first carrier frequency and to a second carrier frequency so as to be recorded on a magnetic tape includes a discriminating device or discriminating a recording mode in which an FM luminance signal reproduced from a magnetic tape so as to be supplied to a playback circuit has been recorded. The signal discriminating device includes an automatic gain control (AGC) circuit for absorbing a dispersion of the reproduced signal, a discrimiating circuit having a first band-pass filter and a second band-pass filter for processing an output from the AGC circuit so as to discriminate the first and second modes, a detecting circuut to which the reproduced signal is supplied in a parallel fashion with respect to the AGC circuit such that an amplitude of the signal is detected and is then compared with a predetermined value so as to obtain noise information, and a latch circuit for latching an output from the discriminating circuit such that in response to the noise information from the detecting circuit, a previous value of the outpt from the discriminating circuit is held, thus producing a discrimination output of the discriminating device.
摘要翻译：一种具有第一记录模式和第二记录模式的磁记录和再现装置，其中视频信号的亮度信号被转换成与第一载波频率相关的FM亮度信号和第二载波频率，以便被记录在磁带包括识别装置或识别其中已经记录了从磁带再现以提供给重放电路的FM亮度信号的记录模式。信号识别装置包括用于吸收再现信号的色散的自动增益控制（AGC）电路，具有第一带通滤波器和第二带通滤波器的鉴别电路，用于处理AGC电路的输出，以便鉴别第一和第二模式，检测循环以相对于AGC电路的并行方式提供再现信号，使得检测信号的幅度，然后将其与预定值进行比较，以获得噪声信息以及用于锁存来自识别电路的输出的锁存电路，使得响应于来自检测电路的噪声信息，保持来自鉴别电路的前导的先前值，从而产生识别装置的鉴别输出。

9. 发明授权

US07650133B2 Semiconductor integrated circuit device and high frequency power amplifier module 有权
标题翻译：半导体集成电路器件和高频功率放大器模块
公开(公告)号：US07650133B2
公开(公告)日：2010-01-19
申请号：US11511300
申请日：2006-08-29
申请人： Toshihiro Miura , Hitoshi Akamine , Yasushi Shigeno , Akishige Nakajima , Masahiro Tsuchiya
发明人： Toshihiro Miura , Hitoshi Akamine , Yasushi Shigeno , Akishige Nakajima , Masahiro Tsuchiya
IPC分类号： H04B1/16
CPC分类号： H04B1/48
摘要： Switching characteristics in an SPDT switch are improved to reduce the rise delay in a low power slot following after a high power slot. Control terminals of an SPDT switch are respectively provided with backflow prevention circuits. The backflow prevention circuit is configured to have two transistors and a diode. In a transmission mode, for example, when a time slot where a high power passes through transistors is followed by a time slot where a low power passes through, the electric charges accumulated in the gates of the transistors are blocked. In the case where the transistors are in the OFF state, the electric charges accumulated in the gates of the transistors are immediately discharged to allow the transistors to be completely turned OFF.
摘要翻译： SPDT开关中的开关特性得到改善，可以降低高功率插槽后的低功率插槽的上升延时。 SPDT开关的控制端子分别设有防回流电路。防回流电路被配置为具有两个晶体管和二极管。在传输模式中，例如，当高功率通过晶体管的时隙之后是低功率通过的时隙时，积聚在晶体管的栅极中的电荷被阻断。在晶体管处于截止状态的情况下，立即放电晶体管的栅极中累积的电荷，使晶体管完全截止。

10. 发明申请

US20090008774A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20090008774A1
公开(公告)日：2009-01-08
申请号：US12203851
申请日：2008-09-03
申请人： HITOSHI AKAMINE , Masashi Suzuki , Masao Yamane , Tetsuaki Adachi
发明人： HITOSHI AKAMINE , Masashi Suzuki , Masao Yamane , Tetsuaki Adachi
IPC分类号： H01L23/48 , H03F3/16
CPC分类号： H01L27/0207 , H01L23/4824 , H01L23/66 , H01L24/48 , H01L24/49 , H01L25/16 , H01L27/088 , H01L29/0696 , H01L29/1083 , H01L29/4175 , H01L29/41758 , H01L29/4238 , H01L29/7835 , H01L2223/6644 , H01L2223/6688 , H01L2224/05599 , H01L2224/45099 , H01L2224/49111 , H01L2224/85399 , H01L2924/00014 , H01L2924/13091 , H01L2924/19041 , H01L2924/19105 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H03F3/189 , H03F3/211 , H03F3/601 , H03F3/68 , H03F3/72 , H03F2200/294 , H03F2200/372 , H01L2224/45015 , H01L2924/207
摘要： The present invention provides a semiconductor device comprising a semiconductor substrate, and transistors formed on the semiconductor substrate, wherein control electrode terminals constituting external electrode terminals of the transistors, and first electrode terminals which transmit output signals, are provided on a main surface of the semiconductor substrate, wherein the control electrode terminals are provided at least one, and a plurality of the first electrode terminals are arranged on one side and a plurality of the first electrode terminals are arranged on the other side with the control electrode terminals being interposed therebetween, wherein a portion including the control electrode terminals and a plurality of the first electrode terminals located on one side of the control electrode terminals constitute a first transistor portion, and wherein a portion including the control electrode terminals and a plurality of the first electrode terminals located on the other side of the control electrode terminals constitute a second transistor portion. The semiconductor device is quadrangular.
摘要翻译：本发明提供一种半导体器件，包括半导体衬底和形成在半导体衬底上的晶体管，其中构成晶体管的外部电极端子的控制电极端子和传输输出信号的第一电极端子设置在半导体的主表面上基板，其中控制电极端子设置为至少一个，并且多个第一电极端子布置在一侧，并且多个第一电极端子布置在另一侧，其中控制电极端子插入其间，其中包括控制电极端子和位于控制电极端子一侧的多个第一电极端子的部分构成第一晶体管部分，并且其中包括控制电极端子和位于第一晶体管部分上的多个第一电极端子的部分另一边的控制电极端子构成第二晶体管部分。半导体器件是四边形。

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