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31. 发明授权

US06890816B2 Compound semiconductor structure including an epitaxial perovskite layer and method for fabricating semiconductor structures and devices 失效
标题翻译：包括外延钙钛矿层的化合物半导体结构和用于制造半导体结构和器件的方法
公开(公告)号：US06890816B2
公开(公告)日：2005-05-10
申请号：US10359879
申请日：2003-02-07
申请人： Yong Liang , Ravindranath Droopad
发明人： Yong Liang , Ravindranath Droopad
IPC分类号： C30B25/18 , H01L21/316 , H01L21/8242 , C30B11/00 , C30B23/00 , C23C16/00 , C23C14/00
CPC分类号： H01L21/02197 , C30B25/18 , H01L21/31691 , Y10S438/938
摘要： High quality epitaxial layers of monocrystalline perovskite materials (18) can be grown overlying monocrystalline substrates (12) such as gallium arsenide wafers by forming a metal template layer (16) on the monocrystalline substrate. The structure includes a metal-containing layer (16) to mitigate unwanted oxidation of underlying layers and a low-temperature seed layer (19) that prevents degradation of an epitaxial layer (14) during growth of the perovskite layer (18).
摘要翻译：通过在单晶衬底上形成金属模板层（16），可以将单晶钙钛矿材料（18）的高质量外延层生长在叠加的单晶衬底（12）如砷化镓晶片上。该结构包括用于减轻下层的不希望氧化的含金属层（16）和防止在钙钛矿层（18）生长期间外延层（14）退化的低温晶种层（19）。

32. 发明申请

US20050023622A1 Semiconductor device and method 有权
标题翻译：半导体器件及方法
公开(公告)号：US20050023622A1
公开(公告)日：2005-02-03
申请号：US10845523
申请日：2004-05-14
申请人： Kurt Eisenbeiser , Jun Wang , Ravindranath Droopad
发明人： Kurt Eisenbeiser , Jun Wang , Ravindranath Droopad
IPC分类号： H01L29/78 , H01L21/28 , H01L29/51 , H01L29/76 , H01L21/8238
CPC分类号： H01L21/28194 , H01L21/28202 , H01L29/513 , H01L29/517 , H01L29/518
摘要： Circuit (10) has a dual layer gate dielectric (29) formed over a semiconductor substrate (14). The gate dielectric includes an amorphous layer (40) and a monocrystalline layer (42). The monocrystalline layer typically has a higher dielectric constant than the amorphous layer.
摘要翻译：电路（10）具有形成在半导体衬底（14）上的双层栅极电介质（29）。栅极电介质包括非晶层（40）和单晶层（42）。单晶层通常具有比非晶层更高的介电常数。

33. 发明授权

US06555946B1 Acoustic wave device and process for forming the same 失效
标题翻译：声波装置及其形成方法
公开(公告)号：US06555946B1
公开(公告)日：2003-04-29
申请号：US09624803
申请日：2000-07-24
申请人： Jeffrey M. Finder , Kurt Eisenbeiser , Jamal Ramdani , Ravindranath Droopad , William Jay Ooms
发明人： Jeffrey M. Finder , Kurt Eisenbeiser , Jamal Ramdani , Ravindranath Droopad , William Jay Ooms
IPC分类号： H01L4108
CPC分类号： H03H9/174 , H01L27/20 , H01L41/319 , H03H3/02 , H03H3/08 , H03H9/02574 , H03H9/0542
摘要： High quality epitaxial layers of piezoelectric material materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.
摘要翻译：通过首先在硅晶片上生长一个容纳缓冲层，可以将高质量的压电材料外延层生长在大的硅晶片上。容纳缓冲层是通过氧化硅的非晶界面层与硅晶片间隔开的单晶氧化物层。非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。

34. 发明授权

US06472276B1 Using silicate layers for composite semiconductor 有权
标题翻译：使用硅酸盐层用于复合半导体结构
公开(公告)号：US06472276B1
公开(公告)日：2002-10-29
申请号：US09908902
申请日：2001-07-20
申请人： Lyndee L. Hilt , Ravindranath Droopad
发明人： Lyndee L. Hilt , Ravindranath Droopad
IPC分类号： H01L21336
CPC分类号： H01S5/0206 , C30B25/18 , H01L21/02381 , H01L21/02488 , H01L21/02505 , H01L21/02513 , H01L21/02543 , H01L21/02546 , H01L21/02557 , H01L21/0256 , H01L21/02694 , H01L21/31691 , H01L33/005 , H01S5/0208 , H01S5/021 , H01S5/0212 , H01S5/0261 , H01S5/183
摘要： A composite semiconductor including silicon and compound semiconductor, and having a silicate layer for promoting layer-by-layer monocrystalline growth. Silicon may be introduced to react with the monocrystalline oxide layer to form the silicate layer. During the fabrication process, the thickness of the amorphous oxide layer may be increased by suitable methods, such as annealing or oxygen diffusion.
摘要翻译：包括硅和化合物半导体的复合半导体，并且具有用于促进逐层单晶生长的硅酸盐层。可以引入硅以与单晶氧化物层反应以形成硅酸盐层。在制造过程中，非晶氧化物层的厚度可以通过合适的方法如退火或氧气扩散来增加。

35. 发明授权

US06392257B1 Semiconductor structure, semiconductor device, communicating device, integrated circuit, and process for fabricating the same 有权
标题翻译：半导体结构，半导体器件，通信设备，集成电路及其制造方法
公开(公告)号：US06392257B1
公开(公告)日：2002-05-21
申请号：US09502023
申请日：2000-02-10
申请人： Jamal Ramdani , Ravindranath Droopad , Lyndee L. Hilt , Kurt William Eisenbeiser
发明人： Jamal Ramdani , Ravindranath Droopad , Lyndee L. Hilt , Kurt William Eisenbeiser
IPC分类号： H01L2904
CPC分类号： H01S5/0261 , C30B25/18 , H01L21/02381 , H01L21/02433 , H01L21/02439 , H01L21/02472 , H01L21/02488 , H01L21/02505 , H01L21/02507 , H01L21/02513 , H01L21/02521 , H01L21/02543 , H01L21/02546 , H01L21/02557 , H01L21/0256 , H01L21/31691 , H01L21/8252 , H01L21/8258 , H01L27/0605 , H01L27/15 , H01L33/16 , H01L33/30 , H01L2924/0002 , H01S5/021 , H01L2924/00
摘要： High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline compound semiconductor layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.
摘要翻译：通过首先在硅晶片上生长容纳缓冲层，可以将复合半导体材料的高质量外延层生长在大的硅晶片上。容纳缓冲层是通过氧化硅的非晶界面层与硅晶片间隔开的单晶氧化物层。非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。容纳缓冲层与下面的硅晶片和上覆的单晶化合物半导体层晶格匹配。通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。

36. 发明授权

US06224669B1 Method for fabricating a semiconductor structure having a crystalline alkaline earth metal oxide interface with silicon 有权
标题翻译：制造具有与硅结晶的碱土金属氧化物界面的半导体结构的方法
公开(公告)号：US06224669B1
公开(公告)日：2001-05-01
申请号：US09662390
申请日：2000-09-14
申请人： Zhiyi Yi , Ravindranath Droopad , Corey Daniel Overgaard , Jamal Ramdani , Jay A. Curless , Jerald A. Hallmark , William J. Ooms , Jun Wang
发明人： Zhiyi Yi , Ravindranath Droopad , Corey Daniel Overgaard , Jamal Ramdani , Jay A. Curless , Jerald A. Hallmark , William J. Ooms , Jun Wang
IPC分类号： C03B2514
CPC分类号： H01L21/31691 , C30B23/02 , C30B25/02 , C30B29/16 , H01L21/31604 , H01L28/56
摘要： A method for fabricating a semiconductor structure comprises the steps of providing a silicon substrate (10) having a surface (12); forming on the surface of the silicon substrate an interface (14) comprising a single atomic layer of silicon, oxygen, and a metal; and forming one or more layers of a single crystal oxide (26) on the interface. The interface comprises an atomic layer of silicon, oxygen, and a metal in the form XSiO2, where X is a metal.
摘要翻译：一种制造半导体结构的方法包括以下步骤：提供具有表面（12）的硅衬底（10）; 在所述硅衬底的表面上形成包含硅，氧和金属的单原子层的界面（14）; 以及在界面上形成一层或多层单晶氧化物（26）。该界面包括硅，氧和XSiO 2形式的金属的原子层，其中X是金属。

37. 发明授权

US07692224B2 MOSFET structure and method of manufacture 有权
标题翻译： MOSFET结构及制造方法
公开(公告)号：US07692224B2
公开(公告)日：2010-04-06
申请号：US11864274
申请日：2007-09-28
申请人： Ravindranath Droopad , Matthias Passlack
发明人： Ravindranath Droopad , Matthias Passlack
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L21/28264 , H01L29/517
摘要： A method of forming a portion (10) of a compound semiconductor MOSFET structure comprises forming a compound semiconductor layer structure (14) and an oxide layer (20) overlying the same. Forming the compound semiconductor structure (14) includes forming at least one channel material (16) and a group-III rich surface termination layer (18) overlying the at least one channel material. Forming the oxide layer (20) includes forming the oxide layer to overlie the group-III rich surface termination layer and comprises one of (a) depositing essentially congruently evaporating oxide of at least one of (a(i)) a ternary oxide and (a(ii)) an oxide more complex than a ternary oxide and (b) depositing oxide molecules, with use of at least one of (b(i)) a ternary oxide and (b(ii)) an oxide more complex than a ternary oxide.
摘要翻译：形成化合物半导体MOSFET结构的部分（10）的方法包括：形成化合物半导体层结构（14）和覆盖其上的氧化物层（20）。形成化合物半导体结构（14）包括形成至少一个沟道材料（16）和覆盖至少一个沟道材料的III族富集表面终止层（18）。形成氧化物层（20）包括形成氧化物层以覆盖III族富集表面终止层，并且包括（a）基本上一致地沉积（a（i））三元氧化物和（（ii））比三元氧化物更复杂的氧化物和（b）使用（b（i））三元氧化物和（b（ii））中的至少一种沉积氧化物分子，其比三元氧化物。

38. 发明申请

US20100025729A1 PASSIVATED III-V FIELD EFFECT STRUCTURE AND METHOD 有权
标题翻译：被动III-V场效应结构与方法
公开(公告)号：US20100025729A1
公开(公告)日：2010-02-04
申请号：US12182349
申请日：2008-07-30
申请人： Jonathan K. Abrokwah , Ravindranath Droopad , Matthias Passlack
发明人： Jonathan K. Abrokwah , Ravindranath Droopad , Matthias Passlack
IPC分类号： H01L29/778 , H01L21/336
CPC分类号： H01L29/7783 , H01L23/3192 , H01L29/207 , H01L29/513 , H01L2924/0002 , H01L2924/12044 , H01L2924/13091 , H01L2924/00
摘要： An improved insulated gate field effect device (60) is obtained by providing a substrate (20) desirably comprising a III-V semiconductor, having a further semiconductor layer (22) on the substrate (20) adapted to contain the channel (230) of the device (60) between spaced apart source-drain electrodes (421, 422) formed on the semiconductor layer (22). A dielectric layer (24) is formed on the semiconductor layer (22). A sealing layer (28) is formed on the dielectric layer (24) and exposed to an oxygen plasma (36). A gate electrode (482) is formed on the dielectric layer (24) between the source-drain electrodes (421, 422). The dielectric layer (24) preferably comprises gallium-oxide (25) and/or gadolinium-gallium oxide (26, 27), and the oxygen plasma (36) is preferably an inductively coupled plasma. A further sealing layer (44) of, for example, silicon nitride is desirably provided above the sealing layer (28). Surface states and gate dielectric traps that otherwise adversely affect leakage and channel sheet resistance are much reduced.
摘要翻译：通过提供期望地包括III-V半导体的衬底（20）来获得改进的绝缘栅场效应器件（60），所述衬底（20）在所述衬底（20）上具有另外的半导体层（22），所述半导体层适于容纳所述沟道（230）所述器件（60）形成在所述半导体层（22）上形成的间隔开的源 - 漏电极（421,422）之间。在半导体层（22）上形成介电层（24）。密封层（28）形成在电介质层（24）上并暴露于氧等离子体（36）。在源漏电极（421,422）之间的电介质层（24）上形成栅电极（482）。电介质层（24）优选包含氧化镓（25）和/或氧化钆 - 氧化镓（26,27），氧等离子体（36）优选为电感耦合等离子体。期望地在密封层（28）的上方设置例如氮化硅的另外的密封层（44）。否则对泄漏和通道薄层电阻有不利影响的表面状态和栅极电介质阱将大大减少。

39. 发明申请

US20080102607A1 III-V COMPOUND SEMICONDUCTOR DEVICE WITH A SURFACE LAYER IN ACCESS REGIONS HAVING CHARGE OF POLARITY OPPOSITE TO CHANNEL CHARGE AND METHOD OF MAKING THE SAME 有权
标题翻译：具有带有极性对准电荷的通道区域中具有表面层的III-V族化合物半导体器件及其制造方法
公开(公告)号：US20080102607A1
公开(公告)日：2008-05-01
申请号：US11554859
申请日：2006-10-31
申请人： Matthias Passlack , Ravindranath Droopad , Karthik Rajagopalan
发明人： Matthias Passlack , Ravindranath Droopad , Karthik Rajagopalan
IPC分类号： H01L21/20
CPC分类号： H01L29/66924 , H01L29/2003
摘要： A method of forming a III-V compound semiconductor structure (10) comprises providing a III-V compound semiconductor substrate including a semi-insulating substrate (12) having at least one epitaxial layer formed thereon and further having a gate insulator (14) overlying the at least one epitaxial layer. The at least one epitaxial layer formed on the semi-insulating substrate comprises an epi-structure suitable for use in the formation of a channel of a III-V compound semiconductor MOSFET device, wherein the channel (30) having a first polarity. The method further comprises forming a charge layer (22) at a surface of the gate insulator, the charge layer having a second polarity, wherein the second polarity is opposite to the first polarity.
摘要翻译：一种形成III-V族化合物半导体结构（10）的方法包括：提供一种III-V族化合物半导体衬底，该III-V族化合物半导体衬底包括半导体衬底（12），该半绝缘衬底具有形成在其上的至少一个外延层，并且还具有覆盖所述至少一个外延层。形成在半绝缘衬底上的至少一个外延层包括适于用于形成III-V族化合物半导体MOSFET器件的沟道的外延结构，其中，具有第一极性的沟道（30）。该方法还包括在栅极绝缘体的表面形成电荷层（22），电荷层具有第二极性，其中第二极性与第一极性相反。

40. 发明申请

US20070148879A1 III-V compound semiconductor heterostructure MOSFET with a high workfunction metal gate electrode and process of making the same 审中-公开
标题翻译：具有高功函数金属栅电极的III-V化合物半导体异质结构MOSFET及其制造方法
公开(公告)号：US20070148879A1
公开(公告)日：2007-06-28
申请号：US11315732
申请日：2005-12-22
申请人： Matthias Passlack , Ravindranath Droopad
发明人： Matthias Passlack , Ravindranath Droopad
IPC分类号： H01L21/336
CPC分类号： H01L29/4966 , H01L21/28264 , H01L29/66522
摘要： A method of forming a metal-insulator-compound semiconductor structure comprises providing an insulator layer overlying a compound semiconductor substrate, the insulator layer having a surface, and forming a metal layer on the surface of the insulator layer using metal organic chemical vapor deposition.
摘要翻译：形成金属 - 绝缘体 - 化合物半导体结构的方法包括提供覆盖化合物半导体衬底的绝缘体层，所述绝缘体层具有表面，并且使用金属有机化学气相沉积在绝缘体层的表面上形成金属层。

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