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31. 发明授权

US09188876B2 Method of determining overlay error and control system for dynamic control of reticle position 有权
标题翻译：确定掩模位置动态控制的重叠误差和控制系统的方法
公开(公告)号：US09188876B2
公开(公告)日：2015-11-17
申请号：US13368085
申请日：2012-02-07
申请人： Yung-Yao Lee , Sophia Wang , Fei-Gwo Tsai , Heng-Hsin Liu
发明人： Yung-Yao Lee , Sophia Wang , Fei-Gwo Tsai , Heng-Hsin Liu
IPC分类号： G03B27/68 , G03B27/32 , G03F7/20 , G03F1/44 , G03B27/42
CPC分类号： G03F7/70633 , G03F1/44
摘要： A method of determining overlay error. The method includes transferring a pattern from a reticle to a wafer and selecting a first set of data points to measure the positional difference between features on the reticle and features on the wafer. The method also includes determining a second set of data points characteristic of the first set of data points but containing fewer data points. A control system for using the second set of data points to dynamically adjust the position of the reticle.
摘要翻译：确定重叠错误的方法。该方法包括将图案从掩模版转移到晶片并选择第一组数据点以测量掩模版上的特征与晶片上的特征之间的位置差异。该方法还包括确定第一组数据点的特征的第二组数据点，但是包含较少的数据点。一种用于使用第二组数据点的控制系统来动态地调整光罩的位置。

32. 发明授权

US09081297B2 Lithography apparatus having dual reticle edge masking assemblies and method of use 有权
标题翻译：具有双重掩模版边缘掩蔽组件的光刻设备及其使用方法
公开(公告)号：US09081297B2
公开(公告)日：2015-07-14
申请号：US13461500
申请日：2012-05-01
申请人： Tung-Li Wu , Chin-Hsiang Lin , Heng-Hsin Liu , Jui-Chun Peng
发明人： Tung-Li Wu , Chin-Hsiang Lin , Heng-Hsin Liu , Jui-Chun Peng
IPC分类号： G03B27/54 , G03B27/42 , G03F7/20
CPC分类号： G03F7/70725 , G03F7/70066 , G03F7/70283 , G03F7/70341 , G03F7/70641
摘要： A lithography apparatus includes at least two reticle edge masking assemblies (REMAs). The lithography apparatus further includes a light source configured to emit a light beam having a wavelength and a beam separating element configured to divide the light beam into more than one collimated light beam. Each REMA is positioned to receive one of the more than one collimating light beams and each REMA comprises a movable slit for passing the one collimated light beam therethrough. The lithography apparatus further includes at least one mask having a pattern, where the at least one mask is configured to receive light from at least one of the REMA and a projection lens configured to receive light from the at least one mask. A method of using a lithography apparatus is also discussed.
摘要翻译：光刻设备包括至少两个掩模版边缘掩蔽组件（REMA）。光刻设备还包括被配置为发射具有波长的光束的光源和被配置为将光束分成多于一个准直光束的光束分离元件。每个REMA被定位成接收多于一个准直光束中的一个，并且每个REMA包括用于使一个准直光束通过的可移动狭缝。光刻设备还包括具有图案的至少一个掩模，其中所述至少一个掩模被配置为接收来自REMA和配置为接收来自所述至少一个掩模的光的投影透镜中的至少一个的光。还讨论了使用光刻设备的方法。

33. 发明授权

US08703368B2 Lithography process 有权
标题翻译：平版印刷工艺
公开(公告)号：US08703368B2
公开(公告)日：2014-04-22
申请号：US13550036
申请日：2012-07-16
申请人： Yung-Yao Lee , Ying Ying Wang , Heng-Hsin Liu , Chin-Hsiang Lin
发明人： Yung-Yao Lee , Ying Ying Wang , Heng-Hsin Liu , Chin-Hsiang Lin
IPC分类号： G03F9/00
CPC分类号： G03F7/70633
摘要： A process for use in lithography, such as photolithography for patterning a semiconductor wafer, is disclosed. The process includes receiving an incoming semiconductor wafer having various features and layers formed thereon. A unit-induced overlay (uniiOVL) correction is received and a deformation measurement is performed on the incoming semiconductor wafer in an overlay module. A deformation-induced overlay (defiOVL) correction is generated from the deformation measurement results by employing a predetermined algorithm on the deformation measurement results. The defiOVL and uniiOVL corrections are fed-forward to an exposure module and an exposure process is performed on the incoming semiconductor wafer.
摘要翻译：公开了一种用于光刻的方法，例如用于图案化半导体晶片的光刻技术。该方法包括接收具有形成在其上的各种特征和层的输入半导体晶片。接收单元引起的覆盖（uniOVL）校正，并且在覆盖模块中对输入的半导体晶片进行变形测量。通过对变形测量结果采用预定的算法，从变形测量结果生成变形诱导的覆盖（defiOVL）校正。 defiVV和unioVL校正被反馈到曝光模块，并且对输入的半导体晶片进行曝光处理。

34. 发明申请

US20130285264A1 WAFER ASSEMBLY WITH CARRIER WAFER 有权
标题翻译：带载波的WAFER装配
公开(公告)号：US20130285264A1
公开(公告)日：2013-10-31
申请号：US13539243
申请日：2012-06-29
申请人： I-Hsiung HUANG , Heng-Hsin LIU , Heng-Jen LEE , Chin-Hsiang LIN
发明人： I-Hsiung HUANG , Heng-Hsin LIU , Heng-Jen LEE , Chin-Hsiang LIN
IPC分类号： H01L23/544 , H01L21/02
CPC分类号： H01L21/0201 , H01L21/6835 , H01L2221/6834 , H01L2221/68381
摘要： A wafer assembly includes a process wafer and a carrier wafer. Integrated circuits are formed on the process wafer. The carrier wafer is bonded to the process wafer. The carrier wafer has at least one alignment mark.
摘要翻译：晶片组件包括处理晶片和载体晶片。集成电路形成在处理晶片上。载体晶片结合到工艺晶片。载体晶片具有至少一个对准标记。

35. 发明授权

US07571021B2 Method and system for improving critical dimension uniformity 有权
标题翻译：改善临界尺寸均匀性的方法和系统
公开(公告)号：US07571021B2
公开(公告)日：2009-08-04
申请号：US11674497
申请日：2007-02-13
申请人： Chun-Hung Lin , Shy-Jay Lin , Heng-Hsin Liu , Chien-Hsun Lin , Jui-Chung Peng , Yao-Wen Guo
发明人： Chun-Hung Lin , Shy-Jay Lin , Heng-Hsin Liu , Chien-Hsun Lin , Jui-Chung Peng , Yao-Wen Guo
IPC分类号： G06F19/00 , G05B13/02
CPC分类号： H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： A method for improving critical dimension of a substrate is provided. Manufacturing data of a plurality of critical dimension deviations corresponding to a plurality of areas on the substrate is collected. A plurality of sensitivity data corresponding to the plurality of areas is also collected. A plurality of exposure dosage offsets corresponding to the plurality of areas are calculated based on the plurality of critical dimension deviations and the plurality of sensitivity data.
摘要翻译：提供了一种改善基板临界尺寸的方法。收集对应于基板上的多个区域的多个临界尺寸偏差的制造数据。还收集对应于多个区域的多个灵敏度数据。基于多个临界尺寸偏差和多个灵敏度数据来计算对应于多个区域的多个曝光剂量偏移量。

36. 发明申请

US20050191563A1 Method and system for reducing and monitoring precipitated defects on masking reticles 有权
标题翻译：用于减少和监测掩蔽掩模版上沉淀的缺陷的方法和系统
公开(公告)号：US20050191563A1
公开(公告)日：2005-09-01
申请号：US10787698
申请日：2004-02-26
申请人： Yi-Ming Dai , Ting-Yu Lin , Ho-Ku Lan , Li-Kong Turn , Heng-Hsin Liu , Louie Liu , Tony Wu , Chi-Hung Liao
发明人： Yi-Ming Dai , Ting-Yu Lin , Ho-Ku Lan , Li-Kong Turn , Heng-Hsin Liu , Louie Liu , Tony Wu , Chi-Hung Liao
IPC分类号： G03F7/00 , G03F7/20 , G03F9/00
CPC分类号： G03F7/70866 , G03F7/70741 , G03F7/70983
摘要： A method and system is disclosed for reducing and monitoring precipitated defects on mask reticles. A predetermined gas is provided into an environment surrounding the reticle assembly for reducing a formation of the precipitated defects around the mask reticle caused by photolithography under a light source having a small wavelength.
摘要翻译：公开了用于减少和监测掩模掩模版上的沉淀缺陷的方法和系统。预定的气体被提供到标线组件周围的环境中，用于减少在具有小波长的光源下通过光刻产生的掩模掩模版周围的沉淀缺陷的形成。

37. 发明授权

US08903532B2 Litho cluster and modulization to enhance productivity 有权
标题翻译： Litho集群和模块化以提高生产力
公开(公告)号：US08903532B2
公开(公告)日：2014-12-02
申请号：US13429921
申请日：2012-03-26
申请人： I-Hsiung Huang , Heng-Hsin Liu , Heng-Jen Lee , Chin-Hsiang Lin
发明人： I-Hsiung Huang , Heng-Hsin Liu , Heng-Jen Lee , Chin-Hsiang Lin
IPC分类号： H01L31/18
CPC分类号： G03F7/30 , G03F7/16 , G03F7/70991 , H01L21/67225 , H01L21/67745
摘要： The present disclosure relates to a lithographic tool arrangement for semiconductor workpiece processing. The lithographic tool arrangement groups lithographic tools into clusters, and selectively transfers a semiconductor workpiece between a plurality of lithographic tools of a first type in a first cluster to a plurality of lithographic tools of a second type in a second cluster. The selective transfer is achieved though a transfer assembly, which is coupled to a defect scan tool that identifies defects generated in the lithographic tool of the first type. The disclosed lithographic tool arrangement also utilizes shared structural elements such as a housing assembly, and shared functional elements such as gases and chemicals. The lithographic tool arrangement may consist of baking, coating, exposure, and development units configured to provide a modularization of these various components in order to optimize throughput and efficiency for a given lithographic fabrication process.
摘要翻译：本公开涉及一种用于半导体工件加工的平版印刷工具装置。光刻工具装置将光刻工具组合成簇，并且将半导体工件在第一簇中的第一类型的多个光刻工具之间选择性地传输到第二簇中的第二类型的光刻工具。通过转移组件实现选择性转移，转移组件耦合到识别第一类型的光刻工具中产生的缺陷的缺陷扫描工具。所公开的平版印刷工具装置还利用共同的结构元件，例如壳体组件和诸如气体和化学品的共享功能元件。光刻工具装置可以包括被配置成提供这些各种部件的模块化的烘烤，涂覆，曝光和显影单元，以便为给定的光刻制造工艺优化产量和效率。

38. 发明授权

US08592287B2 Overlay alignment mark and method of detecting overlay alignment error using the mark 有权
标题翻译：覆盖对齐标记和使用标记检测覆盖对齐错误的方法
公开(公告)号：US08592287B2
公开(公告)日：2013-11-26
申请号：US13196200
申请日：2011-08-02
申请人： Chi-Yuan Shih , I-Hsiung Huang , Heng-Hsin Liu
发明人： Chi-Yuan Shih , I-Hsiung Huang , Heng-Hsin Liu
IPC分类号： H01L21/00
CPC分类号： G01N23/04 , G01N2223/418 , G01N2223/611 , G03F7/70633
摘要： A method comprises providing a semiconductor substrate having a first layer and a second layer above the first layer. The first layer haw a plurality of first patterns, vias or contacts. The second layer has second patterns corresponding to the first patterns, vias or contacts. The second patterns have a plurality of in-plane offsets relative to the corresponding first patterns, vias or contacts. A scanning electron microscope is used to measure line edge roughness (LER) values of the second patterns. An overlay error is calculated between the first and second layers based on the measured LER values.
摘要翻译：一种方法包括提供在第一层上方具有第一层和第二层的半导体衬底。第一层包含多个第一图案，通孔或接触。第二层具有对应于第一图案，通孔或触点的第二图案。第二图案相对于对应的第一图案，通孔或触点具有多个面内偏移。扫描电子显微镜用于测量第二种图案的线条粗糙度（LER）值。基于测量的LER值，在第一层和第二层之间计算覆盖误差。

39. 发明申请

US20130032712A1 OVERLAY ALIGNMENT MARK AND METHOD OF DETECTING OVERLAY ALIGNMENT ERROR USING THE MARK 有权
标题翻译：覆盖对齐标记和使用标记检测覆盖对齐错误的方法
公开(公告)号：US20130032712A1
公开(公告)日：2013-02-07
申请号：US13196200
申请日：2011-08-02
申请人： Chi-Yuan SHIH , I-Hsiung HUANG , Heng-Hsin LIU
发明人： Chi-Yuan SHIH , I-Hsiung HUANG , Heng-Hsin LIU
IPC分类号： G01N23/00 , H01L23/544
CPC分类号： G01N23/04 , G01N2223/418 , G01N2223/611 , G03F7/70633
摘要： A method comprises providing a semiconductor substrate having a first layer and a second layer above the first layer. The first layer haw a plurality of first patterns, vias or contacts. The second layer has second patterns corresponding to the first patterns, vias or contacts. The second patterns have a plurality of in-plane offsets relative to the corresponding first patterns, vias or contacts. A scanning electron microscope is used to measure line edge roughness (LER) values of the second patterns. An overlay error is calculated between the first and second layers based on the measured LER values.
摘要翻译：一种方法包括提供在第一层上方具有第一层和第二层的半导体衬底。第一层包含多个第一图案，通孔或接触。第二层具有对应于第一图案，通孔或触点的第二图案。第二图案相对于对应的第一图案，通孔或触点具有多个面内偏移。扫描电子显微镜用于测量第二种图案的线条粗糙度（LER）值。基于测量的LER值，在第一层和第二层之间计算覆盖误差。

40. 发明申请

US20080129969A1 System and Method For Improving Immersion Scanner Overlay Performance 有权
标题翻译：提高浸入式扫描仪覆盖性能的系统和方法
公开(公告)号：US20080129969A1
公开(公告)日：2008-06-05
申请号：US11677949
申请日：2007-02-22
申请人： Jui-Chung Peng , Tzung-Chi Fu , Chin-Hsiang Lin , Chien-Hsun Lin , Chun-Hung Lin , Yao-Wen Guo , Shy-Jay Lin , Heng-Hsin Liu
发明人： Jui-Chung Peng , Tzung-Chi Fu , Chin-Hsiang Lin , Chien-Hsun Lin , Chun-Hung Lin , Yao-Wen Guo , Shy-Jay Lin , Heng-Hsin Liu
IPC分类号： G03B27/52
CPC分类号： G03F7/70875 , G03F7/70341 , G03F7/70783
摘要： System and method for improving immersion scanner overlay performance are described. One embodiment is a method of improving overlay performance of an photolithography immersion scanner comprising a wafer table having lens cooling water (“LCW”) disposed in a water channel therein, the wafer table having an input for receiving the LCW into the water channel and an output for expelling the LCW from the water channel. The method comprises providing a water tank at least one of the wafer table input and the wafer table output; monitoring a pressure of water in the water tank; and maintaining the pressure of the water in the water tank at a predetermined level.
摘要翻译：描述了用于提高浸没式扫描仪覆盖性能的系统和方法。一个实施例是一种提高光刻浸没式扫描仪的覆盖性能的方法，其包括设置在其中的水通道中的透镜冷却水（“LCW”）的晶片台，晶片台具有用于将LCW接收到水通道中的输入端，输出用于从水道排出LCW。该方法包括：提供一个水箱至少一个晶片台输入和晶片台输出; 监测水箱内的水压; 并且将水箱中的水的压力保持在预定水平。

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