专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明授权

US5526506A Computer system having an improved memory architecture 失效
标题翻译：具有改进的存储器架构的计算机系统
公开(公告)号：US5526506A
公开(公告)日：1996-06-11
申请号：US578041
申请日：1990-09-04
申请人： Gilbert P. Hyatt
发明人： Gilbert P. Hyatt
IPC分类号： B60R16/02 , B60R16/037 , F21V23/00 , G01S7/52 , G01S15/89 , G02F1/133 , G03F9/00 , G04G99/00 , G05B19/35 , G05B19/408 , G05B19/409 , G05B19/4093 , G05B19/414 , G06F3/038 , G06F12/00 , G06F12/02 , G06F13/16 , G06J1/00 , G07G1/12 , G09G5/18 , G09G5/20 , G10L19/00 , G11C11/56 , G11C19/28 , G11C19/36 , G11C27/00 , G11C27/02 , G11C27/04 , H03H17/02
CPC分类号： G06F3/0383 , B60R16/0373 , F21V23/00 , G01S15/897 , G01S15/8977 , G01S7/52026 , G02F1/13318 , G03F9/7049 , G03F9/7088 , G04G99/006 , G05B19/351 , G05B19/408 , G05B19/4083 , G05B19/4086 , G05B19/409 , G05B19/4093 , G05B19/414 , G05B19/4142 , G06F12/0215 , G06F13/16 , G06J1/00 , G07G1/12 , G09G5/18 , G09G5/20 , G10L19/00 , G11C11/565 , G11C13/0033 , G11C16/3418 , G11C16/3431 , G11C19/287 , G11C19/36 , G11C27/00 , G11C27/024 , G11C27/04 , G11C7/1039 , H03H17/0291 , G05B2219/23094 , G05B2219/33182 , G05B2219/34023 , G05B2219/34098 , G05B2219/34471 , G05B2219/34472 , G05B2219/35262 , G05B2219/35263 , G05B2219/35373 , G05B2219/35381 , G05B2219/35431 , G05B2219/35436 , G05B2219/35453 , G05B2219/35472 , G05B2219/35554 , G05B2219/35588 , G05B2219/36152 , G05B2219/36227 , G05B2219/36333 , G05B2219/36366 , G05B2219/36379 , G05B2219/36395 , G05B2219/36502 , G05B2219/36503 , G05B2219/36506 , G05B2219/36546 , G05B2219/41021 , G05B2219/42237 , G05B2219/45214 , G05B2219/45215 , G05B2219/49221 , G05B2219/50047 , G05B2219/50048 , G05B2219/50083 , G05B2219/50151 , G11C13/04 , G11C7/16 , Y02P90/265
摘要： Memory technologies for storing filter samples include RAMs and CCDs. Adaptive memory capability and memory servo capability improve memory characteristics. In a RAM embodiment, a detector is used to detect a memory address condition and to control the memory and the memory address register in response thereto. In a CCD embodiment, a detector is used to detect a memory reference signal and to refresh the memory signals in response thereto. Improved memory refresh, memory performance, and memory capacity enhance system characteristics. Improved memory architecture provides advantages of increased speed, lower cost, and efficiency of implementation. Information stored in memory can be scanned out at a rate greater than the addressing rate associated with the memories. This permits higher speed operation with lower cost memories. Use of an output buffer, such as a FIFO, permits normalization of memory clock rates.
摘要翻译：用于存储滤波器样本的存储器技术包括RAM和CCD。自适应存储器能力和存储器伺服能力提高了存储器特性。在RAM实施例中，检测器用于检测存储器地址条件并且响应于此而控制存储器和存储器地址寄存器。在CCD实施例中，检测器用于检测存储器参考信号并响应于此刷新存储器信号。改进的内存刷新，内存性能和内存容量增强了系统特性。改进的内存架构提供了增加速度，降低成本和实施效率的优点。可以以大于与存储器相关联的寻址速率的速率扫描存储在存储器中的信息。这允许以更低成本的存储器进行更高速度的操作。使用诸如FIFO之类的输出缓冲器可以使存储器时钟速率正常化。

22. 发明授权

US5459846A Computer architecture system having an imporved memory 失效
标题翻译：具有改进的存储器的计算机体系结构
公开(公告)号：US5459846A
公开(公告)日：1995-10-17
申请号：US279592
申请日：1988-12-02
申请人： Gilbert P. Hyatt
发明人： Gilbert P. Hyatt
IPC分类号： B41F33/10 , B60R16/02 , B60R16/037 , F21V23/00 , G01S7/52 , G01S15/89 , G02F1/133 , G03F9/00 , G04G99/00 , G05B1/03 , G05B19/35 , G05B19/408 , G05B19/409 , G05B19/4093 , G05B19/414 , G06F12/02 , G06F13/16 , G06J1/00 , G07G1/12 , G09G5/18 , G10L19/00 , G11C11/56 , G11C19/28 , G11C19/36 , G11C27/00 , G11C27/02 , G11C27/04 , H03H17/02 , G06F12/00
CPC分类号： G03F9/7088 , B60R16/0373 , F21V23/00 , G01S15/897 , G01S15/8977 , G01S7/52026 , G02F1/13318 , G03F9/7049 , G04G99/006 , G05B19/351 , G05B19/408 , G05B19/4083 , G05B19/4086 , G05B19/409 , G05B19/4093 , G05B19/414 , G05B19/4142 , G06F12/0215 , G06F13/16 , G06J1/00 , G07G1/12 , G09G5/18 , G10L19/00 , G11C11/565 , G11C13/0033 , G11C16/3418 , G11C16/3431 , G11C19/287 , G11C19/36 , G11C27/00 , G11C27/024 , G11C27/04 , G11C7/1039 , G11C7/1042 , H03H17/0291 , G05B2219/23094 , G05B2219/33182 , G05B2219/34023 , G05B2219/34098 , G05B2219/34471 , G05B2219/34472 , G05B2219/35262 , G05B2219/35263 , G05B2219/35373 , G05B2219/35381 , G05B2219/35431 , G05B2219/35436 , G05B2219/35453 , G05B2219/35472 , G05B2219/35554 , G05B2219/35588 , G05B2219/36152 , G05B2219/36227 , G05B2219/36333 , G05B2219/36366 , G05B2219/36379 , G05B2219/36395 , G05B2219/36502 , G05B2219/36503 , G05B2219/36506 , G05B2219/36546 , G05B2219/41021 , G05B2219/42237 , G05B2219/45214 , G05B2219/45215 , G05B2219/49221 , G05B2219/50047 , G05B2219/50048 , G05B2219/50083 , G05B2219/50151 , G11C13/04 , G11C7/16 , Y02P90/265
摘要： A computer system having an improved memory architecture uses a variety of memory speed enhancement features that can be used in combination. For example, the memory is scanned out across memory blocks, unnecessary row addressing operations are detected and eliminated, and the memory is organized to reduce row addressing operations for combinations of instruction accesses interspersed by operand accesses. In a DRAM configuration, unnecessary CAS addressing cycles and RAS addressing cycles are detected and eliminated. A memory address detector circuit in the memory controller determines the nature of the memory cycle; chip select, RAS, or CAS; needed to access stored digital information and deletes unnecessary cycles.
摘要翻译：具有改进的存储器架构的计算机系统使用可以组合使用的各种存储器速度增强特征。例如，存储器跨越存储器块被扫描，不必要的行寻址操作被检测和消除，并且存储器被组织以减少用于由操作数访问散布的指令访问的组合的行寻址操作。在DRAM配置中，检测和消除了不必要的CAS寻址周期和RAS寻址周期。存储器控制器中的存储器地址检测器电路确定存储器周期的性质; 芯片选择，RAS或CAS; 需要访问存储的数字信息并删除不必要的周期。

23. 发明授权

US4209843A Method and apparatus for signal enhancement with improved digital filtering 失效
标题翻译：用于改进数字滤波的信号增强方法和装置
公开(公告)号：US4209843A
公开(公告)日：1980-06-24
申请号：US550231
申请日：1975-02-14
申请人： Gilbert P. Hyatt
发明人： Gilbert P. Hyatt
IPC分类号： B60R16/02 , B60R16/037 , F21V23/00 , G01S7/52 , G01S15/89 , G02F1/133 , G03F9/00 , G04G99/00 , G05B19/35 , G05B19/408 , G05B19/409 , G05B19/4093 , G05B19/414 , G06F13/16 , G06F17/10 , G06J1/00 , G07G1/12 , G10L19/00 , G11C11/56 , G11C19/28 , G11C19/36 , G11C27/00 , G11C27/04 , H03H17/02 , G06F15/20 , G06F15/34
CPC分类号： B60R16/0373 , F21V23/00 , G01S15/897 , G01S15/8977 , G01S7/52026 , G01V1/005 , G02F1/13318 , G03F9/7049 , G03F9/7088 , G04G99/006 , G05B19/351 , G05B19/408 , G05B19/4083 , G05B19/4086 , G05B19/409 , G05B19/4093 , G05B19/414 , G05B19/4142 , G06F13/16 , G06J1/00 , G07G1/12 , G10L19/00 , G11C11/565 , G11C19/287 , G11C19/36 , G11C27/00 , G11C27/04 , G11C7/1042 , H03H17/0291 , Y02P90/265
摘要： A signal enhancement system is provided using an improved digital filtering apparatus and method. Enhanced performance and cost is achieved by processing signals on the fly in real time. Greater precision is achieved by providing compositing-after-correlation capability. Further improvements are achieved by separating and compositing a plurality of signals that are multiplexed together. Still further improvements are achieved with a filter implementation using charge coupled devices.
摘要翻译：使用改进的数字滤波装置和方法提供信号增强系统。通过实时处理信号来实现增强的性能和成本。通过提供合成后相关能力实现更高的精度。通过分离和合成复用在一起的多个信号来实现进一步的改进。使用电荷耦合器件的滤波器实现进一步改进。

24. 发明申请

US20030067406A1 Waveform shaping circuit 失效
标题翻译：波形整形电路
公开(公告)号：US20030067406A1
公开(公告)日：2003-04-10
申请号：US10252403
申请日：2002-09-24
申请人： Pioneer Corporation
发明人： Manabu Nohara , Tomoaki Iwai
IPC分类号： H03M001/12
CPC分类号： H04L25/03834 , H03H17/0291
摘要： A small sized digital Nyquist filter having a high processing speed is provided. A delay in a delay element in the digital Nyquist filter is synchronized with a symbol rate of an input signal, and filtering coefficients at respective taps in the filer are sequentially selected synchronously with a sampling clock in accordance with a predetermined procedure, thereby reducing the number of taps to 1/oversampling number.
摘要翻译：提供具有高处理速度的小尺寸数字奈奎斯特滤波器。数字奈奎斯特滤波器中的延迟元件的延迟与输入信号的符号速率同步，并且根据预定的过程与采样时钟同步地顺序地选择滤波器中的各个抽头处的滤波系数，从而减少数字的抽头到1 /过采样数。

25. 发明申请

US20020098823A1 METHOD AND CIRCUIT FOR SAMPLING A SIGNAL AT HIGH SAMPLING FREQUENCY 有权
标题翻译：用于在高采样频率下采集信号的方法和电路
公开(公告)号：US20020098823A1
公开(公告)日：2002-07-25
申请号：US09316357
申请日：1999-05-21
发明人： SASKA LINDFORS , AARNO PARSSINEN , KARI HALONEN
IPC分类号： H04B001/16
CPC分类号： H03H19/004 , H03H17/0291
摘要： Electrical circuit (300, 500, 800, 900) has an input (301, 501, 801, 802, 901, 902) and an output (311, 502, OUT, I-OUT, Q-OUT). The circuit samples an input signal coupled to the input having a certain input frequency and converts the input signal into a certain output frequency at the output, the output frequency being lower than the input frequency. It comprises a first sampler circuit (302, 510, 803, 910) coupled to the input, a second sampler circuit (303, 520, 804, 920) coupled to the input, a buffering component (309, 509, 809, 903, 904) coupled to the output and buffer switching means (305-307, 514, 515, 811-818, 914, 915, 924, 925, 934, 935, 944, 945, 954, 955, 964, 965, 974, 975, 984, 985). The buffer switching means are arranged to respond to a buffering command (fs/N, A, B) by coupling said first sampler circuit and said second sampler circuit to said buffering component.
摘要翻译：电路（300,500,800,900）具有输入（301,501,801,802,901,902）和输出（311,502，OUT，I-OUT，Q-OUT）。电路对耦合到具有一定输入频率的输入的输入信号进行采样，并将输入信号转换成输出端的某一输出频率，输出频率低于输入频率。它包括耦合到输入端的第一取样器电路（302,510,803,910），耦合到输入端的第二采样器电路（303,520,804,920），缓冲部件（309,509,809,910） 904）耦合到所述输出和缓冲器切换装置（305-307,514,515,811-818,914,915,924,925,934,935,944,945,954,905,964,965,974,975），984,985）。缓冲器切换装置被布置成通过将所述第一采样器电路和所述第二采样器电路耦合到所述缓冲部件来响应缓冲命令（fs / N，A，B）。

27. 发明授权

US5619445A Analog memory system having a frequency domain transform processor 失效
标题翻译：具有频域变换处理器的模拟存储器系统
公开(公告)号：US5619445A
公开(公告)日：1997-04-08
申请号：US254818
申请日：1994-06-06
申请人： Gilbert P. Hyatt
发明人： Gilbert P. Hyatt
IPC分类号： B60R16/02 , B60R16/037 , F21V23/00 , G01J1/42 , G01S7/52 , G01S15/89 , G02F1/133 , G03F9/00 , G04G99/00 , G05B15/00 , G05B19/35 , G05B19/408 , G05B19/409 , G05B19/4093 , G05B19/414 , G06F13/16 , G06J1/00 , G07G1/12 , G10L19/00 , G11C11/56 , G11C19/28 , G11C19/36 , G11C27/00 , G11C27/02 , G11C27/04 , H03H17/02 , G11C13/00
CPC分类号： B60R16/0373 , F21V23/00 , G01S15/897 , G01S15/8977 , G01S7/52026 , G02F1/13318 , G03F9/7049 , G03F9/7088 , G04G99/006 , G05B19/351 , G05B19/408 , G05B19/4083 , G05B19/4086 , G05B19/409 , G05B19/4093 , G05B19/414 , G05B19/4142 , G06F13/16 , G06J1/00 , G07G1/12 , G10L19/00 , G11C11/565 , G11C13/0033 , G11C16/3418 , G11C16/3431 , G11C19/287 , G11C19/36 , G11C27/00 , G11C27/024 , G11C27/04 , G11C7/1042 , H03H17/0291 , G05B2219/23094 , G05B2219/33182 , G05B2219/34023 , G05B2219/34098 , G05B2219/34471 , G05B2219/34472 , G05B2219/35262 , G05B2219/35263 , G05B2219/35373 , G05B2219/35381 , G05B2219/35431 , G05B2219/35436 , G05B2219/35453 , G05B2219/35472 , G05B2219/35554 , G05B2219/35588 , G05B2219/36152 , G05B2219/36227 , G05B2219/36333 , G05B2219/36366 , G05B2219/36379 , G05B2219/36395 , G05B2219/36502 , G05B2219/36503 , G05B2219/36506 , G05B2219/36546 , G05B2219/41021 , G05B2219/42237 , G05B2219/45214 , G05B2219/45215 , G05B2219/49221 , G05B2219/50047 , G05B2219/50048 , G05B2219/50083 , G05B2219/50151 , G11C13/04 , G11C7/16 , Y02P90/265
摘要： An optical system is provided having an analog image memory, an analog refresh circuit, and an analog converter. An optical image is projected on an analog memory, such as a CCD array, generating analog image signal samples in the analog memory. The analog charge signal samples can be shifted in the array and can be processed with an analog to digital converter to generate digital signal samples. The digital signal samples can be processed with a digital processor, such as a digital transform processor to generate frequency domain information. The frequency domain information can be stored in an output memory and can be communicated to a remote location. An image can be displayed in response to the stored analog image signal samples or in response to the frequency domain information.
摘要翻译：提供具有模拟图像存储器，模拟刷新电路和模拟转换器的光学系统。将光学图像投影在诸如CCD阵列的模拟存储器上，在模拟存储器中产生模拟图像信号样本。模拟充电信号样本可以在阵列中移位，并且可以用模数转换器处理以产生数字信号采样。数字信号样本可以用诸如数字变换处理器的数字处理器来处理，以产生频域信息。频域信息可以存储在输出存储器中并且可以被传送到远程位置。可以响应于存储的模拟图像信号样本或响应于频域信息而显示图像。

28. 发明授权

US5615380A Integrated circuit computer system having a keyboard input and a sound output 失效
标题翻译：具有键盘输入和声音输出的集成电路计算机系统
公开(公告)号：US5615380A
公开(公告)日：1997-03-25
申请号：US506642
申请日：1991-04-09
申请人： Gilbert P. Hyatt
发明人： Gilbert P. Hyatt
IPC分类号： B60R16/02 , B60R16/037 , F21V23/00 , G01S7/52 , G01S15/89 , G02F1/133 , G03F9/00 , G04G99/00 , G05B19/35 , G05B19/408 , G05B19/409 , G05B19/4093 , G05B19/414 , G06F13/10 , G06F13/16 , G06J1/00 , G07G1/12 , G10L19/00 , G11C11/56 , G11C19/28 , G11C19/36 , G11C27/00 , G11C27/02 , G11C27/04 , H03H17/02 , G06F13/00
CPC分类号： B60R16/0373 , F21V23/00 , G01S15/897 , G01S15/8977 , G01S7/52026 , G02F1/13318 , G03F9/7049 , G03F9/7088 , G04G99/006 , G05B19/351 , G05B19/408 , G05B19/4083 , G05B19/4086 , G05B19/409 , G05B19/4093 , G05B19/414 , G05B19/4142 , G06F13/16 , G06J1/00 , G07G1/12 , G10L19/00 , G11C11/565 , G11C13/0033 , G11C16/3418 , G11C16/3431 , G11C19/287 , G11C19/36 , G11C27/00 , G11C27/024 , G11C27/04 , H03H17/0291 , G05B2219/23094 , G05B2219/33182 , G05B2219/34023 , G05B2219/34098 , G05B2219/34471 , G05B2219/34472 , G05B2219/35262 , G05B2219/35263 , G05B2219/35373 , G05B2219/35381 , G05B2219/35431 , G05B2219/35436 , G05B2219/35453 , G05B2219/35472 , G05B2219/35554 , G05B2219/35588 , G05B2219/36152 , G05B2219/36227 , G05B2219/36333 , G05B2219/36366 , G05B2219/36379 , G05B2219/36395 , G05B2219/36502 , G05B2219/36503 , G05B2219/36506 , G05B2219/36546 , G05B2219/41021 , G05B2219/42237 , G05B2219/45214 , G05B2219/45215 , G05B2219/49221 , G05B2219/50047 , G05B2219/50048 , G05B2219/50083 , G05B2219/50151 , G11C13/04 , G11C7/16 , Y02P90/265
摘要： An improved computer system is implemented with an integrated circuit computer having integrated circuit (IC) memories and using a keyboard input and sound output to communicate with an operator. Provision is made for a dynamic memory with a memory refresh arrangement. Memory refresh is synchronized with computer control signals to minimize contention or conflicts with computer operations and to share control circuitry. Improved control system architecture, computer architecture, and memory architecture are provided that are particularly suitable for operator interaction, integrated circuit data processors, and dynamic memories.
摘要翻译：利用具有集成电路（IC）存储器的集成电路计算机实现改进的计算机系统，并且使用键盘输入和声音输出来与操作者通信。提供了具有内存刷新布局的动态内存。存储器刷新与计算机控制信号同步，以最小化与计算机操作的冲突或冲突，并共享控制电路。提供了改进的控制系统架构，计算机架构和存储器架构，其特别适用于操作员交互，集成电路数据处理器和动态存储器。

29. 发明授权

US5563812A Filter device including analog and digital circuitry 失效
标题翻译：滤波器包括模拟和数字电路
公开(公告)号：US5563812A
公开(公告)日：1996-10-08
申请号：US377041
申请日：1995-01-23
申请人： Guoliang Shou , Sunao Takatori , Makoto Yamamoto
发明人： Guoliang Shou , Sunao Takatori , Makoto Yamamoto
IPC分类号： H03H15/00 , H03H17/02 , G06J1/00
CPC分类号： H03H17/0291 , H03H15/00
摘要： A filter circuit switches a switching mechanism based on multipliers held in a data register DATA RGST as a digital data. Based on the output data of data register DATA RGST, a multiplication circuit M is arranged to have weights corresponding to a capacity of capacitance connected with a common analog input voltage X.
摘要翻译：滤波器电路基于保持在数据寄存器DATA RGST中的乘法器作为数字数据切换开关机构。基于数据寄存器DATA RGST的输出数据，乘法电路M被配置为具有对应于与公共模拟输入电压X连接的电容容量的权重。

30. 发明授权

US5432526A Liquid crystal display having conductive cooling 失效
标题翻译：具有导电冷却的液晶显示器
公开(公告)号：US5432526A
公开(公告)日：1995-07-11
申请号：US515881
申请日：1990-04-27
申请人： Gilbert P. Hyatt
发明人： Gilbert P. Hyatt
IPC分类号： B60R16/02 , B60R16/037 , F21V23/00 , G01S7/52 , G01S15/89 , G02F1/133 , G03F9/00 , G04G99/00 , G05B19/35 , G05B19/408 , G05B19/409 , G05B19/4093 , G05B19/414 , G06F13/16 , G06J1/00 , G07G1/12 , G09G3/36 , G10L19/00 , G11C11/56 , G11C19/28 , G11C19/36 , G11C27/00 , G11C27/02 , G11C27/04 , H03H17/02
CPC分类号： B60R16/0373 , F21V23/00 , G01S15/897 , G01S15/8977 , G01S7/52026 , G02F1/13318 , G03F9/7049 , G03F9/7088 , G04G99/006 , G05B19/351 , G05B19/408 , G05B19/4083 , G05B19/4086 , G05B19/409 , G05B19/4093 , G05B19/414 , G05B19/4142 , G06F13/16 , G06J1/00 , G07G1/12 , G10L19/00 , G11C11/565 , G11C13/0033 , G11C16/3418 , G11C16/3431 , G11C19/287 , G11C19/36 , G11C27/00 , G11C27/024 , G11C27/04 , G11C7/1042 , H03H17/0291 , G05B2219/23094 , G05B2219/33182 , G05B2219/34023 , G05B2219/34098 , G05B2219/34471 , G05B2219/34472 , G05B2219/35262 , G05B2219/35263 , G05B2219/35373 , G05B2219/35381 , G05B2219/35431 , G05B2219/35436 , G05B2219/35453 , G05B2219/35472 , G05B2219/35554 , G05B2219/35588 , G05B2219/36152 , G05B2219/36227 , G05B2219/36333 , G05B2219/36366 , G05B2219/36379 , G05B2219/36395 , G05B2219/36502 , G05B2219/36503 , G05B2219/36506 , G05B2219/36546 , G05B2219/41021 , G05B2219/42237 , G05B2219/45214 , G05B2219/45215 , G05B2219/49221 , G05B2219/50047 , G05B2219/50048 , G05B2219/50083 , G05B2219/50151 , G11C13/04 , G11C7/16
摘要： Illumination control systems implemented with illumination amplifiers, such as liquid crystal devices, are provided. Heat transfer devices remove heat, such as heat caused by the high intensity illumination, from the illumination amplifier. The illumination amplifiers can be implemented in either transmissive or reflective modes. In a reflective mode, illumination can be reflected from a front side and heat can be removed from a back side of the illumination amplifier. Color is provided, such as generating multiple channels of different color images and projecting the different color images to generate a multicolored image.
摘要翻译：提供了用诸如液晶装置的照明放大器实现的照明控制系统。传热装置从照明放大器中除去高强度照明引起的热量。照明放大器可以以透射或反射模式实现。在反射模式中，可以从前侧反射照明，并且可以从照明放大器的背面去除热量。提供颜色，例如产生不同颜色图像的多个通道并投影不同的彩色图像以产生多色图像。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式