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21. 发明申请

US20110153927A1 Storage Control Device, Electronic Device, and Storage Control Method 审中-公开
标题翻译：存储控制装置，电子装置和存储控制方法
公开(公告)号：US20110153927A1
公开(公告)日：2011-06-23
申请号：US12878604
申请日：2010-09-09
申请人： Takami SUGITA
发明人： Takami SUGITA
IPC分类号： G06F12/00
CPC分类号： G09G5/393 , G09G5/18 , G09G2360/10 , G09G2360/128 , H04N21/426
摘要： According to one embodiment, a storage control device includes a controller, a detector, and a refreshing module. The controller writes image data, which is to be output to a display module, to a storage device and outputs the image data from the storage device to the display module. The detector detects a blanking period during which the controller does not write the image data to the storage device and does not output the image data from the storage device to the display module. The refreshing module refreshes the storage device by rewriting the image data to the storage device at a predetermined time interval if the detector detects a blanking period.
摘要翻译：根据一个实施例，存储控制装置包括控制器，检测器和刷新模块。控制器将要输出到显示模块的图像数据写入存储装置，并将图像数据从存储装置输出到显示模块。检测器检测到控制器不将图像数据写入存储装置的消隐期间，并且不将图像数据从存储装置输出到显示模块。如果检测器检测到消隐期，则刷新模块通过将图像数据以预定时间间隔重写到存储设备来刷新存储设备。

22. 发明申请

US20110134134A1 IMAGE DISPLAY APPARATUS 审中-公开
标题翻译：图像显示设备
公开(公告)号：US20110134134A1
公开(公告)日：2011-06-09
申请号：US12970308
申请日：2010-12-16
申请人： Michio Yoshitake
发明人： Michio Yoshitake
IPC分类号： G09G5/36
CPC分类号： G09G5/393 , G09G5/395 , G09G5/399 , G09G2340/02 , G09G2360/128
摘要： An image display apparatus, including multiple line buffers that divide a unit line's worth of image data into multiple pieces and store those pieces. The compression unit, executes the first process in which the compression of the image data read out from the line buffer is carried out referring to image data of an adjacent pixel stored in the frame memory, and executes the second process, different from the first process, in the case where the read-out image data and the image data of the adjacent pixel are data from different line buffers. Accordingly, even if a plurality of line buffers that divide and store a unit line's worth of image data are provided, the writing of image data from the line buffers into the frame memory can be carried out efficiently.
摘要翻译：一种图像显示装置，包括将单位线的图像数据分成多个部分并存储这些部分的多个行缓冲器。压缩单元参照存储在帧存储器中的相邻像素的图像数据执行从行缓冲器读出的图像数据的压缩的第一处理，并执行与第一处理不同的第二处理在读出的图像数据和相邻像素的图像数据是来自不同行缓冲器的数据的情况下。因此，即使提供划分并存储单位线的图像数据的多个行缓冲器，也可以有效地执行将图像数据从行缓冲器写入到帧存储器中。

23. 发明申请

US20110084979A1 INTEGRATED ELECTRONIC PAPER DISPLAY CONTROLLER 审中-公开
标题翻译：集成电子纸显示控制器
公开(公告)号：US20110084979A1
公开(公告)日：2011-04-14
申请号：US12576297
申请日：2009-10-09
申请人： Serge RUTMAN , Samson HUANG , Tarik ISANI
发明人： Serge RUTMAN , Samson HUANG , Tarik ISANI
IPC分类号： G09G5/02 , G09G3/34
CPC分类号： G09G3/344 , G09G5/393 , G09G2310/0245 , G09G2310/0275 , G09G2320/0673 , G09G2360/121 , G09G2360/128
摘要： A system for and method of controlling an electronic display, such as an electrophoretic display, using an integrated electronic paper display controller are disclosed. The system and method provide for transparent translation of standard image data into signals sufficient to drive such displays and implement the corresponding image.
摘要翻译：公开了一种使用集成电子纸显示控制器来控制诸如电泳显示器的电子显示器的系统和方法。该系统和方法提供将标准图像数据透明地转换成足以驱动这种显示器并实现相应图像的信号。

24. 发明申请

US20100321398A1 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 有权
标题翻译：半导体集成电路设备
公开(公告)号：US20100321398A1
公开(公告)日：2010-12-23
申请号：US12526333
申请日：2008-02-27
申请人： Shoji Kawahara
发明人： Shoji Kawahara
IPC分类号： G09G5/36
CPC分类号： G09G5/39 , G09G5/393 , G09G5/395 , G09G5/397 , G09G2330/021 , G09G2360/128 , G09G2360/18
摘要： A semiconductor integrated circuit device of the present invention connected to a memory in which display data for a display device is stored, and is adapted to read out the display data from the memory to transfer the same to the display device, the semiconductor integrated circuit device comprising: a display data buffer for holding the display data; a memory controller for prefetching the display data in page-size units of the memory to cause the same to be held by the display data buffer and, upon completing prefetching of one page, closing the page to cause the memory to shift into a power saving mode; and a display device controller for transferring the display data held in the display data buffer to the display device.
摘要翻译：本发明的半导体集成电路装置与存储有显示装置的显示数据的存储器连接，适于从存储器读出显示数据，将其传送到显示装置，半导体集成电路装置包括：用于保持显示数据的显示数据缓冲器; 存储器控制器，用于以存储器的页大小单位预取显示数据，以使其由显示数据缓冲器保持，并且在完成一页预取时，关闭该页面以使存储器转换到省电模式; 以及显示装置控制器，用于将保持在显示数据缓冲器中的显示数据传送到显示装置。

25. 发明申请

US20100156917A1 IMAGE PROCESSING APPARATUS AND METHOD FOR MANAGING FRAME MEMORY IN IMAGE PROCESSING 审中-公开
标题翻译：用于管理图像处理中的帧记忆的图像处理装置和方法
公开(公告)号：US20100156917A1
公开(公告)日：2010-06-24
申请号：US12579630
申请日：2009-10-15
申请人： Hoo Sung LEE , Kyoung Seon Shin , Ig Kyun Kim , Suk Ho Lee , Sang Heon Lee , Seong Mo Park , Nak Woong Eum
发明人： Hoo Sung LEE , Kyoung Seon Shin , Ig Kyun Kim , Suk Ho Lee , Sang Heon Lee , Seong Mo Park , Nak Woong Eum
IPC分类号： G06F12/02 , G06F12/00
CPC分类号： G09G5/39 , G09G2360/123 , G09G2360/128 , H04N19/423
摘要： A method for managing a frame memory includes: determining a frame memory structure with reference to memory configuration information and image processing information; configuring a frame memory such that a plurality of image signals are stored in each page according to the frame memory structure; and computing a signal storage address by combining image acquiring information by bits, and accessing a frame memory map to write or read an image signal by pages.
摘要翻译：一种用于管理帧存储器的方法包括：参考存储器配置信息和图像处理信息确定帧存储器结构; 配置帧存储器，使得根据帧存储器结构将多个图像信号存储在每个页面中; 以及通过将图像获取信息通过比特组合来计算信号存储地址，以及访问帧存储器映射以通过页面来写入或读取图像信号。

26. 发明申请

US20100110106A1 VIDEO AND GRAPHICS SYSTEM WITH PARALLEL PROCESSING OF GRAPHICS WINDOWS 审中-公开
标题翻译：视频和图形系统并行处理图形窗口
公开(公告)号：US20100110106A1
公开(公告)日：2010-05-06
申请号：US12642609
申请日：2009-12-18
申请人： Alexander G. MacInnis , Chengfuh Jeffrey Tang , Greg A. Kranawetter
发明人： Alexander G. MacInnis , Chengfuh Jeffrey Tang , Greg A. Kranawetter
IPC分类号： G09G5/00
CPC分类号： G06T9/007 , G09G5/001 , G09G5/02 , G09G5/024 , G09G5/026 , G09G5/06 , G09G5/12 , G09G5/14 , G09G5/28 , G09G5/346 , G09G5/36 , G09G5/363 , G09G2300/0408 , G09G2310/0224 , G09G2320/0247 , G09G2340/02 , G09G2340/0407 , G09G2340/0428 , G09G2340/06 , G09G2340/10 , G09G2340/12 , G09G2340/125 , G09G2360/02 , G09G2360/121 , G09G2360/125 , G09G2360/126 , G09G2360/128 , H04N5/126 , H04N5/14 , H04N5/4401 , H04N5/44504 , H04N5/44508 , H04N5/44591 , H04N5/45 , H04N5/46 , H04N9/45 , H04N9/641 , H04N9/642 , H04N9/75 , H04N9/78 , H04N11/143 , H04N11/20 , H04N19/112 , H04N19/16 , H04N19/186 , H04N19/20 , H04N19/27 , H04N19/42 , H04N19/423 , H04N19/436 , H04N19/44 , H04N19/59 , H04N19/61 , H04N19/80 , H04N21/42204 , H04N21/42653 , H04N21/4305 , H04N21/4316 , H04N21/434 , H04N21/4438 , H04N21/47
摘要： A display engine of a video and graphics system includes one or more processing elements and receives graphics from a memory. The graphics data define multiple graphics layers, and the processing elements process two or more graphics layers in parallel to generate blended graphics. Alpha values may be used while blending graphics. The processing elements may be integrated on an integrated circuit chip with an input for receiving the graphics data and other video and graphics components. The display engine may also include a graphics controller for receiving two or more graphics layers in parallel, for arranging the graphics layers in an order suitable for parallel processing, and for providing the arranged graphics layers to the processing elements. The blended graphics may be blended with HDTV video or SDTV video, which may be extracted from compressed data streams such as an MPEG Transport stream.
摘要翻译：视频和图形系统的显示引擎包括一个或多个处理元件并从存储器接收图形。图形数据定义多个图形层，并且处理元件并行处理两个或多个图形层以产生混合图形。混合图形时可以使用Alpha值。处理元件可以集成在具有用于接收图形数据和其他视频和图形部件的输入的集成电路芯片上。显示引擎还可以包括用于并行接收两个或更多图形层的图形控制器，用于以适于并行处理的顺序排列图形层，以及为处理元件提供布置的图形层。混合图形可以与HDTV视频或SDTV视频混合，HDTV视频或SDTV视频可以从诸如MPEG传输流的压缩数据流中提取。

27. 发明授权

US07711976B2 Data processing system and image processing system 失效
标题翻译：数据处理系统和图像处理系统
公开(公告)号：US07711976B2
公开(公告)日：2010-05-04
申请号：US11826136
申请日：2007-07-13
申请人： Jun Satoh , Kazushige Yamagishi , Keisuke Nakashima , Koyo Katsura , Takashi Miyamoto , Mitsuru Watabe , Kenichiroh Ohmura
发明人： Jun Satoh , Kazushige Yamagishi , Keisuke Nakashima , Koyo Katsura , Takashi Miyamoto , Mitsuru Watabe , Kenichiroh Ohmura
IPC分类号： G06F1/04
CPC分类号： G09G5/393 , G06F1/04 , G06F1/12 , G06F12/0207 , G06F13/1689 , G06F13/4243 , G06F15/7832 , G06T1/60 , G09G5/001 , G09G5/395 , G09G5/399 , G09G2320/0252 , G09G2350/00 , G09G2360/128 , G09G2370/10 , G11C8/04 , G11C8/06 , G11C8/10 , G11C8/12 , G11C8/18
摘要： A data processor comprising: a bus control circuit adapted to be interfaced with a synchronous DRAM which can be accessed in synchronism with a clock signal; a plurality of data processing modules coupled to said bus control circuit for producing data and addresses for accessing a memory; and a clock driver for feeding intrinsic operation clocks to said data processing modules and for feeding the clock signal for accessing said memory in synchronism with the operations of said data processing modules to be operated by the operation clock signals, to the outside.
摘要翻译：一种数据处理器，包括：总线控制电路，适于与可与时钟信号同步地访问的同步DRAM接口; 耦合到所述总线控制电路的多个数据处理模块，用于产生访问存储器的数据和地址; 以及时钟驱动器，用于将本征操作时钟馈送到所述数据处理模块，并且用于馈送用于与所述操作时钟信号操作的所述数据处理模块的操作同步地访问所述存储器的时钟信号。

28. 发明申请

US20100060621A1 SOURCE DRIVER DEVICE AND DISPLAY DEVICE HAVING THE SAME 审中-公开
标题翻译：源驱动器件和具有该器件的显示器件
公开(公告)号：US20100060621A1
公开(公告)日：2010-03-11
申请号：US12208033
申请日：2008-09-10
申请人： Chuan-Chien Hsu
发明人： Chuan-Chien Hsu
IPC分类号： G09G5/00 , G09G3/36
CPC分类号： G09G5/06 , G09G3/2092 , G09G3/3685 , G09G2310/027 , G09G2320/0276 , G09G2360/128
摘要： A source driver device for driving a display panel includes a gamma voltage generator having a storage element and a plurality of gamma digital-to-analog converters, a data digital-to-analog converter coupled to the gamma voltage generator, and a receiver for receiving input display data from a data bus, for parsing the input display data to transmit generated display data to the data digital-to-analog converter, and for transmitting a plurality of gamma data signals to the storage element, wherein each of the plurality of gamma digital-to-analog converters receive the plurality of gamma data signals from the storage element for generating a plurality of reference voltage signals based on the corresponding gamma data signals, and wherein the data digital-to-analog converter is coupled to the receiver to receive the generated display data, according to the generated plurality of reference voltage signals generated from the gamma digital-to-analog converters, and to generate a driving voltage signal based on the generated display data for driving the display panel.
摘要翻译：用于驱动显示面板的源极驱动器装置包括具有存储元件和多个伽马数模转换器的伽马电压发生器，耦合到伽马电压发生器的数据数模转换器和用于接收的接收器从数据总线输入显示数据，用于解析输入显示数据以将生成的显示数据发送到数据数模转换器，以及将多个伽马数据信号发送到存储元件，其中多个伽马数模转换器从存储元件接收多个伽马数据信号，用于基于相应的伽马数据信号产生多个参考电压信号，并且其中数据数/模转换器耦合到接收器以接收所生成的显示数据根据从伽马数模转换器产生的所生成的多个参考电压信号，并产生驱动vo 基于生成的用于驱动显示面板的显示数据的信号。

29. 发明申请

US20100020069A1 PARTITIONING-BASED PERFORMANCE ANALYSIS FOR GRAPHICS IMAGING 审中-公开
标题翻译：用于图形成像的基于分割的性能分析
公开(公告)号：US20100020069A1
公开(公告)日：2010-01-28
申请号：US12507767
申请日：2009-07-22
申请人： BABACK ELMIEH , James P. Ritts , Angus Dorbie
发明人： BABACK ELMIEH , James P. Ritts , Angus Dorbie
IPC分类号： G06T15/00 , G09G5/00
CPC分类号： G09G5/363 , G06F3/1454 , G06T15/00 , G09G3/003 , G09G2360/12 , G09G2360/128
摘要： In general, this disclosure relates to techniques for providing a visual representation of a graphical scene that includes a number of different graphical partitions, which may allow a user to identify portions of the graphics scene that exhibit reduced performance due to costs associated with screen partitioning. One example device includes a display device and one or more processors. The one or more processors are configured to display one or more graphics images in a graphical scene on the display device, display a graphical representation of partitions that overlay the one or more graphics images and that graphically divide the scene on the display device, and analyze graphics data for the one or more graphics images to determine which portions of the graphics data are associated with multiple ones of the partitions.
摘要翻译：通常，本公开涉及用于提供包括多个不同图形分区的图形场景的视觉表示的技术，其可以允许用户识别由于与屏幕分割相关联的成本而表现出降低的性能的图形场景的部分。一个示例性设备包括显示设备和一个或多个处理器。一个或多个处理器被配置为在显示设备上的图形场景中显示一个或多个图形图像，显示覆盖一个或多个图形图像的分区的图形表示，并且在显示设备上图形地划分场景，并且分析用于一个或多个图形图像的图形数据，以确定图形数据的哪些部分与多个分区相关联。

30. 发明授权

US07605899B2 Electrophoretic dispersion liquid and electrophoretic display device 失效
标题翻译：电泳色散液和电泳显示装置
公开(公告)号：US07605899B2
公开(公告)日：2009-10-20
申请号：US10552590
申请日：2004-12-03
申请人： Noriyuki Shikina , Hideo Mori , Hideki Yoshinaga , Tatsuhito Goden
发明人： Noriyuki Shikina , Hideo Mori , Hideki Yoshinaga , Tatsuhito Goden
IPC分类号： G02F1/1345 , G02B26/00 , G09G3/18
CPC分类号： G09G3/344 , G06F3/0412 , G09G3/3648 , G09G2300/08 , G09G2310/0267 , G09G2310/04 , G09G2310/06 , G09G2320/0252 , G09G2360/128
摘要： A display apparatus includes a display panel including pixels arranged in a matrix, pixel electrodes provided to the pixels, respectively, a common electrode provided commonly to the pixels, and scanning lines and signal lines for supplying a voltage to the pixel electrodes. In addition, a drive circuit is connected to the common electrode, the scanning lines, and the signal lines, and a control circuit provides a signal to the drive circuit. The control circuit selectively switches between a display drive mode in which an image is displayed on the display panel through sequential scanning of the scanning lines and application of a variable voltage to pixels via the signal lines by the drive circuit and a rewriting drive mode in which selected pixels are rewritten into black or white through application of a voltage, which is higher than a range of the variable voltage, to the selected pixels on a scanning line selected by the drive circuit.
摘要翻译：显示装置包括：显示面板，包括以矩阵形式排列的像素，分别设置在像素上的像素电极，与像素共同设置的公共电极，以及用于向像素电极提供电压的扫描线和信号线。此外，驱动电路连接到公共电极，扫描线和信号线，并且控制电路向驱动电路提供信号。控制电路通过扫描线的顺序扫描和通过驱动电路经由信号线向像素施加可变电压，在显示面板上显示图像的显示驱动模式和重写驱动模式之间选择性地切换，其中，通过对由驱动电路选择的扫描线上的所选像素施加比可变电压的范围高的电压，所选择的像素被重写为黑色或白色。

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