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    • 21. 发明授权
      US06887353B1 Tailored barrier layer which provides improved copper interconnect electromigration resistance 失效
    • Tailored barrier layer which provides improved copper interconnect electromigration resistance
    • US06887353B1
    • 2005-05-03
    • US08995108
    • 1997-12-19
    • Peijun Ding , Tony Chiang , Barry L. Chin
    • Peijun Ding , Tony Chiang , Barry L. Chin
    • H01L23/52 , H01L21/3205 , H01L21/768 , H01L23/532 , C23C14/00 , C23C14/32 , H01L21/44
    • H01L21/76843 , H01L23/53233 , H01L23/53238 , H01L2924/0002 , H01L2924/00
    • Disclosed herein is a barrier layer structure useful in forming copper interconnects and electrical contacts of semiconductor devices. The barrier layer structure comprises a first layer of TaNx which is applied directly over the substrate, followed by a second layer of Ta. The TaNx/Ta barrier layer structure provides both a barrier to the diffusion of a copper layer deposited thereover, and enables the formation of a copper layer having a high crystallographic content so that the electromigration resistance of the copper is increased. The TaNx layer, where x ranges from about 0.1 to about 1.5, is sufficiently amorphous to prevent the diffusion of copper into the underlying substrate, which is typically silicon or a dielectric such as silicon dioxide. The thickness of the TaNx and Ta layers used for an interconnect depend on the feature size and aspect ratio; typically, the TaNx layer thickness ranges from about 50 Å to about 1,000 Å, while the Ta layer thickness ranges from about 20 Å to about 500 Å. For a contact via, the permissible layer thickness on the via walls must be even more carefully controlled based on feature size and aspect ratio; typically, the TaNx layer thickness ranges from about 10 Å to about 300 Å, while the Ta layer thickness ranges from about 5 Å to about 300 Å. The copper layer is deposited at the thickness desired to suit the needs of the device. The copper layer may be deposited using any of the preferred techniques known in the art. Preferably, the entire copper layer, or at least a “seed” layer of copper, is deposited using physical vapor deposition techniques such as sputtering or evaporation, as opposed to CVD or electroplating. Since the crystal orientation of the copper is sensitive to deposition temperature, and since the copper may tend to dewet/delaminate from the barrier layer if the temperature is too high, it is important that the copper be deposited and/or annealed at a temperature of less than about 500° C., and preferably at a temperature of less than about 300° C.
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Espacenet 法律信息 同族专利 专利引用
    • 22. 发明授权
      US06184137B2 Structure and method for improving low temperature copper reflow in semiconductor features 失效
    • Structure and method for improving low temperature copper reflow in semiconductor features
    • 用于改善半导体特性中低温铜回流的结构和方法
    • US06184137B2
    • 2001-02-06
    • US09199965
    • 1998-11-25
    • Peijun Ding , Imran Hashim , Barry L. Chin
    • Peijun Ding , Imran Hashim , Barry L. Chin
    • H01L21302
    • H01L21/76877 , H01L23/53233 , H01L23/53238 , H01L2924/0002 , H01L2924/00
    • We have discovered that complete copper filling of semiconductor features such as trenches and vias, without the formation of trapped voids, can be accomplished using a copper reflow process when the unfilled portion of the feature structure prior to reflow comprises a capillary within the feature, wherein the volume of the capillary represents between about 20% and about 90%, preferably between about 20% and about 75% of the original feature volume prior to filling with copper. The aspect ratio of the capillary is preferably at least 1.5. The maximum opening dimension of the capillary is less than about 0.8 &mgr;m. The preferred substrate temperature during the reflow process includes it either a soak at an individual temperature or a temperature ramp-up or ramp-down where the substrate experiences a temperature within a range from about 300° C. to about 600° C., more preferably between about 300° C. and about 450° C. By controlling the percentage of the volume of the feature which is unfilled at the time of the reflow process and taking advantage of the surface tension and capillary action when the aspect ratio of the feature is at least 1.5, the copper fill material is easily pulled into the feature which comprises the capillary without the formation of voids along the walls of the feature. The preferred method of application of the last layer of copper prior to reflow (the layer of copper which produces the unfilled capillary within the feature) is electroplating, although CVD or evaporation or other conformal layer formation techniques may be used.
    • 我们已经发现，当回流焊之前的特征结构的未填充部分包括该特征内的毛细管时，可以使用铜回流工艺来实现半导体特征如沟槽和通孔的完全铜填充，例如沟槽和通孔，而不形成截留的空隙，其中 在填充铜之前，毛细管的体积代表原始特征体积的约20％至约90％，优选约20％至约75％。 毛细管的纵横比优选为1.5以上。 毛细管的最大开口尺寸小于约0.8μm。 在回流工艺期间优选的衬底温度包括其在单独温度下浸泡或温度升高或斜坡下降，其中衬底经历在约300℃至约600℃的温度范围内的温度，更多 优选在约300℃至约450℃之间。通过控制在回流过程时未填充的特征的体积百分比，并利用特征的纵横比来利用表面张力和毛细作用 至少为1.5，铜填充材料容易地被拉入包括毛细管的特征，而不沿着特征的壁形成空隙。 在回流之前施加最后一层铜的优选方法（在特征内产生未填充的毛细管的铜层）是电镀，尽管可以使用CVD或蒸发或其它共形层形成技术。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Espacenet 法律信息 同族专利 专利引用
    • 23. 发明授权
      US06352926B1 Structure for improving low temperature copper reflow in semiconductor features 失效
    • Structure for improving low temperature copper reflow in semiconductor features
    • 用于改善半导体特性中低温铜回流的结构
    • US06352926B1
    • 2002-03-05
    • US09709991
    • 2000-11-10
    • Peijun Ding , Imran Hashim , Barry L. Chin
    • Peijun Ding , Imran Hashim , Barry L. Chin
    • H01L2144
    • H01L21/76877 , H01L23/53233 , H01L23/53238 , H01L2924/0002 , H01L2924/00
    • We have discovered that complete copper filling of semiconductor features such as trenches and vias, without the formation of trapped voids, can be accomplished using a copper reflow process when the unfilled portion of the feature structure prior to reflow comprises a capillary within the feature, wherein the volume of the capillary represents between about 20% and about 90%, preferably between about 20% and about 75% of the original feature volume prior to filling with copper. The aspect ratio of the capillary is preferably at least 1.5. The maximum opening dimension of the capillary is less than about 0.8 &mgr;m. The preferred substrate temperature during the reflow process includes either a soak at an individual temperature or a temperature ramp-up or ramp-down where the substrate experiences a temperature within a range from about 300° C. to about 600° C., more preferably between about 300° C. and about 450° C. By controlling the percentage of the volume of the feature which is unfilled at the time of the reflow process and taking advantage of the surface tension and capillary action when the aspect ratio of the feature is at least 1.5, the copper fill material is easily pulled into the feature which comprises the capillary without the formation of voids along the walls of the feature. The preferred method of application of the last layer of copper prior to reflow (the layer of copper which produces the unfilled capillary within the feature) is electroplating, although CVD or evaporation or other conformal layer formation techniques may be used.
    • 我们已经发现，当回流焊之前的特征结构的未填充部分包括该特征内的毛细管时，可以使用铜回流工艺来实现半导体特征如沟槽和通孔的完全铜填充，例如沟槽和通孔，而不形成截留的空隙，其中 在填充铜之前，毛细管的体积代表原始特征体积的约20％至约90％，优选约20％至约75％。 毛细管的纵横比优选为1.5以上。 毛细管的最大开口尺寸小于约0.8μm。 在回流过程中优选的衬底温度包括在单独温度下浸泡或温度升高或斜坡下降，其中衬底经历温度在约300℃至约600℃的范围内，更优选地 在约300℃和约450℃之间。通过控制在回流工艺时未填充的特征的体积百分比，并且当特征的纵横比为 至少1.5，铜填充材料容易地被拉入包括毛细管的特征，而不沿着特征的壁形成空隙。 在回流之前施加最后一层铜的优选方法（在特征内产生未填充的毛细管的铜层）是电镀，尽管可以使用CVD或蒸发或其它共形层形成技术。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Espacenet 法律信息 同族专利 专利引用
    • 29. 发明授权
      US07892602B2 Cyclical deposition of refractory metal silicon nitride 有权
    • Cyclical deposition of refractory metal silicon nitride
    • 难熔金属氮化硅的循环沉积
    • US07892602B2
    • 2011-02-22
    • US11422826
    • 2006-06-07
    • Hua Chung , Ling Chen , Barry L. Chin
    • Hua Chung , Ling Chen , Barry L. Chin
    • C23C16/34
    • C23C16/45531 , C23C16/34 , H01L21/28562 , H01L21/76843
    • Methods for depositing a metal silicon nitride layer on a substrate during an atomic layer deposition (ALD) process. The methods provide positioning a substrate within a process chamber containing a centralized expanding channel that conically tapers towards and substantially covers the substrate, flowing a process gas into the centralized expanding channel to form a circular flow pattern, exposing the substrate to the process gas having the circular flow pattern, and exposing the substrate sequentially to chemical precursors during an ALD process to form a metal silicon nitride material. In one example, the ALD process provides sequentially pulsing a metal precursor, a nitrogen precursor, and a silicon precursor into the process gas having the circular flow pattern. The metal silicon nitride material may contain tantalum or titanium. In other examples, the process gas or the substrate may be exposed to a plasma.
    • 在原子层沉积（ALD）工艺中在衬底上沉积金属氮化硅层的方法。 该方法提供了将处理室中的衬底定位在处理室内，该处理室包含集中的扩展通道，该通道朝向并基本上覆盖衬底呈锥形锥形，将工艺气体流入集中扩展通道以形成圆形流动图案，将衬底暴露于具有 圆形流动图案，并且在ALD工艺期间将衬底依次暴露于化学前体以形成金属氮化硅材料。 在一个实例中，ALD工艺顺序地将金属前体，氮前体和硅前体顺序地引入到具有圆形流动图案的工艺气体中。 金属氮化硅材料可以包含钽或钛。 在其它实例中，工艺气体或衬底可以暴露于等离子体。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Espacenet 法律信息 同族专利 专利引用
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