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    • 23. 发明授权
    • Method of testing an address multiplexed dynamic RAM
    • 测试地址多路复用动态RAM的方法
    • US5467314A
    • 1995-11-14
    • US277430
    • 1994-07-18
    • Kazuyuki MiyazawaKatsuhiro ShimohigashiJun EtohKatsutaka Kimura
    • Kazuyuki MiyazawaKatsuhiro ShimohigashiJun EtohKatsutaka Kimura
    • G11C11/401G01R31/317G11C29/00G11C29/14G11C29/46G11C7/00
    • G11C29/46G01R31/31701
    • In an address multiplexed dynamic random access memory (RAM) which has both a normal operation mode and a test mode capability, the test mode is initiated in response to particular signal level combinations of both the row address strobe (RAS) and column address strobe (CAS) signals and the write enable (WE) signal. Since the signal level combinations employed in connection with implementing the test mode are unused in the normal operating mode of the dynamic RAM, additional external terminals are unneeded. This dynamic RAM employs multiplexing circuitry on both the input side as well as on the output side of the dynamic RAM, which multiplexing circuitry is controlled during normal operation by select signals from a decoder and during the test mode by a test signal which allows accessing of data at all of the common complementary data lines by the testing circuitry so as to determine whether there is consistency or inconsistency of the data being read out for testing.
    • 在具有正常操作模式和测试模式能力的地址多路复用动态随机存取存储器(RAM)中,测试模式是响应于行地址选通(& Upbar&R)和列地址选通 (&upbar&C)信号和写使能(&upbar&W)信号。 由于在动态RAM的正常操作模式中不使用与实现测试模式相关的信号电平组合,因此不需要额外的外部终端。 该动态RAM在动态RAM的输入侧和输出侧都采用多路复用电路,该复用电路在正常操作期间通过来自解码器的选择信号以及在测试模式期间通过允许访问的测试信号 通过测试电路在所有公共补充数据线上的数据,以便确定正在读出的用于测试的数据是否一致或不一致。