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21. 发明申请

US20080170488A1 METHOD AND DEVICE FOR NON-DESTRUCTIVE READING FOR A FERROELECTRIC-MATERIAL STORAGE MEDIA 审中-公开
标题翻译：用于非电解材料存储介质的非破坏性读取的方法和装置
公开(公告)号：US20080170488A1
公开(公告)日：2008-07-17
申请号：US12013015
申请日：2008-01-11
申请人： Maurizio Zuffada , Michele Fedeli , Guido Gabriele Albasini , Matteo Rossi
发明人： Maurizio Zuffada , Michele Fedeli , Guido Gabriele Albasini , Matteo Rossi
IPC分类号： G11B9/00
CPC分类号： G11B9/02
摘要： A method for non-destructive reading of a datum stored in a ferroelectric material in a stable state of polarization, the method including applying a read electrical quantity to the ferroelectric material having a value such as not to cause a variation in the stable state of polarization thereof, generating an output quantity indicative of a polarization charge variation occurring in the ferroelectric material during application of the read electrical quantity, and determining the value of the stored datum based on the output quantity. In particular, the polarization charge variation is given by a difference between a first value assumed by the polarization charge in the stable state of the ferroelectric material and a second value assumed by the polarization charge during application of the read electrical quantity.
摘要翻译：一种用于以稳定的极化状态存储在铁电材料中的基准的非破坏性读取的方法，所述方法包括对具有不导致稳定极化状态变化的值的铁电体材料施加读取电量在施加所述读取的电量期间产生表示在所述铁电材料中发生的极化电荷变化的输出量，以及基于所述输出量确定所存储的数据的值。特别地，极化电荷变化由在强电介质材料的稳定状态下由极化电荷假定的第一值与在读取电量施加期间由极化电荷假设的第二值之间的差给出。

22. 发明授权

US5034706A Voltage-controlled variable oscillator, in particular for phase-lock loops 失效
标题翻译：电压控制可变振荡器，特别是用于锁相环
公开(公告)号：US5034706A
公开(公告)日：1991-07-23
申请号：US559799
申请日：1990-07-30
申请人： Giorgio Betti , Maurizio Zuffada
发明人： Giorgio Betti , Maurizio Zuffada
IPC分类号： H03L7/099 , H03B5/12
CPC分类号： H03B5/1231 , H03B5/1209 , H03B5/1215 , H03B5/1221 , H03B5/1243 , H03B2200/0062
摘要： A voltage-controlled variable oscillator, in particular for phase-lock loops, comprising a differential stage formed by a pair of transistors and collectors whereof define the output terminals between which an external resonating circuit is connected, a voltage generator which is connected between the two output terminals and is suitable for generating a voltage which is proportional to the terminal voltage which exists across the resonating circuit, and a pair of capacitors connected between a respective output terminal and the voltage source.

23. 发明申请

US20130308893A1 INTEGRATED DRIVER AND RELATED METHOD 有权
标题翻译：集成驱动器及相关方法
公开(公告)号：US20130308893A1
公开(公告)日：2013-11-21
申请号：US13989488
申请日：2011-12-01
申请人： Maurizio Zuffada , Massimo Pozzoni , Angelo Contini
发明人： Maurizio Zuffada , Massimo Pozzoni , Angelo Contini
IPC分类号： H03F3/217 , H03F3/45 , G02F1/01 , H03F1/22
CPC分类号： G02F1/0121 , G02B6/1225 , G02B2006/12142 , G02B2006/12145 , G02F1/0327 , G02F1/225 , G02F2001/212 , H03F1/22 , H03F1/223 , H03F3/2171 , H03F3/245 , H03F3/3001 , H03F3/45076 , H03F3/45179 , H03F2200/45 , H03F2200/516 , H03F2203/30099 , H03F2203/30132 , H03K19/018528 , H04B10/532 , H04B10/616
摘要： A driver circuit may include a first node (VA), and a first circuit to generate on the first node (VA) an inverted replica of an input signal (VIN) during driver switching between a first supply voltage (Vdd1) and ground, the inverted replica having a threshold voltage value based upon a reference voltage (Vref) greater than the first supply voltage (Vdd1). The driver circuit may include a cascode stage (M3) to be controlled by the reference voltage (Vref) and to be coupled between a second supply voltage (Vdd2) and the first node, a delay circuit (D) to generate a delayed replica of the input signal (VIN), an amplifier, and a switching network (M5, M6) to couple a control terminal of an active load transistor (M9) either to one of the reference voltage (Vref) or to ground, based upon the input signal (VIN).
摘要翻译：驱动器电路可以包括第一节点（VA）和第一电路，用于在第一电源电压（Vdd1）和地之间的驱动器切换期间在第一节点（VA）上产生输入信号（VIN）的反相副本，反转副本具有基于大于第一电源电压（Vdd1）的参考电压（Vref）的阈值电压值。驱动器电路可以包括由参考电压（Vref）控制并耦合在第二电源电压（Vdd2）和第一节点之间的共源共栅级（M3），延迟电路（D）以产生延迟复制输入信号（VIN），放大器和开关网络（M5，M6），用于将有源负载晶体管（M9）的控制端子耦合到参考电压（Vref）中的一个或接地，基于输入信号（VIN）。

24. 发明授权

US08253473B2 Integrated circuit of an integrator with enhanced stability and related stabilization method 有权
标题翻译：具有增强稳定性和相关稳定方法的积分器集成电路
公开(公告)号：US08253473B2
公开(公告)日：2012-08-28
申请号：US12893908
申请日：2010-09-29
申请人： Maurizio Zuffada , Massimo Pozzoni
发明人： Maurizio Zuffada , Massimo Pozzoni
IPC分类号： G06F7/64 , G06G7/18 , G06G7/19
CPC分类号： H03H11/0422 , Y10T29/49124
摘要： An integrated circuit integrator includes a first transconductance amplifier having a gain adjustable based upon a first control signal, and receives, as an input, a signal to be filtered, and generates, as an output, a corresponding amplified signal. The first transconductance amplifier includes an R-C output circuit to filter components from the amplified signal, and an output resistance being adjustable based upon a second control signal. A second transconductance amplifier is matched with the first transconductance amplifier, and has a gain adjustable based upon the first control signal, and a matched output resistance adjustable based upon the second control signal. A circuit is configured to force a reference current through the matched output resistance. An error correction circuit is coupled to the second transconductance amplifier and is configured to generate the second control signal so as to keep constant a voltage on an output of the second transconductance amplifier.
摘要翻译：集成电路积分器包括具有基于第一控制信号可调节的增益的第一跨导放大器，并且接收要被滤波的信号作为输入，并产生相应的放大信号作为输出。第一跨导放大器包括R-C输出电路，用于根据放大的信号对分量进行滤波，并且输出电阻可根据第二控制信号进行调节。第二跨导放大器与第一跨导放大器匹配，并且具有基于第一控制信号可调节的增益，以及基于第二控制信号可调整的匹配输出电阻。电路被配置为迫使参考电流通过匹配的输出电阻。误差校正电路耦合到第二跨导放大器，并且被配置为产生第二控制信号，以便使第二跨导放大器的输出上的电压保持恒定。

25. 发明授权

US5065240A Method and device for automatically selecting the demodulation standard of a video signal, useful with an intermediate frequency demodulator 失效
标题翻译：用于自动选择视频信号的解调标准的方法和装置，可用于中间频率解调器
公开(公告)号：US5065240A
公开(公告)日：1991-11-12
申请号：US281017
申请日：1988-12-06
申请人： Maurizio Zuffada , Fabrizio Sacchi
发明人： Maurizio Zuffada , Fabrizio Sacchi
IPC分类号： H04N5/46
CPC分类号： H04N5/46
摘要： A method, and related device, for automatically selecting the demodulation standard of a video signal, useful with an intermediate frequency demodulator, which has an output for the demodulated signal and a so-called standard selecting input pin, consists of detecting the polarity of the demodulated signal at the output of the demodulator and comparing that polarity with the polarity of the input signal to the demodulator. The voltage value on the standard selecting pin is changed over on detecting a different modulation polarity between the input and output video signals to/from the demodulator to enable the latter to operate to the correct standard at all times.
摘要翻译：用于自动选择具有用于解调信号的输出的中频解调器和所谓的标准选择输入引脚的视频信号的解调标准的方法和相关装置包括检测在解调器的输出处解调信号，并将该极性与输入信号的极性相比较，将其与解调器进行比较。在检测与解调器之间的输入和输出视频信号之间的不同调制极性时，标准选择引脚上的电压值被切换，以使其能够始终以正确的标准运行。

26. 发明授权

US09099965B2 Integrated driver and related method 有权
标题翻译：集成驱动及相关方法
公开(公告)号：US09099965B2
公开(公告)日：2015-08-04
申请号：US13989488
申请日：2011-12-01
申请人： Maurizio Zuffada , Massimo Pozzoni , Angelo Contini
发明人： Maurizio Zuffada , Massimo Pozzoni , Angelo Contini
IPC分类号： G02B6/00 , G02F1/01 , H03F1/22 , H03F3/217 , H03F3/24 , H03F3/30 , H03F3/45 , H03K19/0185 , H04B10/532 , H04B10/61 , G02F1/03 , G02F1/225
CPC分类号： G02F1/0121 , G02B6/1225 , G02B2006/12142 , G02B2006/12145 , G02F1/0327 , G02F1/225 , G02F2001/212 , H03F1/22 , H03F1/223 , H03F3/2171 , H03F3/245 , H03F3/3001 , H03F3/45076 , H03F3/45179 , H03F2200/45 , H03F2200/516 , H03F2203/30099 , H03F2203/30132 , H03K19/018528 , H04B10/532 , H04B10/616
摘要： A driver circuit may include a first node (VA), and a first circuit to generate on the first node (VA) an inverted replica of an input signal (VIN) during driver switching between a first supply voltage (Vdd1) and ground, the inverted replica having a threshold voltage value based upon a reference voltage (Vref) greater than the first supply voltage (Vdd1). The driver circuit may include a cascode stage (M3) to be controlled by the reference voltage (Vref) and to be coupled between a second supply voltage (Vdd2) and the first node, a delay circuit (D) to generate a delayed replica of the input signal (VIN), an amplifier, and a switching network (M5, M6) to couple a control terminal of an active load transistor (M9) either to one of the reference voltage (Vref) or to ground, based upon the input signal (VIN).
摘要翻译：驱动器电路可以包括第一节点（VA）和第一电路，用于在第一电源电压（Vdd1）和地之间的驱动器切换期间在第一节点（VA）上产生输入信号（VIN）的反相副本，反转副本具有基于大于第一电源电压（Vdd1）的参考电压（Vref）的阈值电压值。驱动器电路可以包括由参考电压（Vref）控制并耦合在第二电源电压（Vdd2）和第一节点之间的共源共栅级（M3），延迟电路（D）以产生延迟复制输入信号（VIN），放大器和开关网络（M5，M6），用于将有源负载晶体管（M9）的控制端子耦合到参考电压（Vref）中的一个或接地，基于输入信号（VIN）。

27. 发明授权

US08373488B2 Integrated circuit of an integrator with enhanced stability and related stabilization method 有权
标题翻译：具有增强稳定性和相关稳定方法的积分器集成电路
公开(公告)号：US08373488B2
公开(公告)日：2013-02-12
申请号：US13561355
申请日：2012-07-30
申请人： Maurizio Zuffada , Massimo Pozzoni
发明人： Maurizio Zuffada , Massimo Pozzoni
IPC分类号： G06F7/64 , G06G7/18 , G06G7/19
CPC分类号： H03H11/0422 , Y10T29/49124
摘要： An integrated circuit integrator includes a first transconductance amplifier having a gain adjustable based upon a first control signal, and receives, as an input, a signal to be filtered, and generates, as an output, a corresponding amplified signal. The first transconductance amplifier includes an R-C output circuit to filter components from the amplified signal, and an output resistance being adjustable based upon a second control signal. A second transconductance amplifier is matched with the first transconductance amplifier, and has a gain adjustable based upon the first control signal, and a matched output resistance adjustable based upon the second control signal. A circuit is configured to force a reference current through the matched output resistance. An error correction circuit is coupled to the second transconductance amplifier and is configured to generate the second control signal so as to keep constant a voltage on an output of the second transconductance amplifier.
摘要翻译：集成电路积分器包括具有基于第一控制信号可调节的增益的第一跨导放大器，并且接收要被滤波的信号作为输入，并产生相应的放大信号作为输出。第一跨导放大器包括R-C输出电路，用于根据放大的信号对分量进行滤波，并且输出电阻可根据第二控制信号进行调节。第二跨导放大器与第一跨导放大器匹配，并且具有基于第一控制信号可调节的增益，以及基于第二控制信号可调整的匹配输出电阻。电路被配置为迫使参考电流通过匹配的输出电阻。误差校正电路耦合到第二跨导放大器，并且被配置为产生第二控制信号，以便使第二跨导放大器的输出上的电压保持恒定。

28. 发明授权

US07826246B2 Reading circuit and method in a data-storage system 有权
标题翻译：数据存储系统中的读取电路和方法
公开(公告)号：US07826246B2
公开(公告)日：2010-11-02
申请号：US12008976
申请日：2008-01-14
申请人： Guido Albasini , Michele Fedeli , Mattia Introini , Maurizio Zuffada
发明人： Guido Albasini , Michele Fedeli , Mattia Introini , Maurizio Zuffada
IPC分类号： G11C11/24 , G11C7/00 , G11C7/02
CPC分类号： G11B9/02 , G11C7/067 , G11C11/22
摘要： A reading circuit for reading a datum stored in a storage material. In the reading circuit, a generating stage generates a read electrical quantity to be applied to the storage material, and a sensing stage is configured to generate an output electrical quantity that is indicative of a charge variation associated to the datum stored, and that occurs in the storage material due to application of the read electrical quantity; in particular, the sensing stage uses a charge-sensing amplifier electrically connected to the storage material.
摘要翻译：一种用于读取存储在存储材料中的基准的读取电路。在读取电路中，生成级产生要施加到存储材料的读取电量，并且感测级被配置为产生指示与存储的数据相关联的电荷变化的输出电量，并且发生在由于应用读取的电量而导致的存储材料; 特别地，感测级使用与存储材料电连接的电荷感测放大器。

29. 发明申请

US20090040806A1 Reading circuit and method in a data-storage system 有权
标题翻译：数据存储系统中的读取电路和方法
公开(公告)号：US20090040806A1
公开(公告)日：2009-02-12
申请号：US12008976
申请日：2008-01-14
申请人： Guido Albasini , Michele Fedeli , Mattia Introini , Maurizio Zuffada
发明人： Guido Albasini , Michele Fedeli , Mattia Introini , Maurizio Zuffada
IPC分类号： G11C7/06 , G11C11/22
CPC分类号： G11B9/02 , G11C7/067 , G11C11/22
摘要： A reading circuit for reading a datum stored in a storage material. In the reading circuit, a generating stage generates a read electrical quantity to be applied to the storage material, and a sensing stage is configured to generate an output electrical quantity that is indicative of a charge variation associated to the datum stored, and that occurs in the storage material due to application of the read electrical quantity; in particular, the sensing stage uses a charge-sensing amplifier electrically connected to the storage material.
摘要翻译：一种用于读取存储在存储材料中的基准的读取电路。在读取电路中，生成级产生要施加到存储材料的读取电量，并且感测级被配置为产生指示与存储的数据相关联的电荷变化的输出电量，并且发生在由于应用读取的电量而导致的存储材料; 特别地，感测级使用与存储材料电连接的电荷感测放大器。

30. 发明授权

US06777998B2 Integrated electronic circuit including non-linear devices 有权
标题翻译：集成电子电路包括非线性器件
公开(公告)号：US06777998B2
公开(公告)日：2004-08-17
申请号：US10216562
申请日：2002-08-09
申请人： Maurizio Zuffada , Giorgio Betti , Francesco Chrappan Soldavini , Martin Aureliano Hassner
发明人： Maurizio Zuffada , Giorgio Betti , Francesco Chrappan Soldavini , Martin Aureliano Hassner
IPC分类号： G06F764
CPC分类号： H03H11/481
摘要： An integrated electronic circuit includes a plurality of active circuits connected together in cascade. A feedback loop is between an output of a last active circuit and an input of a first active circuit so that the plurality of active devices function as a non-linear device, such as a capacitor. The integrated electronic circuit may be integrated or used in association with a circuit network including other non-linear devices.
摘要翻译：集成电子电路包括级联连接在一起的多个有源电路。反馈回路在最后一个有效电路的输出和第一有源电路的输入之间，使得多个有源器件用作诸如电容器之类的非线性器件。集成电子电路可以与包括其他非线性装置的电路网络相关联地集成或使用。

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