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21. 发明申请

US20120305880A1 RESISTIVE RANDOM ACCESS MEMORY WITH ELECTRIC-FIELD STRENGTHENED LAYER AND MANUFACTURING METHOD THEREOF 有权
标题翻译：具有电场强化层的电阻随机存取存储器及其制造方法
公开(公告)号：US20120305880A1
公开(公告)日：2012-12-06
申请号：US13457035
申请日：2012-04-26
申请人： Wei Zhang , Lin Chen , Peng Zhou , Qingqing Sun , Pengfei Wang
发明人： Wei Zhang , Lin Chen , Peng Zhou , Qingqing Sun , Pengfei Wang
IPC分类号： H01L45/00
CPC分类号： G11C13/0007 , G11C2213/55 , H01L27/2436 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1616
摘要： This invention belongs to the technical field of memories and specifically relates to a resistive random access memory structure with an electric-field strengthened layer and a manufacturing method thereof. The resistive random access memory in the present invention can include a top electrode, a bottom electrode and a composite layer which is placed between the top electrode and the bottom electrode and have a first resistive switching layer and a second resistive switching and electric-field strengthened layer; the second resistive switching and electric-field strengthened layer cab be adjacent to the first resistive switching layer and have a dielectric constant lower than that of the first resistive switching layer. The electric-field distribution in the RRAM unit is adjustable.
摘要翻译：本发明属于存储器的技术领域，具体涉及一种具有电场强化层的电阻随机存取存储器结构及其制造方法。本发明的电阻式随机存取存储器可以包括顶电极，底电极和复合层，它放置在顶电极和底电极之间，并具有第一电阻开关层和第二电阻开关和电场强化层; 第二电阻开关和电场强化层驾驶室与第一电阻式开关层相邻，其介电常数低于第一电阻式开关层的介电常数。 RRAM单元中的电场分布是可调的。

22. 发明授权

US08994095B2 Semiconductor memory device with a buried drain and its memory array 有权
标题翻译：具有埋地漏极及其存储器阵列的半导体存储器件
公开(公告)号：US08994095B2
公开(公告)日：2015-03-31
申请号：US13322640
申请日：2010-12-24
申请人： Pengfei Wang , Qingqing Sun , Shijin Ding , Wei Zhang
发明人： Pengfei Wang , Qingqing Sun , Shijin Ding , Wei Zhang
IPC分类号： H01L29/792 , H01L21/28 , H01L27/115
CPC分类号： H01L21/28273 , H01L27/11521
摘要： A semiconductor memory device with a buried drain is provided. The device comprises a semiconductor substrate (107); one drain region (108) of a first doping type; two source regions (101a, 101b) of a second doping type; and a stacked gate provided on the semiconductor substrate for capturing electrons. A memory array formed by a plurality of semiconductor memory devices and a manufacturing method thereof are also provided. The semiconductor memory device has the advantages of small cell area, simple manufacturing process and the like. The manufacturing cost of the memory device is reduced and the storing density of the memory device is increased.
摘要翻译：提供了一种具有埋地漏极的半导体存储器件。该器件包括半导体衬底（107）; 一个第一掺杂类型的漏极区域（108）; 具有第二掺杂类型的两个源极区域（101a，101b）以及设置在半导体基板上用于捕获电子的堆叠栅极。还提供了由多个半导体存储器件形成的存储器阵列及其制造方法。半导体存储器件具有电池面积小，制造工艺简单等优点。存储器件的制造成本降低，并且存储器件的存储密度增加。

23. 发明申请

US20130178014A1 METHOD FOR MANUFACTURING A GATE-CONTROL DIODE SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：制造门控二极管半导体存储器件的方法
公开(公告)号：US20130178014A1
公开(公告)日：2013-07-11
申请号：US13535032
申请日：2012-06-27
申请人： Pengfei Wang , Xiaoyong Liu , Qingqing Sun , Wei Zhang
发明人： Pengfei Wang , Xiaoyong Liu , Qingqing Sun , Wei Zhang
IPC分类号： H01L21/441
CPC分类号： H01L29/7391 , H01L29/8616
摘要： This invention belongs to semiconductor device manufacturing field and discloses a method for manufacturing a gate-control diode semiconductor storage device. When the floating gate voltage is relatively high, the channel under the floating gate is of n type and a simple gate-control pn junction structure is configured; by controlling effective n-type concentration of the ZnO film through back-gate control, inverting the n-type ZnO into p-type through a floating gate and using NiO as a p-type semiconductor, an n-p-n-p doping structure is formed while the quantity of charges in the floating gate determines the device threshold voltage, thus realizing memory functions. This invention features capacity of manufacturing gate-control diode memory devices able to reduce the chip power consumption through advantages of high driving current and small sub-threshold swing. This invention is applicable to semiconductor devices manufacturing based on flexible substrate and flat panel displays and floating gate memories, etc.
摘要翻译：本发明属于半导体器件制造领域，并且公开了一种用于制造栅极控制二极管半导体存储器件的方法。当浮动栅极电压相对较高时，浮动栅极下的沟道为n型，并配置了简单的栅极控制pn结结构; 通过背栅控制来控制ZnO膜的有效n型浓度，通过浮栅将n型ZnO反向为p型，并使用NiO作为p型半导体，形成npnp掺杂结构，浮动门中的电荷决定了器件的阈值电压，从而实现了存储器的功能。本发明具有制造栅极控制二极管存储器件的能力，其能够通过高驱动电流和小的次级阈值摆动的优点来降低芯片功耗。本发明适用于基于柔性基板和平板显示器和浮动栅极存储器等的半导体器件制造。

24. 发明授权

US08426271B1 Method for manufacturing a gate-control diode semiconductor memory device 有权
标题翻译：栅极控制二极管半导体存储器件的制造方法
公开(公告)号：US08426271B1
公开(公告)日：2013-04-23
申请号：US13534998
申请日：2012-06-27
申请人： Pengfei Wang , Chengwei Cao , Qingqing Sun , Wei Zhang
发明人： Pengfei Wang , Chengwei Cao , Qingqing Sun , Wei Zhang
IPC分类号： H01L21/336
CPC分类号： H01L29/7781 , H01L29/66825 , H01L29/788
摘要： This invention belongs to semiconductor device manufacturing field and discloses a method for manufacturing a gate-control diode semiconductor storage device. When the floating gate voltage is relatively high, the channel under the floating gate is of n type and the device is of a simple gate-control pn junction structure; by controlling effective n-type concentration of the ZnO film through back-gate control, inverting the n-type ZnO into p-type through the floating gate and using NiO as a p-type semiconductor, an n-p-n-p doping structure is formed. The quantity of charges in the floating gate determines the device threshold voltage, thus realizing the memory functions. This invention features capacity of manufacturing memory devices able to reduce the chip power consumption through advantages of high driving current and small sub threshold swing, is applicable to semiconductor memory devices manufacturing based on flexible substrates and flat panel displays and floating gate memories, etc.
摘要翻译：本发明属于半导体器件制造领域，并且公开了一种用于制造栅极控制二极管半导体存储器件的方法。当浮动栅极电压相对较高时，浮动栅极下的沟道为n型，器件具有简单的栅极控制pn结结构; 通过背栅控制来控制ZnO膜的有效n型浓度，通过浮栅将n型ZnO反转为p型，并使用NiO作为p型半导体，形成n-p-n-p掺杂结构。浮栅中的电荷量决定了器件的阈值电压，从而实现了存储器的功能。本发明特征在于能够通过高驱动电流和小次阈值摆动的优点来制造能够降低芯片功耗的存储器件的能力，可应用于基于柔性基板和平板显示器以及浮动栅极存储器等的半导体存储器件制造。

25. 发明授权

US08748267B2 Method for manufacturing a tunneling field effect transistor with a U-shaped channel 有权
标题翻译：用于制造具有U形通道的隧道场效应晶体管的方法
公开(公告)号：US08748267B2
公开(公告)日：2014-06-10
申请号：US13537956
申请日：2012-06-29
申请人： Pengfei Wang , Xi Lin , Wei Liu , Qingqing Sun , Wei Zhang
发明人： Pengfei Wang , Xi Lin , Wei Liu , Qingqing Sun , Wei Zhang
IPC分类号： H01L21/336
CPC分类号： H01L29/7391 , H01L29/0657 , H01L29/0895 , H01L29/517 , H01L29/66356
摘要： The present invention belongs to the technical field of semiconductor device manufacturing and specifically relates to a method for manufacturing a tunneling field effect transistor with a U-shaped channel. The U-shaped channel can effectively extend the transistor channel length, restrain the generation of leakage current in the transistor, and decrease the chip power consumption. The method for manufacturing a tunneling field effect transistor with a U-shaped channel put forward in the present invention is capable of realizing an extremely narrow U-shaped channel, overcoming the alignment deviation introduced by photoetching, and improving the chip integration degree.
摘要翻译：本发明属于半导体器件制造的技术领域，具体涉及一种具有U形沟道的隧道效应晶体管的制造方法。 U型通道可以有效地延长晶体管沟道长度，抑制晶体管中漏电流的产生，降低芯片功耗。本发明提出的具有U形通道的隧道场效应晶体管的制造方法能够实现非常窄的U形沟道，克服由光刻引入的取向偏差，提高芯片集成度。

26. 发明申请

US20140003122A1 SEMICONDUCTOR MEMORY STRUCTURE AND CONTROL METHOD THEREOF 审中-公开
标题翻译：半导体存储器结构及其控制方法
公开(公告)号：US20140003122A1
公开(公告)日：2014-01-02
申请号：US13501833
申请日：2011-08-15
申请人： Pengfei Wang , Qingqing Sun , Wei Zhang
发明人： Pengfei Wang , Qingqing Sun , Wei Zhang
IPC分类号： G11C13/00
CPC分类号： G11C13/0002 , G11C13/0004 , G11C13/0007 , G11C2213/79 , H01L27/2454 , H01L45/04
摘要： The present invention belongs to the technical field of non-volatile semiconductor memories, and relates to a semiconductor memory structure and a control method thereof. The semiconductor memory structure in the present invention comprises a memory unit for storing information and a tunneling field-effect transistor connected with the memory unit. The tunneling field-effect transistor is used for controlling the semiconductor memory's operations such as erasing, writing, and reading. A plurality of semiconductor memory structures compose a semiconductor memory array. The control method provided by the present invention comprises steps of resetting, setting, and reading. A vertical gate-controlled diode structure in a tunneling field-effect transistor is capable of providing a large current for writing a resistive random access memory and a phase change memory and improving the density of the memory array and therefore is very suitable for use in manufacturing of semiconductor memory chips; besides, the control method and the control circuit thereof are simple.
摘要翻译：本发明属于非易失性半导体存储器的技术领域，涉及一种半导体存储器结构及其控制方法。本发明的半导体存储器结构包括用于存储信息的存储单元和与存储单元连接的隧道场效应晶体管。隧道场效应晶体管用于控制半导体存储器的操作，例如擦除，写入和读取。多个半导体存储器结构构成半导体存储器阵列。本发明提供的控制方法包括复位，设定和读取的步骤。隧道场效应晶体管中的垂直栅极控制二极管结构能够提供用于写入电阻随机存取存储器和相变存储器的大电流，并且提高存储器阵列的密度，因此非常适合用于制造的半导体存储芯片; 此外，控制方法及其控制电路简单。

27. 发明申请

US20130237009A1 METHOD FOR MANUFACTURING A GATE-CONTROL DIODE SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造门控二极管半导体器件的方法
公开(公告)号：US20130237009A1
公开(公告)日：2013-09-12
申请号：US13554425
申请日：2012-07-20
申请人： Pengfei Wang , Xi Lin , Qingqing Sun , Wei Zhang
发明人： Pengfei Wang , Xi Lin , Qingqing Sun , Wei Zhang
IPC分类号： H01L21/336
CPC分类号： H01L29/66356 , H01L29/0653 , H01L29/267 , H01L29/517 , H01L29/7391
摘要： The present invention belongs to the technical field of semiconductor device manufacturing, and specifically relates to a method for manufacturing a gate-control diode semiconductor device. The present invention manufactures gate-control diode semiconductor devices through a low-temperature process, features a simple process, low manufacturing cost, and capacity of manufacturing gate-control diode devices able to reduce the chip power consumption through advantages of high driving current and small sub-threshold swing. The method for manufacturing a gate-control diode semiconductor device proposed by the present invention is especially applicable to the manufacturing of reading & writing devices having flat panel displays and phase change memory, and semiconductor devices based on flexible substrates.
摘要翻译：本发明属于半导体器件制造的技术领域，具体涉及一种用于制造栅极控制二极管半导体器件的方法。本发明通过低温工艺制造栅极控制二极管半导体器件，具有简单的工艺，低制造成本和制造栅极控制二极管器件的能力，能够通过高驱动电流和小的优点降低芯片功耗次阈值摆动。本发明提出的栅极控制二极管半导体器件的制造方法特别适用于具有平板显示器和相变存储器的读写装置以及基于柔性基板的半导体器件的制造。

28. 发明申请

US20130178012A1 METHOD FOR MANUFACTURING A GATE-CONTROL DIODE SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造门控二极管半导体器件的方法
公开(公告)号：US20130178012A1
公开(公告)日：2013-07-11
申请号：US13534973
申请日：2012-06-27
申请人： Pengfei Wang , Xiaoyong Liu , Qingqing Sun , Wei Zhang
发明人： Pengfei Wang , Xiaoyong Liu , Qingqing Sun , Wei Zhang
IPC分类号： H01L21/336
CPC分类号： H01L29/7391 , H01L29/267 , H01L29/66356
摘要： This invention belongs to semiconductor device manufacturing field and discloses a method for manufacturing a gate-control diode semiconductor device. When the gate voltage is relatively high, the channel under the gate is of n-type and the device is of a simple gate-control pn junction structure; by way of controlling the effective n-type concentration of the ZnO film through back-gate control, inverting the n-type ZnO into p-type through the gate, and using NiO as a p-type semiconductor, an n-p-n-p doping structure is formed. The method features capacity of manufacturing gate-control diode devices able to reduce chip power consumption through the advantages of high driving current and small sub-threshold swing. The present invention using a low temperature process production is especially applicable to the manufacturing of semiconductor devices based on flexible substrates and reading & writing devices that have a flat panel display and phase change memory.
摘要翻译：本发明属于半导体器件制造领域，并且公开了一种用于制造栅极控制二极管半导体器件的方法。当栅极电压相对较高时，栅极下的沟道为n型，器件具有简单的栅极控制pn结结构; 通过背栅控制来控制ZnO膜的有效n型浓度，通过栅极将n型ZnO转换为p型，并且使用NiO作为p型半导体，形成npnp掺杂结构。该方法具有制造栅极控制二极管器件的能力，能够通过高驱动电流和小次阈值摆幅的优点降低芯片功耗。使用低温工艺生产的本发明特别适用于基于柔性基板和具有平板显示器和相变存储器的读写装置的半导体器件的制造。

29. 发明申请

US20120305882A1 NiO-based Resistive Random Access Memory and the Preparation Method Thereof 审中-公开
标题翻译：基于NiO的电阻随机存取存储器及其制备方法
公开(公告)号：US20120305882A1
公开(公告)日：2012-12-06
申请号：US13498973
申请日：2011-09-23
申请人： Jingjing Gu , Qingqing Sun , Pengfei Wang , Peng Zhou , Wei Zhang
发明人： Jingjing Gu , Qingqing Sun , Pengfei Wang , Peng Zhou , Wei Zhang
IPC分类号： H01L45/00 , H01L21/02
CPC分类号： H01L45/146 , G11C13/0007 , H01L45/06 , H01L45/16
摘要： The present invention belongs to the technical field of memory storage and specially relates to a NiO-based resistive random access memory system (RRAM) and a preparation method thereof. The RRAM is comprised of a substrate and a metal-insulator-metal (MIM) structure, wherein the electrodes are metal films, such as copper, aluminum, etc., capable of being applied to the interconnection process, and the resistive switching insulator is an Al2O3/NiO/Al2O3 laminated dielectric film. The MIM structure in the invention shows stable switching between the bi-stable resistance states as well as memory features; compared with the RRAM that only uses a single NiO-based dielectric film, the storage window is increased, and the resistance stability is improved. Therefore, the NiO-based RRAM has a good prospect in actual application. The present invention further provides a method for preparing the abovementioned memory storage system.
摘要翻译：本发明属于存储器的技术领域，特别涉及一种基于NiO的电阻随机存取存储器（RRAM）及其制备方法。 RRAM由衬底和金属 - 绝缘体 - 金属（MIM）结构构成，其中电极是可应用于互连工艺的金属膜，例如铜，铝等，并且电阻式开关绝缘子是 Al2O3 / NiO / Al2O3层压电介质膜。本发明的MIM结构显示了稳定的电阻状态和存储特征之间的稳定切换; 与仅使用单个NiO基电介质膜的RRAM相比，存储窗口增加，并且电阻稳定性得到改善。因此，基于NiO的RRAM在实际应用中具有良好的前景。本发明还提供了一种用于制备上述存储器存储系统的方法。

30. 发明申请

US20120273866A1 Semiconductor Memory Device with a Buried Drain and Its Memory Array 有权
标题翻译：具有埋漏的半导体存储器件及其存储器阵列
公开(公告)号：US20120273866A1
公开(公告)日：2012-11-01
申请号：US13322640
申请日：2010-12-24
申请人： Pengfei Wang , Qingqing Sun , Shijin Ding , Wei Zhang
发明人： Pengfei Wang , Qingqing Sun , Shijin Ding , Wei Zhang
IPC分类号： H01L29/792
CPC分类号： H01L21/28273 , H01L27/11521
摘要： A semiconductor memory device with a buried drain is provided. The device comprises a semiconductor substrate (107); one drain region (108) of a first doping type; two source regions (101a,101b) of a second doping type; and a stacked gate provided on the semiconductor substrate for capturing electrons. A memory array formed by a plurality of semiconductor memory devices. and a manufacturing method thereof are also provided. The semiconductor memory device has the advantages of small cell area, simple manufacturing process and the like. The manufacturing cost of the memory device is reduced and the storing density of the memory device is increased.
摘要翻译：提供了一种具有埋地漏极的半导体存储器件。该器件包括半导体衬底（107）; 一个第一掺杂类型的漏极区域（108）; 具有第二掺杂类型的两个源极区域（101a，101b）以及设置在半导体基板上用于捕获电子的堆叠栅极。由多个半导体存储器件形成的存储器阵列。还提供了其制造方法。半导体存储器件具有电池面积小，制造工艺简单等优点。存储器件的制造成本降低，并且存储器件的存储密度增加。

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