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    • 24. 发明授权
    • Non-volatile memory and the fabrication method
    • 非易失性存储器及其制造方法
    • US07394090B2
    • 2008-07-01
    • US11798364
    • 2007-05-14
    • Kiyoyuki MoritaNoboru YamadaAkihito MiyamotoTakashi OhtsukaHideyuki Tanaka
    • Kiyoyuki MoritaNoboru YamadaAkihito MiyamotoTakashi OhtsukaHideyuki Tanaka
    • H01L47/00
    • G11C13/0004G11C14/009H01L27/1104H01L27/24H01L45/04H01L45/145
    • A non-volatile memory comprising: a first substrate (100) and a second substrate (110), the first substrate (100) having a plurality of switching elements (4) arranged in matrix, and a plurality of first electrodes (18) connected to the switching element (4), the second substrate (110) having a conductive film (32), and a recording layer (34) whose resistance value changes by application of an electric pulse, wherein the plurality of first electrodes (18) are integrally covered by the recording layer (34), the recording layer (34) thereby being held between the plurality of first electrodes (18) and the conductive film (32); the first substrate (100) further comprising a second electrode (22), the second electrode (22) being electrically connected to the conductive film (32), the voltage of which is maintained at a set level while applying current to the recording layer (34). This non-volatile memory achieves high integration at low cost.
    • 一种非易失性存储器,包括:第一基板(100)和第二基板(110),所述第一基板(100)具有布置成矩阵的多个开关元件(4),并且多个第一电极(18)被连接 至所述开关元件(4),所述第二基板(110)具有导电膜(32)以及其电阻值通过施加电脉冲而改变的记录层(34),其中所述多个第一电极(18)为 由记录层(34)整体覆盖,记录层(34)由此保持在多个第一电极(18)和导电膜(32)之间; 所述第一基板(100)还包括第二电极(22),所述第二电极(22)电连接到所述导电膜(32),其电压保持在设定电平,同时向所述记录层施加电流( 34)。 这种非易失性存储器以低成本实现高集成度。
    • 25. 发明申请
    • Non-volatile memory and the fabrication method
    • 非易失性存储器及其制造方法
    • US20070210362A1
    • 2007-09-13
    • US11798364
    • 2007-05-14
    • Kiyoyuki MoritaNoboru YamadaAkihito MiyamotoTakashi OhtsukaHideyuki Tanaka
    • Kiyoyuki MoritaNoboru YamadaAkihito MiyamotoTakashi OhtsukaHideyuki Tanaka
    • H01L27/11
    • G11C13/0004G11C14/009H01L27/1104H01L27/24H01L45/04H01L45/145
    • A non-volatile memory comprising: a first substrate (100) and a second substrate (110), the first substrate (100) having a plurality of switching elements (4) arranged in matrix, and a plurality of first electrodes (18) connected to the switching element (4), the second substrate (110) having a conductive film (32), and a recording layer (34) whose resistance value changes by application of an electric pulse, wherein the plurality of first electrodes (18) are integrally covered by the recording layer (34), the recording layer (34) thereby being held between the plurality of first electrodes (18) and the conductive film (32); the first substrate (100) further comprising a second electrode (22), the second electrode (22) being electrically connected to the conductive film (32), the voltage of which is maintained at a set level while applying current to the recording layer (34). This non-volatile memory achieves high integration at low cost.
    • 一种非易失性存储器,包括:第一基板(100)和第二基板(110),所述第一基板(100)具有布置成矩阵的多个开关元件(4),并且多个第一电极(18)被连接 至所述开关元件(4),所述第二基板(110)具有导电膜(32)以及其电阻值通过施加电脉冲而改变的记录层(34),其中所述多个第一电极(18)为 由记录层(34)整体覆盖,记录层(34)由此保持在多个第一电极(18)和导电膜(32)之间; 所述第一基板(100)还包括第二电极(22),所述第二电极(22)电连接到所述导电膜(32),其电压保持在设定电平,同时向所述记录层施加电流( 34)。 这种非易失性存储器以低成本实现高集成度。
    • 27. 发明授权
    • Non-volatile flip flop
    • 非易失性触发器
    • US07206217B2
    • 2007-04-17
    • US10754058
    • 2004-01-09
    • Takashi OhtsukaHideyuki Tanaka
    • Takashi OhtsukaHideyuki Tanaka
    • G11C11/40
    • G11C14/0072G11C8/16G11C13/0004G11C14/009H01L21/28291H01L27/101H01L27/11H03K3/356008
    • A non-volatile flip flop according to the invention comprising: a flip flop section (4) having a pair of memory nodes (5, 6) for storing a pair of inverse logic data elements; and a pair of non-volatile resistance change elements (11, 12) which are connected to the pair of memory nodes (5, 6) through switching elements (9, 10) respectively and the resistances of which vary so as to be retainable, wherein, in a store operation, the resistances of the pair of non-volatile resistance change elements (11, 12) can be varied according to the respective potentials of the pair of memory nodes (5, 6) and, in a recall operation, the pair of memory nodes (5, 6) can be placed at potentials respectively according to the difference in resistance between the pair of non-volatile resistance change elements (11, 12).
    • 根据本发明的非易失性触发器包括:触发器部分(4),具有用于存储一对反逻辑数据元素的一对存储器节点(5,6); 以及一对非易失性电阻变化元件(11,12),它们分别通过开关元件(9,10)连接到一对存储器节点(5,6),并且其电阻变化以便保持, 其特征在于,在存储操作中,所述一对非易失性电阻变化元件(11,12)的电阻可以根据所述一对存储器节点(5,6)的各自的电位而变化,并且在回调操作中, 可以根据所述一对非易失性电阻变化元件(11,12)之间的电阻差分别将所述一对存储器节点(5,6)置于电位上。
    • 28. 发明授权
    • Nonvolatile selector, and integrated circuit device
    • 非易失选择器和集成电路器件
    • US06781865B2
    • 2004-08-24
    • US10398737
    • 2003-04-09
    • Takashi OhtsukaKiyoyuki Morita
    • Takashi OhtsukaKiyoyuki Morita
    • G11C1122
    • G11C11/22G11C8/10H03K17/693
    • A multiplexer includes first through fourth switching sections 10A through 10D in a pre-stage gate and each of the switching sections 10 includes a serial capacitor 3 and a FET 4. The serial capacitor 3 includes a ferroelectric capacitor 1 and a paraelectric capacitor 2 and an intermediate node of the serial capacitor 3 is connected to a gate electrode 8 of the FET 4. In a unit selector Use11 made up of the switching sections 10A and 10B, a voltage applied to the intermediate node 9 is distributed according to the difference between the capacitances of the two capacitors so that in the switching section 10A and 10B, the FETs 4 alternately turn ON and OFF according to the logical value, 1 or 0, of a selection signal D1. Accordingly, an operation state is stored in a nonvolatile state in the ferroelectric capacitor 1.
    • 多路复用器包括在前级栅极中的第一至第四开关部分10A至10D,并且每个开关部分10包括串联电容器3和FET 4.串联电容器3包括铁电电容器1和顺电电容器2和 串联电容器3的中间节点连接到FET4的栅电极8.在由开关部分10A和10B组成的单元选择器Use11中,施加到中间节点9的电压根据 两个电容器的电容,使得在开关部分10A和10B中,FET4根据选择信号D1的逻辑值1或0交替地导通和截止。 因此,在强电介质电容器1中以非易失性状态存储操作状态。
    • 29. 发明授权
    • Measuring apparatus and method for measuring characteristic of solar cell
    • 用于测量太阳能电池特性的测量装置和方法
    • US06639421B1
    • 2003-10-28
    • US09691130
    • 2000-10-19
    • Takehito YoshinoTakashi Ohtsuka
    • Takehito YoshinoTakashi Ohtsuka
    • G01R3126
    • H02S50/10
    • A predetermined area of a photo-sensing surface of a solar cell is illuminated, and a voltage vs. current characteristic is measured. Note, the rest of the photo-sensing surface which is not illuminated is called a dark area. Next, in a dark state in which the photo-sensing surface is not illuminated, a dark characteristic of the solar cell is measured. The obtained dark characteristic is multiplied by a ratio of the area of the dark area to the area of the photo-sensing surface, thereby a dark characteristic of the dark area is calculated. Then, a difference characteristic between the measured voltage vs. current characteristic and the dark characteristic of the dark area is calculated. The difference characteristic is multiplied by a ratio of the area of the photo-sensing surface to the area of the illuminated portion, thereby a voltage vs. current characteristic of the solar cell in a state corresponding to that the entire area of the photo-sensing surface is illuminated at once is obtained.
    • 照射太阳能电池的感光面的规定面积,测定电压 - 电流特性。 注意,未被照亮的光感测表面的其余部分称为暗区。 接下来,在光敏表面不被照亮的暗状态下,测量太阳能电池的暗特性。 所获得的暗特性乘以暗区的面积与感光面的面积的比值,由此计算暗区的暗特性。 然后,计算测量的电压与电流特性之间的差异特性和黑暗区域的暗特性。 差分特性乘以感光表面的面积与照射部分的面积的比率,从而在与感光面的整个面积相对应的状态下的太阳能电池的电压对电流特性 立即照射表面。