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1. 发明授权

US07394090B2 Non-volatile memory and the fabrication method 有权
标题翻译：非易失性存储器及其制造方法
公开(公告)号：US07394090B2
公开(公告)日：2008-07-01
申请号：US11798364
申请日：2007-05-14
申请人： Kiyoyuki Morita , Noboru Yamada , Akihito Miyamoto , Takashi Ohtsuka , Hideyuki Tanaka
发明人： Kiyoyuki Morita , Noboru Yamada , Akihito Miyamoto , Takashi Ohtsuka , Hideyuki Tanaka
IPC分类号： H01L47/00
CPC分类号： G11C13/0004 , G11C14/009 , H01L27/1104 , H01L27/24 , H01L45/04 , H01L45/145
摘要： A non-volatile memory comprising: a first substrate (100) and a second substrate (110), the first substrate (100) having a plurality of switching elements (4) arranged in matrix, and a plurality of first electrodes (18) connected to the switching element (4), the second substrate (110) having a conductive film (32), and a recording layer (34) whose resistance value changes by application of an electric pulse, wherein the plurality of first electrodes (18) are integrally covered by the recording layer (34), the recording layer (34) thereby being held between the plurality of first electrodes (18) and the conductive film (32); the first substrate (100) further comprising a second electrode (22), the second electrode (22) being electrically connected to the conductive film (32), the voltage of which is maintained at a set level while applying current to the recording layer (34). This non-volatile memory achieves high integration at low cost.
摘要翻译：一种非易失性存储器，包括：第一基板（100）和第二基板（110），所述第一基板（100）具有布置成矩阵的多个开关元件（4），并且多个第一电极（18）被连接至所述开关元件（4），所述第二基板（110）具有导电膜（32）以及其电阻值通过施加电脉冲而改变的记录层（34），其中所述多个第一电极（18）为由记录层（34）整体覆盖，记录层（34）由此保持在多个第一电极（18）和导电膜（32）之间; 所述第一基板（100）还包括第二电极（22），所述第二电极（22）电连接到所述导电膜（32），其电压保持在设定电平，同时向所述记录层施加电流（ 34）。这种非易失性存储器以低成本实现高集成度。

2. 发明申请

US20070210362A1 Non-volatile memory and the fabrication method 有权
标题翻译：非易失性存储器及其制造方法
公开(公告)号：US20070210362A1
公开(公告)日：2007-09-13
申请号：US11798364
申请日：2007-05-14
申请人： Kiyoyuki Morita , Noboru Yamada , Akihito Miyamoto , Takashi Ohtsuka , Hideyuki Tanaka
发明人： Kiyoyuki Morita , Noboru Yamada , Akihito Miyamoto , Takashi Ohtsuka , Hideyuki Tanaka
IPC分类号： H01L27/11
CPC分类号： G11C13/0004 , G11C14/009 , H01L27/1104 , H01L27/24 , H01L45/04 , H01L45/145
摘要： A non-volatile memory comprising: a first substrate (100) and a second substrate (110), the first substrate (100) having a plurality of switching elements (4) arranged in matrix, and a plurality of first electrodes (18) connected to the switching element (4), the second substrate (110) having a conductive film (32), and a recording layer (34) whose resistance value changes by application of an electric pulse, wherein the plurality of first electrodes (18) are integrally covered by the recording layer (34), the recording layer (34) thereby being held between the plurality of first electrodes (18) and the conductive film (32); the first substrate (100) further comprising a second electrode (22), the second electrode (22) being electrically connected to the conductive film (32), the voltage of which is maintained at a set level while applying current to the recording layer (34). This non-volatile memory achieves high integration at low cost.
摘要翻译：一种非易失性存储器，包括：第一基板（100）和第二基板（110），所述第一基板（100）具有布置成矩阵的多个开关元件（4），并且多个第一电极（18）被连接至所述开关元件（4），所述第二基板（110）具有导电膜（32）以及其电阻值通过施加电脉冲而改变的记录层（34），其中所述多个第一电极（18）为由记录层（34）整体覆盖，记录层（34）由此保持在多个第一电极（18）和导电膜（32）之间; 所述第一基板（100）还包括第二电极（22），所述第二电极（22）电连接到所述导电膜（32），其电压保持在设定电平，同时向所述记录层施加电流（ 34）。这种非易失性存储器以低成本实现高集成度。

3. 发明授权

US07206217B2 Non-volatile flip flop 失效
标题翻译：非易失性触发器
公开(公告)号：US07206217B2
公开(公告)日：2007-04-17
申请号：US10754058
申请日：2004-01-09
申请人： Takashi Ohtsuka , Hideyuki Tanaka
发明人： Takashi Ohtsuka , Hideyuki Tanaka
IPC分类号： G11C11/40
CPC分类号： G11C14/0072 , G11C8/16 , G11C13/0004 , G11C14/009 , H01L21/28291 , H01L27/101 , H01L27/11 , H03K3/356008
摘要： A non-volatile flip flop according to the invention comprising: a flip flop section (4) having a pair of memory nodes (5, 6) for storing a pair of inverse logic data elements; and a pair of non-volatile resistance change elements (11, 12) which are connected to the pair of memory nodes (5, 6) through switching elements (9, 10) respectively and the resistances of which vary so as to be retainable, wherein, in a store operation, the resistances of the pair of non-volatile resistance change elements (11, 12) can be varied according to the respective potentials of the pair of memory nodes (5, 6) and, in a recall operation, the pair of memory nodes (5, 6) can be placed at potentials respectively according to the difference in resistance between the pair of non-volatile resistance change elements (11, 12).
摘要翻译：根据本发明的非易失性触发器包括：触发器部分（4），具有用于存储一对反逻辑数据元素的一对存储器节点（5,6）; 以及一对非易失性电阻变化元件（11,12），它们分别通过开关元件（9,10）连接到一对存储器节点（5,6），并且其电阻变化以便保持，其特征在于，在存储操作中，所述一对非易失性电阻变化元件（11,12）的电阻可以根据所述一对存储器节点（5,6）的各自的电位而变化，并且在回调操作中，可以根据所述一对非易失性电阻变化元件（11,12）之间的电阻差分别将所述一对存储器节点（5,6）置于电位上。

4. 发明授权

US07232703B2 Non-volatile memory and the fabrication method 有权
公开(公告)号：US07232703B2
公开(公告)日：2007-06-19
申请号：US10980309
申请日：2004-11-04
申请人： Kiyoyuki Morita , Noboru Yamada , Akihito Miyamoto , Takashi Ohtsuka , Hideyuki Tanaka
发明人： Kiyoyuki Morita , Noboru Yamada , Akihito Miyamoto , Takashi Ohtsuka , Hideyuki Tanaka
IPC分类号： H01L21/06
CPC分类号： G11C13/0004 , G11C14/009 , H01L27/1104 , H01L27/24 , H01L45/04 , H01L45/145
摘要： A non-volatile memory comprising: a first substrate (100) and a second substrate (110), the first substrate (100) having a plurality of switching elements (4) arranged in matrix, and a plurality of first electrodes (18) connected to the switching element (4), the second substrate (110) having a conductive film (32), and a recording layer (34) whose resistance value changes by application of an electric pulse, wherein the plurality of first electrodes (18) are integrally covered by the recording layer (34), the recording layer (34) thereby being held between the plurality of first electrodes (18) and the conductive film (32); the first substrate (100) further comprising a second electrode (22), the second electrode (22) being electrically connected to the conductive film (32), the voltage of which is maintained at a set level while applying current to the recording layer (34).This non-volatile memory achieves high integration at low cost.

5. 发明授权

US07023014B2 Non-volatile memory and fabrication method thereof 有权
标题翻译：非易失性存储器及其制造方法
公开(公告)号：US07023014B2
公开(公告)日：2006-04-04
申请号：US10716621
申请日：2003-11-20
申请人： Kiyoshi Morimoto , Hideyuki Tanaka , Takashi Ohtsuka , Akihito Miyamoto
发明人： Kiyoshi Morimoto , Hideyuki Tanaka , Takashi Ohtsuka , Akihito Miyamoto
IPC分类号： H01L29/18
CPC分类号： G11C13/0004 , H01L27/0814 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/1273 , H01L45/144 , H01L45/1625 , H01L45/1666 , H01L45/1675
摘要： The present invention relates to a non-volatile memory comprising: a first electrode (11); a second electrode (12); and a phase-change recording medium (14) sandwiched between the first electrode (11) and the second electrode (12), in which resistance value is varied by applying an electrical pulse across the first electrode (11) and the second electrode (12), at least one of the first electrode (11) and the second electrode (12) contains as a main ingredient at least one member selected from the group consisting of ruthenium, rhodium and osmium, and the phase-change recording medium (14) is formed of a phase-change material that contains chalcogen(s). This non-volatile memory exhibits improved durability and reliability by preventing deterioration of property (i.e., mutual impurity diffusion between the electrode and the phase-change recording medium) caused by application of current.
摘要翻译：本发明涉及一种非易失性存储器，包括：第一电极（11）; 第二电极（12）; 以及夹在第一电极（11）和第二电极（12）之间的相变记录介质（14），其中通过在第一电极（11）和第二电极（12）上施加电脉冲来改变电阻值），第一电极（11）和第二电极（12）中的至少一个包含选自钌，铑和锇中的至少一种元素和相变记录介质（14）作为主要成分，由含有硫族元素的相变材料形成。这种非易失性存储器通过防止由施加电流引起的性能劣化（即，电极和相变记录介质之间的相互杂质扩散）而显示出改进的耐久性和可靠性。

6. 发明申请

US20050093043A1 Non-volatile memory and the fabrication method 有权
标题翻译：非易失性存储器及其制造方法
公开(公告)号：US20050093043A1
公开(公告)日：2005-05-05
申请号：US10980309
申请日：2004-11-04
申请人： Kiyoyuki Morita , Noboru Yamada , Akihito Miyamoto , Takashi Ohtsuka , Hideyuki Tanaka
发明人： Kiyoyuki Morita , Noboru Yamada , Akihito Miyamoto , Takashi Ohtsuka , Hideyuki Tanaka
IPC分类号： G11C16/02 , H01L27/11 , H01L27/24 , H01L45/00 , H01L29/76 , H01L21/48
CPC分类号： G11C13/0004 , G11C14/009 , H01L27/1104 , H01L27/24 , H01L45/04 , H01L45/145
摘要： A non-volatile memory comprising: a first substrate (100) and a second substrate (110), the first substrate (100) having a plurality of switching elements (4) arranged in matrix, and a plurality of first electrodes (18) connected to the switching element (4), the second substrate (110) having a conductive film (32), and a recording layer (34) whose resistance value changes by application of an electric pulse, wherein the plurality of first electrodes (18) are integrally covered by the recording layer (34), the recording layer (34) thereby being held between the plurality of first electrodes (18) and the conductive film (32); the first substrate (100) further comprising a second electrode (22), the second electrode (22) being electrically connected to the conductive film (32), the voltage of which is maintained at a set level while applying current to the recording layer (34). This non-volatile memory achieves high integration at low cost.
摘要翻译：一种非易失性存储器，包括：第一基板（100）和第二基板（110），所述第一基板（100）具有布置成矩阵的多个开关元件（4），并且多个第一电极（18）被连接至所述开关元件（4），所述第二基板（110）具有导电膜（32）以及其电阻值通过施加电脉冲而改变的记录层（34），其中所述多个第一电极（18）为由记录层（34）整体覆盖，记录层（34）由此保持在多个第一电极（18）和导电膜（32）之间; 所述第一基板（100）还包括第二电极（22），所述第二电极（22）电连接到所述导电膜（32），其电压保持在设定电平，同时向所述记录层施加电流（ 34）。这种非易失性存储器以低成本实现高集成度。

7. 发明申请

US20050045864A1 Non-volatile memory 失效
标题翻译：非易失性存储器
公开(公告)号：US20050045864A1
公开(公告)日：2005-03-03
申请号：US10967222
申请日：2004-10-19
申请人： Hideyuki Tanaka , Takashi Ohtsuka , Kiyoyuki Morita , Kiyoshi Morimoto
发明人： Hideyuki Tanaka , Takashi Ohtsuka , Kiyoyuki Morita , Kiyoshi Morimoto
IPC分类号： H01L27/24 , H01L45/00 , H01L47/00
CPC分类号： H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/1273 , H01L45/144 , H01L45/16 , H01L45/1625
摘要： A non-volatile memory (1) which comprises an insulating substrate (11) having a plurality of first electrodes (15) extending therethrough from a front surface of the substrate to a rear surface thereof, a second electrode (12) formed on one surface side of the substrate (11), and a recording layer (14) held between the first electrodes (15) and the second electrode (12) and variable in resistance value by electric pulses applied across the first electrodes (15) and the second electrode (12), the plurality of first electrodes (15) being electrically connected to the recording layer (14) in a region constituting a single memory cell (MC). The non-volatile memory (1) can be reduced in power consumption and has great freedom of design and high reliability.
摘要翻译：一种非易失性存储器（1），其包括绝缘基板（11），所述绝缘基板具有从所述基板的前表面延伸穿过其延伸到其后表面的多个第一电极（15），形成在一个表面上的第二电极基板（11）的一侧，以及保持在第一电极（15）和第二电极（12）之间的记录层（14），并且通过施加在第一电极（15）和第二电极（12），所述多个第一电极（15）在构成单个存储单元（MC）的区域中与记录层（14）电连接。非易失性存储器（1）可以降低功耗，并具有很大的设计自由度和高可靠性。

8. 发明授权

US06844564B2 Non-volatile memory 失效
公开(公告)号：US06844564B2
公开(公告)日：2005-01-18
申请号：US10608130
申请日：2003-06-30
申请人： Hideyuki Tanaka , Takashi Ohtsuka , Kiyoyuki Morita , Kiyoshi Morimoto
发明人： Hideyuki Tanaka , Takashi Ohtsuka , Kiyoyuki Morita , Kiyoshi Morimoto
IPC分类号： H01L27/24 , H01L45/00 , H01L47/00
CPC分类号： H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/1273 , H01L45/144 , H01L45/16 , H01L45/1625
摘要： A non-volatile memory (1) which comprises an insulating substrate (11) having a plurality of first electrodes (15) extending therethrough from a front surface of the substrate to a rear surface thereof, a second electrode (12) formed on one surface side of the substrate (11), and a recording layer (14) held between the first electrodes (15) and the second electrode (12) and variable in resistance value by electric pulses applied across the first electrodes (15) and the second electrode (12), the plurality of first electrodes (15) being electrically connected to the recording layer (14) in a region constituting a single memory cell (MC). The non-volatile memory (1) can be reduced in power consumption and has great freedom of design and high reliability.

9. 发明授权

US07291857B2 Non-volatile memory 失效
标题翻译：非易失性存储器
公开(公告)号：US07291857B2
公开(公告)日：2007-11-06
申请号：US10967222
申请日：2004-10-19
申请人： Hideyuki Tanaka , Takashi Ohtsuka , Kiyoyuki Morita , Kiyoshi Morimoto
发明人： Hideyuki Tanaka , Takashi Ohtsuka , Kiyoyuki Morita , Kiyoshi Morimoto
IPC分类号： H01L47/00
CPC分类号： H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/1273 , H01L45/144 , H01L45/16 , H01L45/1625
摘要： A non-volatile memory (1) which comprises an insulating substrate (11) having a plurality of first electrodes (15) extending therethrough from a front surface of the substrate to a rear surface thereof, a second electrode (12) formed on one surface side of the substrate (11), and a recording layer (14) held between the first electrodes (15) and the second electrode (12) and variable in resistance value by electric pulses applied across the first electrodes (15) and the second electrode (12), the plurality of first electrodes (15) being electrically connected to the recording layer (14) in a region constituting a single memory cell (MC). The non-volatile memory (1) can be reduced in power consumption and has great freedom of design and high reliability.
摘要翻译：一种非易失性存储器（1），其包括绝缘基板（11），所述绝缘基板具有从所述基板的前表面延伸穿过其延伸到其后表面的多个第一电极（15），形成在一个表面上的第二电极基板（11）的一侧，以及保持在第一电极（15）和第二电极（12）之间的记录层（14），并且通过施加在第一电极（15）和第二电极（12），所述多个第一电极（15）在构成单个存储单元（MC）的区域中与记录层（14）电连接。非易失性存储器（1）可以降低功耗，并具有很大的设计自由度和高可靠性。

10. 发明申请

US20100328894A1 OPTICAL INTERCONNECTION DEVICE 有权
标题翻译：光学互连器件
公开(公告)号：US20100328894A1
公开(公告)日：2010-12-30
申请号：US12865780
申请日：2009-02-16
申请人： Mikio Oda , Tomotaka Ishida , Hisaya Takahashi , Hideyuki Ono , Jun Sakai , Takashi Ohtsuka , Arihide Noda , Hikaru Kouta
发明人： Mikio Oda , Tomotaka Ishida , Hisaya Takahashi , Hideyuki Ono , Jun Sakai , Takashi Ohtsuka , Arihide Noda , Hikaru Kouta
IPC分类号： H05K7/20 , G02B6/36
CPC分类号： H01L25/167 , G02B6/4201 , G02B6/4257 , G02B6/4266 , G02B6/4274 , H01L2924/0002 , H01L2924/15174 , H01L2924/15192 , H01L2924/00
摘要： Provided is an optical interconnection device in which a volume required for cooling is reduced. In the optical interconnection device, a plurality of optical modules (12) are arranged on a periphery of an LSI (11) electrically connected to an electric wiring board (10), and liquid cooling mechanisms (13, 14) are respectively placed on the LSI (11) and the optical modules (12). The plurality of optical modules (12) may be arranged only on a surface of the electric wiring board (10) where the LSI (11) is mounted, only on a surface opposite to the surface where the LSI (11) is mounted, or on both the same surface as and the opposite surface to the surface where the LSI (11) is mounted.
摘要翻译：提供一种其中冷却所需的体积减小的光学互连装置。在光互连装置中，在与电气布线板（10）电连接的LSI（11）的周围配置多个光模块（12），液体冷却机构（13,14）分别置于 LSI（11）和光模块（12）。多个光学模块（12）可以仅布置在安装有LSI（11）的电气布线板（10）的仅在与安装LSI（11）的表面相对的表面上，或者在与安装LSI（11）的表面相同的表面上和相对的表面上。

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