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21. 发明授权

US5371517A Video interface palette, systems and method 失效
标题翻译：视频界面调色板，系统和方法
公开(公告)号：US5371517A
公开(公告)日：1994-12-06
申请号：US791757
申请日：1991-11-08
申请人： Louis Izzi , William R. Krenik , Henry T. Yung , Chenwei J. Yin , Carrell R. Killebrew, Jr. , Karl Guttag , Jerry R. Van Aken , Jeffrey Nye , Richard Simpson , Mike Asal
发明人： Louis Izzi , William R. Krenik , Henry T. Yung , Chenwei J. Yin , Carrell R. Killebrew, Jr. , Karl Guttag , Jerry R. Van Aken , Jeffrey Nye , Richard Simpson , Mike Asal
IPC分类号： G06F11/00 , G09G5/06 , G09G5/18 , G09G1/28
CPC分类号： G06F11/006 , G09G5/06 , G09G5/18
摘要： A color palette selects a master clock from plural clock signals received at clock input terminals in response to a master clock selection control word received at control data terminals. A circuit forms a plurality of divided down clock signals from selected divide ratios of the master clock. A circuit selects a shift clock from among the divided down clock signals in response to at least some bits of an output clock selection control word received at the control data terminals. A circuit selectively enables and disables the shift clock in response to blanking data. A circuit selects a video clock from among the divided down clock signals in response to at least some bits of the output clock selection control word. A circuit synchronizes multiple bit words of color code received at color code input terminals with the master clock. A circuit outputs at least one memory recall address in response to receiving each multiple bit word of color code. A circuit stores color data words in a plurality of data storage locations, having associated memory recall addresses, and outputs a color data word upon receipt of an associated memory recall address. A circuit selectively writes color data words into these plural locations. A circuit synchronizes video control signals received at video control terminals with the master clock and provides the blanking data. A circuit selects for output between said color data words and true color data words received at said color code input terminals.
摘要翻译：响应于在控制数据终端接收的主时钟选择控制字，调色板从在时钟输入端接收的多个时钟信号中选择主时钟。 A电路根据主时钟的选择的分频比形成多个分频的下降时钟信号。电路响应于在控制数据端子处接收的输出时钟选择控制字的至少一些位，从分频的下降时钟信号中选择移位时钟。电路响应于消隐数据选择性地启用和禁用移位时钟。响应于输出时钟选择控制字的至少一些位，电路从分频的下降时钟信号中选择视频时钟。电路将彩色码输入端子接收的彩色码的多位字与主时钟同步。响应于接收到颜色代码的每个多个位字，A电路输出至少一个存储器调用地址。电路将颜色数据字存储在具有相关联的存储器调用地址的多个数据存储位置中，并且在接收到相关联的存储器调用地址时输出彩色数据字。电路将彩色数据字选择性地写入这些多个位置。电路将视频控制终端接收的视频控制信号与主时钟同步，并提供消隐数据。电路选择所述颜色数据字和在所述颜色代码输入端接收的真彩色数据字之间的输出。

22. 发明授权

US08472580B2 Clock recovery 有权
标题翻译：时钟恢复
公开(公告)号：US08472580B2
公开(公告)日：2013-06-25
申请号：US13085255
申请日：2011-04-12
申请人： Jonathan Paul Milton , Richard Simpson , Eugenia Carr Cordero Crespo
发明人： Jonathan Paul Milton , Richard Simpson , Eugenia Carr Cordero Crespo
IPC分类号： H04L7/00
CPC分类号： H04L7/033 , H03L7/0807 , H03L7/0814 , H03L7/091 , H04L7/0025
摘要： A clock and data recovery circuit injects a noise waveform into the control loop to offset the data sampling point artificially in order to induce errors. The amplitude of the injected waveform can be varied to ascertain the effect on the bit error rate (BER) so as to be able to evaluate the temporal noise margin.
摘要翻译：时钟和数据恢复电路将噪声波形注入到控制环路中以人为地偏移数据采样点以引起误差。可以改变注入波形的幅度以确定对误码率（BER）的影响，以便能够评估时间噪声容限。

23. 发明申请

US20130151162A1 DRUG DELIVERY DEVICE 审中-公开
标题翻译：药物递送装置
公开(公告)号：US20130151162A1
公开(公告)日：2013-06-13
申请号：US13643761
申请日：2011-04-26
申请人： David Harris , Iain Ansell , Richard Simpson , Peter Bonham , Scott Grubb
发明人： David Harris , Iain Ansell , Richard Simpson , Peter Bonham , Scott Grubb
IPC分类号： G06F19/00
CPC分类号： A61M15/009 , A61M15/00 , A61M15/0021 , A61M16/0051 , A61M16/021 , A61M2016/003 , A61M2016/0039 , A61M2202/064 , A61M2205/3334 , A61M2205/3375 , G01F1/66 , G01F1/666 , G06F19/34 , G16H10/20
摘要： Drug delivery devices are described that include sensors and processing circuitry that can detect operating events, such as flow rates and drug delivery, in various types of inhalers, such as dry powder inhalers, metered dose inhalers, nasal inhalers and nebulisers. The information determined by the processing circuitry can be used to provide feedback to the user or can be stored or transmitted for subsequent analysis. This information can be used to improve clinical trials by providing information about the way in which the inhalers under test are being used.
摘要翻译：描述了药物递送装置，其包括可以检测各种类型的吸入器（例如干粉吸入器，计量吸入器，鼻吸入器和雾化器）中的操作事件（例如流速和药物递送）的传感器和处理电路。由处理电路确定的信息可以用于向用户提供反馈或者可以将其存储或发送用于随后的分析。该信息可用于通过提供关于使用被测吸入器的方式的信息来改进临床试验。

24. 发明授权

US08413871B2 Surgical stapling apparatus 有权
公开(公告)号：US08413871B2
公开(公告)日：2013-04-09
申请号：US12528526
申请日：2008-03-05
申请人： Danyel (Tarinelli) Racenet , Ernie Aranyi , Richard Simpson
发明人： Danyel (Tarinelli) Racenet , Ernie Aranyi , Richard Simpson
IPC分类号： A61B17/068
CPC分类号： A61B17/068 , A61B17/07207 , A61B17/07292 , A61B17/105 , A61B2017/0023 , A61B2017/00473 , A61B2017/07214 , A61B2017/07285
摘要： A surgical stapling apparatus is provided including a cartridge assembly defining a tissue contacting surface; an anvil assembly defining a tissue contacting surface; and a surgical buttress releasably secured to at least one of the tissue contacting surface of the cartridge assembly and the tissue contacting surface of the anvil assembly by at least one anchor. A loading unit is provided including a surgical buttress releasably secured to an anvil assembly and/or a staple cartridge secured thereto by at least one anchor, and a drive assembly including a knife blade, wherein movement of the drive assembly from a proximal position to a distal position results in the knife blade cutting the at least one anchor and freeing each surgical buttress from the anvil assembly and/or cartridge assembly.

25. 发明授权

US08348130B2 Surgical apparatus including surgical buttress 有权
标题翻译：手术器械包括外科支架
公开(公告)号：US08348130B2
公开(公告)日：2013-01-08
申请号：US12964916
申请日：2010-12-10
申请人： Sachin Shah , Richard Simpson
发明人： Sachin Shah , Richard Simpson
IPC分类号： A61B17/042
CPC分类号： A61B17/07207 , A61B17/07292 , A61B2017/00477 , A61B2017/00951 , A61B2017/07214
摘要： A surgical buttress for use with a surgical stapling apparatus having a first jaw in the form of an anvil assembly and a second jaw configured to selectively receive a staple cartridge assembly. The surgical buttress includes a first body portion and a second body portion. The first body portion substantially overlies a portion of a plurality of fastener slots of the staple cartridge assembly. The staple cartridge assembly is removably operably couplable to the second jaw of the surgical stapling apparatus. The second body portion extends from the first body portion and is configured and dimensioned to be removably positioned to substantially overlie a portion of a plurality of fastener pockets of the anvil assembly of the surgical stapling apparatus when the staple cartridge assembly is operably coupled to the second jaw of the surgical stapling apparatus.
摘要翻译：一种与外科缝合装置一起使用的手术支撑件，其具有砧座组件形式的第一钳口和被配置为选择性地容纳钉仓组件的第二钳口。手术支撑体包括第一主体部分和第二主体部分。第一主体部分基本上覆盖在钉仓组件的多个紧固件槽的一部分上。钉仓组件可移除地可操作地联接到外科缝合装置的第二钳口。第二主体部分从第一主体部分延伸并且被构造和尺寸设计成可拆卸地定位成基本覆盖在外科缝合装置的砧座组件的多个紧固件凹部的一部分上，当钉仓组件可操作地联接到第二主体部分手术吻合装置的颚。

26. 发明申请

US20110249782A1 CLOCK RECOVERY 有权
标题翻译：时钟恢复
公开(公告)号：US20110249782A1
公开(公告)日：2011-10-13
申请号：US13085255
申请日：2011-04-12
申请人： Jonathan Paul Milton , Richard Simpson , Eugenia Carr Cordero Crespo
发明人： Jonathan Paul Milton , Richard Simpson , Eugenia Carr Cordero Crespo
IPC分类号： H04L7/00
CPC分类号： H04L7/033 , H03L7/0807 , H03L7/0814 , H03L7/091 , H04L7/0025
摘要： A clock and data recovery circuit injects a noise waveform into the control loop to offset the data sampling point artificially in order to induce errors. The amplitude of the injected waveform can be varied to ascertain the effect on the bit error rate (BER) so as to be able to evaluate the temporal noise margin.
摘要翻译：时钟和数据恢复电路将噪声波形注入到控制环路中以人为地偏移数据采样点以引起误差。可以改变注入波形的幅度以确定对误码率（BER）的影响，以便能够评估时间噪声容限。

27. 发明申请

US20100012704A1 Surgical Stapling Apparatus 有权
标题翻译：手术器械
公开(公告)号：US20100012704A1
公开(公告)日：2010-01-21
申请号：US12528526
申请日：2008-03-05
申请人： Danyel Tarinelli Racenet , Ernie Aranyi , Richard Simpson
发明人： Danyel Tarinelli Racenet , Ernie Aranyi , Richard Simpson
IPC分类号： A61B17/068
CPC分类号： A61B17/068 , A61B17/07207 , A61B17/07292 , A61B17/105 , A61B2017/0023 , A61B2017/00473 , A61B2017/07214 , A61B2017/07285
摘要： A surgical stapling apparatus is provided including a cartridge assembly defining a tissue contacting surface; an anvil assembly defining a tissue contacting surface; and a surgical buttress releasably secured to at least one of the tissue contacting surface of the cartridge assembly and the tissue contacting surface of the anvil assembly by at least one anchor. A loading unit is provided including a surgical buttress releasably secured to an anvil assembly and/or a staple cartridge secured thereto by at least one anchor, and a drive assembly including a knife blade, wherein movement of the drive assembly from a proximal position to a distal position results in the knife blade cutting the at least one anchor and freeing each surgical buttress from the anvil assembly and/or cartridge assembly.
摘要翻译：提供外科缝合装置，其包括限定组织接触表面的药筒组件; 定义组织接触表面的砧座组件; 以及通过至少一个锚定器可释放地固定到所述钉仓组件的组织接触表面和所述砧组件的组织接触表面的外科支撑件。提供了一种装载单元，其包括可释放地固定到砧组件和/或通过至少一个锚固件固定到其上的钉仓的手术支撑件和包括刀片的驱动组件，其中驱动组件从近侧位置移动到远端位置导致刀片切割至少一个锚固件并且从砧座组件和/或筒组件释放每个手术支撑件。

28. 发明授权

US07233628B2 Data transmission 有权
公开(公告)号：US07233628B2
公开(公告)日：2007-06-19
申请号：US10624699
申请日：2003-07-22
申请人： Iain Robertson , Richard Simpson , Michael Harwood , Richard Ward , Andrew Joy , Robert Simpson
发明人： Iain Robertson , Richard Simpson , Michael Harwood , Richard Ward , Andrew Joy , Robert Simpson
IPC分类号： H04B7/24
CPC分类号： H04L25/14 , H04L7/0025 , H04L7/0337
摘要： A circuit for receiving multiple serial datastreams in parallel is disclosed. A bit clock is recovered from each data stream, there being one data bit for each transition of the clock signal both positive and negative going. The phases of the bit clocks are compared and are adjusted by 180 degrees so that the positive going edges of all occur close to each other. The bits of each stream are assembled into words under the control of a word clock. In one embodiment a common word clock is derived form the set of bit clocks as a whole. In another embodiment each stream is provided with its own word clock which is aligned to positive edges of the respective bit clocks that are close to each other.

29. 发明申请

US20060276204A1 Management and dispatching of mobile service vehicles 有权
公开(公告)号：US20060276204A1
公开(公告)日：2006-12-07
申请号：US11144115
申请日：2005-06-03
申请人： Richard Simpson , Rahmatollah Sohrabi
发明人： Richard Simpson , Rahmatollah Sohrabi
IPC分类号： H04Q7/20
CPC分类号： H04W99/00
摘要： A dispatch hub includes a hub processor and a communications device for communicating with a plurality of field assemblies, which typically are installed in mobile service vehicles. Each field assembly includes a wireless communication device for communicating with the dispatch hub, a geographic positioning device, an RFID reader for reading RFID tags associated with components in the inventory of a service vehicle, and a controller for controlling the collection of field data at the field assembly and forwarding of field data to the dispatch hub. Field data include at least information about the geographic location of the field assembly and component identification data. At the dispatch hub, the need for a specific component at a customer site and the geographic location of the customer site are compared with the forwarded field data to select a service vehicle to travel to the customer site with a needed component.

30. 发明授权

US06614276B2 Flip-flop design 有权
公开(公告)号：US06614276B2
公开(公告)日：2003-09-02
申请号：US09874646
申请日：2001-06-05
申请人： Iain Robertson , Richard Simpson
发明人： Iain Robertson , Richard Simpson
IPC分类号： H03K3356
CPC分类号： H03K3/35625
摘要： A scannable asynchronous preset and/or clear flip-flop having latch circuits 27 and 30. Latch circuit 27 comprises an inverter 28 and a tristate NAND gate 29. Latch circuit 30 comprises an inverter 31 and a tristate NOR gate 32. When the CLK (clock input signal) and CLRZ (the inverse of the clear input signal) are both low, the output of the tristate NOR gate 32 is forced low. Thus the input of inverter 31 is low so that the output signal, Q, is forced low and the inverse output signal, QZ, is forced high. When CLK is high and CLRZ is low the output of tristate NAND gate 29 is forced high so that the input to inverter 28 is high and the input to inverter 31 is low, thereby forcing Q low and QZ high. Thus the outputs Q and QZ are forced low and high respectively when CLRZ is low, regardless of the state of the CLK input.

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