会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 21. 发明授权
    • Display device and manufacturing method of the same
    • 显示装置及其制造方法相同
    • US07407853B2
    • 2008-08-05
    • US11077255
    • 2005-03-11
    • Takuo KaitohEiji OueTakahiro KamoYasukazu KimuraToshihiko Itoga
    • Takuo KaitohEiji OueTakahiro KamoYasukazu KimuraToshihiko Itoga
    • H01L21/8242
    • G02F1/136213G02F1/1368H01L27/1255H01L27/1288
    • The invention provides a method of manufacture of a display device which can achieve a reduction of the manufacturing process. In the manufacturing method, a semiconductor layer is formed over an upper surface of a substrate. An insulation film is formed over an upper surface of the semiconductor layer. Using a mask which covers a first region and exposes a second region, an implantation of impurities into the semiconductor layer is performed in the second region through the insulation film. After the mask is removed, a surface of the insulation film is etched in the first region and the second region to an extent that the insulation film in the second region remains, whereby the film thickness of the insulation film in the second region is set to be smaller than the film thickness of the insulation film in the first region.
    • 本发明提供一种能够实现制造过程减少的显示装置的制造方法。 在制造方法中,在衬底的上表面上形成半导体层。 在半导体层的上表面上形成绝缘膜。 使用覆盖第一区域并露出第二区域的掩模,通过绝缘膜在第二区域中进行杂质注入到半导体层中。 在去除掩模之后,在第一区域和第二区域中蚀刻绝缘膜的表面至第二区域中的绝缘膜残留的程度,从而将第二区域中的绝缘膜的膜厚度设定为 小于第一区域中的绝缘膜的膜厚度。
    • 22. 发明申请
    • MANUFACTURING METHOD OF DISPLAY DEVICE
    • 显示装置的制造方法
    • US20080176351A1
    • 2008-07-24
    • US11843693
    • 2007-08-23
    • Hideaki ShimmotoTakahiro KamoTakeshi NodaTakuo KaitohEiji Oue
    • Hideaki ShimmotoTakahiro KamoTakeshi NodaTakuo KaitohEiji Oue
    • H01L21/00
    • H01L21/02678H01L21/02683H01L21/02686H01L21/02691H01L27/1285H01L29/04
    • The present invention provides a manufacturing method of a display device which can prevent the reduction of a size of a pseudo single-crystalline region having strip-like crystals in forming such a pseudo single-crystalline silicon region on a substrate. A step for forming pseudo single crystals having strip-like crystals on a preset region of a semiconductor film formed on a substrate includes a step for forming the pseudo single crystal by radiating an energy beam to a first region of the semiconductor film while moving a radiation position of the energy beam in a first direction, and a step for forming the pseudo single crystal by radiating the energy beam to a second region of the semiconductor film while moving a radiation position of the energy beam in a second direction opposite to the first direction. The first region and the second region set sizes thereof at a position where the radiation of the energy beam is finished smaller than sizes thereof at a position where the radiation of the energy beam is started. The second region includes a portion where the second region overlaps the first region and a portion where the second region does not overlap the first region.
    • 本发明提供一种显示装置的制造方法,其可以防止在基板上形成这样的假单晶硅区域时具有带状晶体的伪单晶区域的尺寸的减小。 在形成在衬底上的半导体膜的预设区域上形成具有带状晶体的伪单晶的步骤包括:通过在移动辐射的同时将能量束照射到半导体膜的第一区域来形成伪单晶的步骤 能量束在第一方向的位置,以及通过在与第一方向相反的第二方向移动能量束的辐射位置的同时将能量束照射到半导体膜的第二区域来形成伪单晶的步骤 。 第一区域和第二区域在能量束的辐射被完成的位置处的尺寸设定为小于能量束的辐射开始的位置处的尺寸。 第二区域包括第二区域与第一区域重叠的部分和第二区域与第一区域不重叠的部分。
    • 23. 发明申请
    • Display Device and Fabrication Method Thereof
    • 显示装置及其制作方法
    • US20080023704A1
    • 2008-01-31
    • US11782701
    • 2007-07-25
    • TAKESHI NODATakahiro KamoEiji OueMutsuko HatanoTakeshi Sato
    • TAKESHI NODATakahiro KamoEiji OueMutsuko HatanoTakeshi Sato
    • H01L29/04H01L21/00
    • H01L29/04H01L21/02532H01L21/02683H01L21/02691H01L27/1248H01L27/1285
    • The present invention obtains a system-in-panel display device using a high-performance thin film transistor by suppressing aggregation of a molten semiconductor at the time of allowing strip-like pseudo-single crystal to grow continuously with a direction control by radiating beams of continuous oscillation laser to a semiconductor film made of silicon while scanning. A display device includes a silicon nitride film formed on the insulation substrate, a silicon oxide film formed on the silicon nitride film, a semiconductor film formed on the silicon oxide film, and a thin film transistor which uses the semiconductor film. Here, the silicon oxide film is constituted of a first silicon oxide film formed using SiH4 and N2O as raw material gases and a second silicon oxide film formed using a TEOS gas as a raw material gas, and the semiconductor film is made of pseudo-single crystal having strip-like grains.
    • 本发明通过抑制带状伪单晶在通过辐射光束的方向控制而连续生长时,通过抑制熔融半导体的聚集来获得使用高性能薄膜晶体管的面板内系统显示装置 在扫描时对由硅制成的半导体膜进行连续振荡激光。 显示装置包括形成在绝缘基板上的氮化硅膜,形成在氮化硅膜上的氧化硅膜,形成在氧化硅膜上的半导体膜,以及使用该半导体膜的薄膜晶体管。 这里,氧化硅膜由使用SiH 4 N 2和N 2 O作为原料气体形成的第一氧化硅膜和使用TEOS形成的第二氧化硅膜构成 气体作为原料气体,半导体膜由具有带状粒子的假单晶构成。
    • 24. 发明申请
    • Manufacturing method of a display device
    • 显示装置的制造方法
    • US20070072349A1
    • 2007-03-29
    • US11509739
    • 2006-08-25
    • Takuo KaitohEiji OueToshihiko Itoga
    • Takuo KaitohEiji OueToshihiko Itoga
    • H01L21/84H01L21/00
    • H01L21/02675H01L21/2026H01L27/1285H01L27/1296H01L29/04
    • The present invention provides a manufacturing method of a display device which can decrease the lowering of a yield rate of the display device attributed to the aggregations generated by pseudo single crystallization of a silicon film. A manufacturing method of a display device includes a semiconductor film reforming step which reforms a semiconductor film into a second state in which the semiconductor film possesses elongated crystalline particles by radiating a laser beam to the semiconductor film in a first state, an aggregation detecting step which detects the aggregation of the semiconductor film which is generated in the semiconductor film reforming step, and a defect determination step which determines a product as a defective product when a position of the aggregation is present in the inside of the predetermined region and determines the product as a good product when the position of the aggregation is present outside the predetermined region.
    • 本发明提供一种显示装置的制造方法,其能够降低归因于硅膜的伪单晶化产生的聚集的显示装置的成品率的降低。 显示装置的制造方法包括:半导体膜重整工序,其将第一状态下的半导体膜照射激光,将半导体膜改性为半导体膜具有细长结晶粒子的第二状态,聚集检测步骤, 检测在半导体膜重整步骤中产生的半导体膜的聚集,以及缺陷确定步骤,当聚集的位置存在于预定区域的内部时,将产品确定为不合格品,并将产品确定为 当聚集的位置存在于预定区域之外时,产品是良好的。
    • 27. 发明授权
    • Display device and manufacturing method therefor
    • 显示装置及其制造方法
    • US07952095B2
    • 2011-05-31
    • US12208371
    • 2008-09-11
    • Eiji OueTakuo KaitohHidekazu MiyakeToshio MiyazawaYuichiro Takashina
    • Eiji OueTakuo KaitohHidekazu MiyakeToshio MiyazawaYuichiro Takashina
    • H01L29/04H01L21/00
    • H01L27/1229H01L27/1214H01L27/1274H01L29/66765H01L29/78678
    • In a display device of the present invention which forms thin film transistors on a substrate, the thin film transistor comprises: a silicon nitride film which is formed on the substrate in a state that the silicon nitride film covers a gate electrode; a silicon oxide film which is selectively formed on the silicon nitride film; a semiconductor layer which is formed at least on an upper surface of the silicon oxide film and includes a pseudo single crystal layer or a polycrystalline layer; and a drain electrode and a source electrode which are formed on an upper surface of the semiconductor layer by way of a contact layer, wherein either one of the pseudo single crystal layer and the poly-crystalline layer is formed by crystallizing the amorphous silicon layer, and a peripheral-side wall surface of the pseudo single crystal layer or the polycrystalline layer is contiguously constituted with a peripheral-side wall surface of the silicon oxide film below the pseudo single crystal layer or the polycrystalline layer without a stepped portion.
    • 在本发明的在基板上形成薄膜晶体管的显示装置中,薄膜晶体管包括:在氮化硅膜覆盖栅电极的状态下在基板上形成的氮化硅膜; 选择性地形成在氮化硅膜上的氧化硅膜; 形成在所述氧化硅膜的上表面上的半导体层,其包含伪单晶层或多晶层; 以及通过接触层形成在半导体层的上表面上的漏电极和源电极,其中通过使非晶硅层结晶来形成伪单晶层和多晶层中的任一个, 并且伪单晶层或多晶层的外围侧壁表面在不具有台阶部分的伪单晶层或多晶层下方的氧化硅膜的周向侧壁表面附近构成。
    • 28. 发明授权
    • Display device and fabrication method thereof
    • 显示装置及其制造方法
    • US07535024B2
    • 2009-05-19
    • US11600164
    • 2006-11-16
    • Eiji OueToshihiko ItogaToshiki KanekoDaisuke SonodaTakeshi Kuriyagawa
    • Eiji OueToshihiko ItogaToshiki KanekoDaisuke SonodaTakeshi Kuriyagawa
    • H01L29/04
    • H01L29/78621H01L29/42384H01L29/4908H01L29/78696H01L2029/7863
    • The present invention provides a fabrication method of a display device which aims at the reduction of fabricating man-hours. In a fabrication method of a display device having a thin film transistor in which a gate electrode includes a first gate electrode and a second gate electrode which is overlapped to the first gate electrode and has a size thereof in the channel direction set smaller than the corresponding size of the first gate electrode, the semiconductor layer includes a channel region which is overlapped to the second gate electrode, a first impurity region which is overlapped to the first gate electrode and is formed outside the second gate electrode, a second impurity region which is formed outside the gate electrode, and a third conductive impurity region which is formed outside the gate electrode and the second impurity region, the first impurity region, the second impurity region and the third impurity region are respectively formed of the same conductive type, the impurity concentration of the first impurity region is lower than the impurity concentration of the third impurity region, and the impurity concentration of the second impurity region is lower than the impurity concentration of the first impurity region, impurities are collectively implanted into both of the first and second impurity regions such that the impurities are implanted into the first impurity region by way of the first gate electrode and the impurities are implanted into the second impurity region such that a peak position of the impurity concentration in the depth direction is positioned below the semiconductor layer thus lowering the impurity concentration of the second impurity region than the impurity concentration of the first impurity region.
    • 本发明提供了一种旨在减少制造工时的显示装置的制造方法。 在具有薄膜晶体管的显示装置的制造方法中,其中栅电极包括第一栅极和与第一栅电极重叠并且具有小于相应的沟道方向的尺寸的第二栅电极 第一栅电极的尺寸,半导体层包括与第二栅电极重叠的沟道区,与第一栅电极重叠并形成在第二栅电极外的第一杂质区,第二杂质区, 形成在栅极电极外部的第三导电杂质区域和形成在栅电极和第二杂质区域外的第三导电杂质区域,第一杂质区域,第二杂质区域和第三杂质区域分别由相同的导电类型形成,杂质 第一杂质区域的浓度低于第三杂质区域的杂质浓度 第二杂质区域的杂质浓度低于第一杂质区域的杂质浓度,将杂质共同地注入到第一和第二杂质区域中,使得杂质通过第一栅电极注入第一杂质区域 并且将杂质注入到第二杂质区域中,使得深度方向上的杂质浓度的峰值位置位于半导体层的下方,从而降低第二杂质区域的杂质浓度比第一杂质区域的杂质浓度降低。
    • 29. 发明申请
    • Display device and manufacturing method thereof
    • 显示装置及其制造方法
    • US20080142803A1
    • 2008-06-19
    • US12000403
    • 2007-12-12
    • Takuo KaitohEiji Oue
    • Takuo KaitohEiji Oue
    • H01L29/04H01L21/336
    • H01L27/1222H01L27/1296H01L29/04H01L29/458H01L29/78696
    • With the present invention, it is possible to provide a high quality image display by suppressing such faults as malfunction of a circuit or leakage of a current due to hump caused by the characteristic of a thin film transistor at a channel edge portion.An edge portion 302 of a polysilicon layer 301 functioning as a channel layer is converted into a noncrystalline or fine crystalline area. Because a silicon semiconductor film at the channel edge portion 302 is in the fine crystalline or noncrystalline state, a current flowing there is extremely small, or a current does not flow there. Thus, even when a threshold voltage Vth at a channel central portion is different from that at a channel edge portion, performance of the entire thin film transistor film is little affected, so that display faults due to hump are prevented.
    • 通过本发明,可以通过抑制电路的故障或由沟道边缘部分的薄膜晶体管的特性引起的由于隆起引起的电流的泄漏而提供高质量的图像显示。 用作沟道层的多晶硅层301的边缘部分302被转换成非结晶或细晶体区域。 由于沟道边缘部302处的硅半导体膜处于微细或非结晶状态,所以流过的电流极小,或者电流不流过。 因此,即使在通道中心部分的阈值电压Vth与通道边缘部分的阈值电压Vth不同时,薄膜晶体管膜整体的性能也受到很小的影响,从而防止由于突起引起的显示故障。
    • 30. 发明申请
    • Display device and fabrication method thereof
    • 显示装置及其制造方法
    • US20070108449A1
    • 2007-05-17
    • US11600164
    • 2006-11-16
    • Eiji OueToshihiko ItogaToshiki KanekoDaisuke SonodaTakeshi Kuriyagawa
    • Eiji OueToshihiko ItogaToshiki KanekoDaisuke SonodaTakeshi Kuriyagawa
    • H01L29/04H01L21/84
    • H01L29/78621H01L29/42384H01L29/4908H01L29/78696H01L2029/7863
    • The present invention provides a fabrication method of a display device which aims at the reduction of fabricating man-hours. In a fabrication method of a display device having a thin film transistor in which a gate electrode includes a first gate electrode and a second gate electrode which is overlapped to the first gate electrode and has a size thereof in the channel direction set smaller than the corresponding size of the first gate electrode, the semiconductor layer includes a channel region which is overlapped to the second gate electrode, a first impurity region which is overlapped to the first gate electrode and is formed outside the second gate electrode, a second impurity region which is formed outside the gate electrode, and a third conductive impurity region which is formed outside the gate electrode and the second impurity region, the first impurity region, the second impurity region and the third impurity region are respectively formed of the same conductive type, the impurity concentration of the first impurity region is lower than the impurity concentration of the third impurity region, and the impurity concentration of the second impurity region is lower than the impurity concentration of the first impurity region, impurities are collectively implanted into both of the first and second impurity regions such that the impurities are implanted into the first impurity region by way of the first gate electrode and the impurities are implanted into the second impurity region such that a peak position of the impurity concentration in the depth direction is positioned below the semiconductor layer thus lowering the impurity concentration of the second impurity region than the impurity concentration of the first impurity region.
    • 本发明提供了一种旨在减少制造工时的显示装置的制造方法。 在具有薄膜晶体管的显示装置的制造方法中,其中栅电极包括第一栅极和与第一栅电极重叠并且具有小于相应的沟道方向的尺寸的第二栅电极 第一栅电极的尺寸,半导体层包括与第二栅电极重叠的沟道区,与第一栅电极重叠并形成在第二栅电极外的第一杂质区,第二杂质区, 形成在栅电极外部的第三导电杂质区域和形成在栅电极和第二杂质区域外的第三导电杂质区域,第一杂质区域,第二杂质区域和第三杂质区域分别由相同的导电型形成,杂质 第一杂质区域的浓度低于第三杂质区域的杂质浓度 第二杂质区域的杂质浓度低于第一杂质区域的杂质浓度,将杂质共同地注入到第一和第二杂质区域中,使得杂质通过第一栅电极注入第一杂质区域 并且将杂质注入到第二杂质区域中,使得深度方向上的杂质浓度的峰值位置位于半导体层的下方,从而降低第二杂质区域的杂质浓度比第一杂质区域的杂质浓度降低。