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21. 发明授权

US07274312B2 High rate coding for media noise 有权
标题翻译：高速编码媒体噪声
公开(公告)号：US07274312B2
公开(公告)日：2007-09-25
申请号：US11359453
申请日：2006-04-06
申请人： William G. Bliss , Andrei Vityaev , Razmik Karabed
发明人： William G. Bliss , Andrei Vityaev , Razmik Karabed
IPC分类号： H03M7/00
CPC分类号： G11B20/1426 , G11B20/10009 , G11B20/1833 , G11B2020/1446 , H03M5/145 , H03M13/093
摘要： An apparatus has a conversion circuit, a precoder circuit, and a selection circuit. The conversion circuit converts user data b1, b2, b. . . bk to a coded sequence c0, c1, c2 . . . cq. The selection circuit selects c0 in the coded sequence c0, c1, c2 . . . cq such that the output of the precoder circuit has less than a maximum number q of transitions. The conversion circuit may include an encoder circuit to convert user data b1, b2, b3 . . . bk to a sequence c1, c2 . . . cq, and a transition minimization circuit to add c0 to the sequence c1, c2 . . . cq. The apparatus may have a circuit to add at least one additional bit, which may be a parity bit, to the coded sequence c0, c1, c2 . . . cq.
摘要翻译：一种装置具有转换电路，预编码器电路和选择电路。转换电路转换用户数据b 1，b 2，b。。。对于编码序列c 0，c 1，c 2，...，。。 c 。选择电路在编码序列c 0 0，c 1，c 2 2中选择c <0> 0 。。。使得预编码器电路的输出具有小于转换的最大数量q。转换电路可以包括用于转换用户数据b 1，b 2，b 3 3的编码器电路。。。 c 到序列c 1，c 2。。。以及向序列c 1，c 2 2加上c 0的转换最小化电路。。。 c 。该装置可以具有电路，用于将至少一个额外的位（其可以是奇偶校验位）添加到编码序列c 0，c 1，c 2 。。。 c 。

22. 发明授权

US07137056B2 Low error propagation rate 32/34 trellis code 有权
标题翻译：低误差传播率32/34格状码
公开(公告)号：US07137056B2
公开(公告)日：2006-11-14
申请号：US10253903
申请日：2002-09-25
申请人： Jonathan Ashley , William G. Bliss , Razmik Karabed , Kaichi Zhang
发明人： Jonathan Ashley , William G. Bliss , Razmik Karabed , Kaichi Zhang
IPC分类号： H03M13/00
CPC分类号： H04L1/006 , H03M5/145 , H03M13/41 , H04L1/0041 , H04L1/0054
摘要： The present invention relates to a coding system characterized by various combinations of the following properties: 1) Even parity at the output of d of the precoder; 2) A coding rate of 32/34; 3) At least 9 ones per codeword; 4) No more than 13 consecutive zeros in the stream of encoded data (G=13); 5) No more than 13 consecutive zeros in any run of every-other-bit in the stream of codewords (I=13); 6) For closed error events in y or y′ having squared-distance≦(1 to 1.5)×dmfb2 in the detector, the decoder produces at most 4 corresponding erroneous data bytes; 7) Decoding of a 34 bit codeword may begin when 19 of its bits have been received; 8) If the Viterbi detector 108 outputs Non-Return to Zero (NRZ) symbols, then its output is filtered by (1⊕D^2) before being decoded, but if the Viterbi detector outputs NRZ Inverter (NRZI) symbols, then its output is decoded directly; and 9) The even parity is on NRZ symbols.
摘要翻译：本发明涉及以下特性的各种组合为特征的编码系统：1）预编码器d的输出端的偶校验; 2）编码率32/34; 3）每个码字至少有9个; 4）编码数据流中不超过13个连续的零（G = 13）; 5）代码字流（I = 13）中每个其他位的任何运行中不超过13个连续的零; 6）对于检测器中y或y'具有平方距离<=（1到1.5）xD mfb 2> / 2>的闭合误差事件，解码器产生最多4个相应的错误的数据字节; 7）当接收到其位的19个时，可以开始对34位码字的解码; 8）如果维特比检测器108输出非归零（NRZ）符号，则在解码之前将其输出滤波为（1⊕D^ 2），但是如果维特比检测器输出NRZ变换器（NRZI）符号，则其输出直接解码; 和9）偶数奇偶校验位在NRZ符号上。

23. 发明授权

US06507546B1 2,2,1 Asymmetric partial response target in a sampled amplitude read channel for disk storage systems 有权
标题翻译： 2,2,1个磁盘存储系统采样振幅读通道中的非对称部分响应目标
公开(公告)号：US06507546B1
公开(公告)日：2003-01-14
申请号：US09439560
申请日：1999-11-12
申请人： William G. Bliss , Sian She , Lisa C. Sundell
发明人： William G. Bliss , Sian She , Lisa C. Sundell
IPC分类号： G11B7005
CPC分类号： G11B20/10287 , G11B20/10 , G11B20/10009 , G11B20/10055
摘要： A sampled amplitude read channel is disclosed for reading data recorded on a disk storage medium by detecting an estimated data sequence from a sequence of read signal sample values generated by an analog read signal emanating from a read head positioned over the disk storage medium. A sampling device samples the analog read signal to generate the read signal sample values, and a discrete-time equalizer equalizes the read signal sample values according to an asymmetric partial response target comprising a dipulse response of the form: (. . . , 0, 0,+X0,+X1,−X2,−X3,−X4, 0, 0, . . . ) where X0−X4 are non-zero to thereby generate equalized sample values. In the embodiments disclosed herein, X0−X4 are 2,2,1,2,1 respectively. A discrete-time sequence detector detects the estimated data sequence from the equalized sample values.
摘要翻译：公开了一种采样幅度读取通道，用于通过从由位于盘存储介质上的读取头发出的模拟读取信号产生的读取信号样本值的序列中检测估计的数据序列来读取记录在盘存储介质上的数据。采样设备对模拟读取信号进行采样以产生读取信号采样值，并且离散时间均衡器根据包括以下形式的二次脉冲响应的不对称部分响应目标来均衡读取信号采样值：其中X0-X4是非 - 从而产生均衡的样本值。在本文公开的实施方案中，X0-X4分别为2,2,1,2,1。离散时间序列检测器从均衡的样本值检测估计的数据序列。

24. 发明授权

US6141169A System and method for control of low frequency input levels to an amplifier and compensation of input offsets of the amplifier 失效
标题翻译：用于控制放大器的低频输入电平的系统和方法以及放大器的输入偏移的补偿
公开(公告)号：US6141169A
公开(公告)日：2000-10-31
申请号：US956569
申请日：1997-10-23
申请人： David M. Pietruszynski , Jerrell P. Hein , William G. Bliss , German S. Feyh
发明人： David M. Pietruszynski , Jerrell P. Hein , William G. Bliss , German S. Feyh
IPC分类号： G11B5/00 , G11B5/09 , G11B7/09 , G11B20/10 , H03F1/30 , H03F3/45 , G11B5/02
CPC分类号： H03F3/45748 , G11B20/10009 , H03F1/303 , H03F3/45973 , G11B2005/0013 , G11B5/09 , G11B7/0941 , G11B7/0948
摘要： A system and method for an amplifier control circuit is provided which does not require the use of a large off-chip or on-chip capacitor for achieving a low frequency coupling corner, while still effectively allowing AC coupling the data detection circuit. In addition, the input offset voltage to the amplifier may be compensated and the inherent random low frequency input voltages provided to the amplifier may be controlled or canceled. Further, the amplifier control circuitry includes a freeze capability which allows the control circuitry to halt all updates to the input offset/low frequency control circuit when the voltage input signal is interrupted. In addition low frequency control and offset compensation updates may be performed without causing large output signal glitches so that the integrity of the received signal will not be compromised. In a preferred embodiment the system and method may be utilized for data detection circuits utilized in conjunction with optical disks.
摘要翻译：提供一种用于放大器控制电路的系统和方法，其不需要使用大的片外或片上电容器来实现低频耦合角，同时仍然有效地允许AC耦合数据检测电路。此外，可以补偿放大器的输入失调电压，并且可以控制或取消提供给放大器的固有的随机低频输入电压。此外，放大器控制电路包括冻结能力，其允许控制电路在电压输入信号中断时停止对输入偏移/低频控制电路的所有更新。此外，可以执行低频控制和偏移补偿更新，而不会导致大的输出信号毛刺，从而不会损害接收信号的完整性。在优选实施例中，系统和方法可以用于与光盘结合使用的数据检测电路。

25. 发明授权

US07178084B2 Short error propagation modulation coding method and device 有权
标题翻译：短误差传播调制编码方法及装置
公开(公告)号：US07178084B2
公开(公告)日：2007-02-13
申请号：US10253916
申请日：2002-09-25
申请人： William G. Bliss , Andrei Vityaev , Razmik Karabed
发明人： William G. Bliss , Andrei Vityaev , Razmik Karabed
IPC分类号： H03M13/00
CPC分类号： G11B20/1426 , H03M13/31
摘要： A data coding method produces codewords with a scheme that changes for different codewords, and decodes codewords with a scheme that remains constant for all codewords. The coding method receives k user bits, codes the user bits to produce k+r output bits, corrupts any one of the output bits, and accurately reproduces at least k−r−1 user bits. Codewords coded using the appropriate initial conditions are output. For each codeword, the appropriate initial conditions are appended to the codeword coded therefrom.
摘要翻译：数据编码方法产生具有针对不同码字改变的方案的码字，并且用对所有码字保持恒定的方案对码字进行解码。编码方法接收k个用户比特，对用户比特进行编码以产生k + r个输出比特，破坏任何一个输出比特，并且至少准确地再生k-r-1个用户比特。输出使用适当的初始条件编码的代码字。对于每个码字，适当的初始条件被附加到从其编码的码字。

26. 发明授权

US06774825B2 Modulation coding based on an ECC interleave structure 失效
标题翻译：基于ECC交错结构的调制编码
公开(公告)号：US06774825B2
公开(公告)日：2004-08-10
申请号：US10253909
申请日：2002-09-25
申请人： William G. Bliss , Andrei Vityaev , Razmik Karabed , Ali Najafi , Jonathan Ashley
发明人： William G. Bliss , Andrei Vityaev , Razmik Karabed , Ali Najafi , Jonathan Ashley
IPC分类号： H03M700
CPC分类号： H03M13/27 , G11B20/1426 , G11B20/1833 , G11B20/1866 , H03M5/145
摘要： A system and method to modulate coding based on an ECC interleave structure include a first encoder encoding an input stream of bits comprising input blocks sorted into interleaves. A second encoder encodes a subset of the input blocks to produce output blocks, where the first encoder permutates a remainder of the input blocks and the output blocks to produce a codeword.
摘要翻译：基于ECC交错结构来调制编码的系统和方法包括编码包括被排序成交织的输入块的位的输入流的第一编码器。第二编码器编码输入块的子集以产生输出块，其中第一编码器排列剩余的输入块和输出块以产生码字。

27. 发明授权

US06396788B1 Re-timing and up-sampling a sub-sampled user data signal from in an optical disk 有权
标题翻译：对来自光盘的子采样用户数据信号进行重新定时和上采样
公开(公告)号：US06396788B1
公开(公告)日：2002-05-28
申请号：US09351839
申请日：1999-07-13
申请人： German S. O. Feyh , James Mark Graba , William G. Bliss , Chung-Kal Chow
发明人： German S. O. Feyh , James Mark Graba , William G. Bliss , Chung-Kal Chow
IPC分类号： G11B509
CPC分类号： G11B20/10222 , G11B20/10009 , G11B20/10037 , G11B20/1403 , H04L7/0029
摘要： An optical disk system comprises an optical disk device and control circuitry. The optical disk device stores user data and transfers an analog signal representing the user data to the control circuitry. The control circuitry sub-samples the analog signal to generate a sub-sampled signal. The control circuitry up-samples and re-times the sub-sampled signal using a control signal to generate an up-sampled and re-timed signal. A digital feedback loop in the control circuitry generates the control signal.
摘要翻译：光盘系统包括光盘装置和控制电路。光盘装置存储用户数据，并将表示用户数据的模拟信号传送到控制电路。控制电路对模拟信号进行子采样以产生次采样信号。控制电路使用控制信号对子采样信号进行上采样和重新乘法，以产生上采样和重定时信号。控制电路中的数字反馈回路产生控制信号。

28. 发明授权

US5585975A Equalization for sample value estimation and sequence detection in a sampled amplitude read channel 失效
标题翻译：采样幅度读取通道中采样值估计和序列检测的均衡
公开(公告)号：US5585975A
公开(公告)日：1996-12-17
申请号：US340993
申请日：1994-11-17
申请人： William G. Bliss
发明人： William G. Bliss
IPC分类号： G11B20/10 , G11B5/09 , G11B5/035
CPC分类号： G11B20/10055 , G11B20/10009 , G11B20/10037 , G11B20/10064 , G11B20/10074
摘要： In a sampled amplitude magnetic read channel, pulses in an analog signal corresponding to flux transitions on a magnetic medium are sampled and equalized into a first equalization for estimating sample values and into a second equalization for sequence detection of digital data. A gain and phase error detector generate respective error signals corresponding to the difference between estimated and actual sample values. Gain control and timing recovery use the error signals to adjust the amplitude and sampling frequency/phase of the analog read signal. A pair of programmable discrete time filters equalize the signal samples into the desired equalization. In a first embodiment, the signal samples are equalized to PR4 for estimating sample values and to EPR4 for sequence detection. A slicer processes the PR4 equalized sample values to generate the estimated sample values. The gain and phase error detectors generate the corresponding error signals according to a minimum mean squared error stochastic gradient algorithm. In a second embodiment, the signal samples are equalized to EPR4 for estimating sample values and to EEPR4 for sequence detection. A pulse detector processes the EPR4 equalized sample values in order to detect pulses in the analog signal and generate a corresponding pulse detect signal. The gain and phase error detectors generate the corresponding error signals in response to the pulse detect signal. To minimize circuitry and associated cost, the discrete time equalizing filters are implemented in series. For d=1 recording, the second equalizing filter is a (1+D) notch filter that attenuates the noise caused by clocking the discrete time circuitry at half the sampling rate, thereby increasing the accuracy of the sequence detector.
摘要翻译：在采样振幅磁读取通道中，对应于磁介质上的磁通转换的模拟信号中的脉冲被采样并均衡为用于估计采样值的第一均衡和用于数字数据的序列检测的第二均衡。增益和相位误差检测器产生对应于估计和实际采样值之差的各个误差信号。增益控制和定时恢复使用误差信号来调整模拟读取信号的幅度和采样频率/相位。一对可编程离散时间滤波器将信号样本均衡到所需的均衡。在第一实施例中，信号样本被均衡为PR4以估计样本值，并且将EPR4用于序列检测。切片机处理PR4均衡样本值以生成估计的样本值。增益和相位误差检测器根据最小均方误差随机梯度算法产生相应的误差信号。在第二实施例中，将信号样本与用于估计采样值的EPR4相等，并将EEPR4与序列检测相等。脉冲检测器处理EPR4均衡的采样值，以便检测模拟信号中的脉冲并产生相应的脉冲检测信号。增益和相位误差检测器根据脉冲检测信号产生相应的误差信号。为了最小化电路和相关成本，离散时间均衡滤波器被串联实现。对于d = 1记录，第二均衡滤波器是（1 + D）陷波滤波器，其衰减以采样率的一半对离散时间电路计时引起的噪声，从而提高了序列检测器的精度。

29. 发明授权

US5563746A Real time media defect scanning in a sampled amplitude read channel 失效
标题翻译：采样振幅读通道中的实时介质缺陷扫描
公开(公告)号：US5563746A
公开(公告)日：1996-10-08
申请号：US341234
申请日：1994-11-17
申请人： William G. Bliss
发明人： William G. Bliss
IPC分类号： G11B5/09 , G11B20/18 , G11B27/36 , G11B5/035
CPC分类号： G11B20/10055 , G11B20/10037 , G11B20/1816 , G11B20/182 , G11B27/36 , G11B5/09 , G11B2020/1476
摘要： A real time defect scanning system integrated into a sampled amplitude read channel for detecting defects in a magnetic storage medium using a discrete time filter having an impulse response substantially matched to an error signature in a read back signal caused by a defect in the medium. The scanning system operates by writing a predetermined bit sequence to the storage device and detecting medium defects upon read back. In a sinusoidal read signal mode, a discrete time notch filter removes the fundamental frequency so that any remaining sidebands indicate a media defect. The discrete time defect filter enhances the signal so that a defect can be detected with a discrete time energy detector. The impulse responses of the notch filter and defect detection filter are programmable in order to adapt the defect scanning system to a particular disk drive, data density, or magnetic media.
摘要翻译：一种集成到采样幅度读取通道中的实时缺陷扫描系统，用于使用离散时间滤波器来检测磁存储介质中的缺陷，所述离散时间滤波器具有与由介质中的缺陷引起的回读信号中的错误签名基本匹配的脉冲响应。扫描系统通过将预定的比特序列写入存储装置并在读回时检测介质缺陷来操作。在正弦读信号模式中，离散时间陷波滤波器去除基频，使得任何剩余边带指示介质缺陷。离散时间缺陷滤波器增强了信号，从而可以用离散的时间能量检测器检测到缺陷。陷波滤波器和缺陷检测滤波器的脉冲响应是可编程的，以便将缺陷扫描系统适应于特定的磁盘驱动器，数据密度或磁介质。

30. 发明授权

US07904795B2 Iterative decoder with stopping criterion generated from error location polynomial 有权
标题翻译：具有从错误位置多项式生成的停止标准的迭代解码器
公开(公告)号：US07904795B2
公开(公告)日：2011-03-08
申请号：US12397237
申请日：2009-03-03
申请人： Yu Liao , William G. Bliss , Engling Yeo
发明人： Yu Liao , William G. Bliss , Engling Yeo
IPC分类号： H03M13/00
CPC分类号： H03M13/3753 , H03M13/1525 , H03M13/2906 , H03M13/2936
摘要： A decoder for error correction an encoded message, such as one encoded by a turbo encoder, with reduced iterations due to an improved stopping criterion. The decoder includes an error correction loop that iteratively processes a message that is encoded prior to transmittal over a communication channel. The error correction loop generates, such as with a Reed-Solomon decoder, an error location polynomial in each iterative process. A stopping mechanism in the decoder allows an additional iteration of the message decoding based on the error location polynomial, such as by obtaining the degree of the error location polynomial and comparing it to a threshold. In one example, the threshold is the maximum number of symbol errors correctable by the Reed-Solomon code embodied in the decoder. The stopping mechanism allows additional iterations when the stopping criterion (or polynomial degree) is greater than the maximum number of symbol errors correctable by the Reed-Solomon code.
摘要翻译：用于由编码消息（例如由turbo编码器编码的编码消息）进行纠错的解码器，由于改进的停止标准而具有减少的迭代。解码器包括错误校正循环，其循环地处理在通过通信信道传送之前被编码的消息。误差校正循环，例如利用Reed-Solomon解码器，在每个迭代过程中产生误差位置多项式。解码器中的停止机制允许基于错误位置多项式的消息解码的附加迭代，例如通过获得错误位置多项式的程度并将其与阈值进行比较。在一个示例中，阈值是由解码器中实现的Reed-Solomon码可校正的符号错误的最大数量。当停止标准（或多项式度）大于由里德 - 所罗门码可校正的符号错误的最大数量时，停止机制允许额外的迭代。

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