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21. 发明授权

US07732266B2 Thin film array panel and manufacturing method thereof 有权
标题翻译：薄膜阵列面板及其制造方法
公开(公告)号：US07732266B2
公开(公告)日：2010-06-08
申请号：US12172701
申请日：2008-07-14
申请人： Sung-Man Kim , Young-Goo Song , Hyang-Shik Kong , Dong-Hyun Ki , Seong-Young Lee , Joo-Ae Yoon , Jong-Woong Chang
发明人： Sung-Man Kim , Young-Goo Song , Hyang-Shik Kong , Dong-Hyun Ki , Seong-Young Lee , Joo-Ae Yoon , Jong-Woong Chang
IPC分类号： H01L21/00
CPC分类号： H01L27/016 , G02F1/13458 , G02F1/136227 , H01L27/12 , H01L27/1244 , H01L27/1248 , H01L27/1288 , H01L27/3244 , H01L29/456 , H01L29/4908
摘要： A thin film array panel is provided, which includes: a plurality of signal lines including contact parts for contact with an external device; a plurality of thin film transistors connected to the signal lines; an insulating layer formed on the signal lines and the thin film transistors; and a plurality of pixel electrodes formed on the insulating layer and connected to the thin film transistors, wherein the insulating layer includes a contact portion disposed on the contact parts of the signal lines and having a thickness smaller than other portions and the contact portion of the insulating layer includes an inclined portion having an inclination angle smaller than about 45 degrees.
摘要翻译：提供一种薄膜阵列面板，其包括：多条信号线，包括用于与外部装置接触的接触部分; 连接到信号线的多个薄膜晶体管; 形成在信号线和薄膜晶体管上的绝缘层; 以及形成在所述绝缘层上并连接到所述薄膜晶体管的多个像素电极，其中所述绝缘层包括设置在所述信号线的接触部分上并具有小于其它部分的厚度的接触部分，并且所述接触部分绝缘层包括具有小于约45度的倾斜角度的倾斜部分。

22. 发明申请

US20090184323A1 THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：US20090184323A1
公开(公告)日：2009-07-23
申请号：US12240707
申请日：2008-09-29
申请人： Byung-Duk YANG , Eun-Guk Lee , Hyang-Shik Kong , Kyoung-Tai Han
发明人： Byung-Duk YANG , Eun-Guk Lee , Hyang-Shik Kong , Kyoung-Tai Han
IPC分类号： H01L27/146 , H01L21/28
CPC分类号： H01L27/124 , G02F1/136209 , G02F1/136286 , H01L29/458 , H01L29/4908
摘要： The present invention relates to a thin film transistor array panel and a method for manufacturing the same. A thin film transistor array panel according to the present invention includes a substrate, a light blocking member formed on the substrate and including a first furrow and a receiving portion, a gate line disposed on the first furrow, a semiconductor layer disposed on the gate line, a source electrode and a drain electrode formed on the semiconductor layer, and a pixel electrode connected to the drain electrode. The source electrode is an extension of the data line.
摘要翻译：本发明涉及一种薄膜晶体管阵列面板及其制造方法。根据本发明的薄膜晶体管阵列面板包括基板，形成在基板上并包括第一沟槽和接收部分的遮光件，设置在第一沟槽上的栅极线，设置在栅极线上的半导体层形成在半导体层上的源电极和漏电极以及连接到漏电极的像素电极。源电极是数据线的扩展。

23. 发明授权

US07538848B2 Array substrate, method of manufacturing the same and display apparatus having the same 有权
标题翻译：阵列基板及其制造方法以及具有该基板的显示装置
公开(公告)号：US07538848B2
公开(公告)日：2009-05-26
申请号：US10886530
申请日：2004-07-09
申请人： Myung-Jae Park , Hyang-Shik Kong
发明人： Myung-Jae Park , Hyang-Shik Kong
IPC分类号： G02F1/1345 , G02F1/1343
CPC分类号： G02F1/13454 , G09G3/20 , G09G2300/0408 , G09G2310/0267 , G09G2310/0275 , G09G2330/08
摘要： A first wiring is formed on an array substrate, such that the first wiring has a first protrusion. A second wiring is formed on a different layer from that of the first wiring, such that a portion of the second wiring overlaps with the first protrusion. A protection layer that covers the first and second wirings is formed, such that the protection layer has first and second contact holes that expose the first and second wirings, respectively. Then, a third wiring that electrically connects the first wiring to the second wiring through the first and second contact holes is formed. When electrical connection between the first and second wirings is abnormal, a laser beam is irradiated toward the first protrusion, so that the electrical connection may be repaired.
摘要翻译：在阵列基板上形成第一布线，使得第一布线具有第一突起。第二布线形成在与第一布线不同的层上，使得第二布线的一部分与第一突起重叠。形成覆盖第一和第二布线的保护层，使得保护层具有分别暴露第一和第二布线的第一和第二接触孔。然后，形成通过第一和第二接触孔将第一布线电连接到第二布线的第三布线。当第一和第二布线之间的电连接异常时，向第一突起照射激光束，从而可以修复电连接。

24. 发明授权

US07501655B2 Thin film transistor array panel 有权
标题翻译：薄膜晶体管阵列面板
公开(公告)号：US07501655B2
公开(公告)日：2009-03-10
申请号：US11749426
申请日：2007-05-16
申请人： Kyung-Wook Kim , Beom-Jun Kim , Sung-Man Kim , Byeong-Jae Ahn , Young-Goo Song , Hyang-Shik Kong
发明人： Kyung-Wook Kim , Beom-Jun Kim , Sung-Man Kim , Byeong-Jae Ahn , Young-Goo Song , Hyang-Shik Kong
IPC分类号： H01L29/04
CPC分类号： H01L27/124 , G02F1/136209 , G02F1/136213 , G02F1/136227 , G02F2001/136218 , G02F2001/136222 , H01L27/1214 , H01L27/1288
摘要： A thin film array panel is provided, which includes: a gate line formed on a substrate; a first insulating layer formed on the gate line; a semiconductor layer formed on the gate insulating layer; a data line formed on the gate insulating layer and intersecting the gate line; a drain electrode formed at least on the semiconductor layer; a conductor arranged in parallel to the data line; a second insulating layer formed on the data line, the drain electrode, and the conductor and having a first contact hole exposing a portion of the drain electrode; and a pixel electrode formed on the second insulating layer, connected to the drain electrode through the first contact hole, fully covering the data line.
摘要翻译：提供薄膜阵列面板，其包括：形成在基板上的栅极线; 形成在栅极线上的第一绝缘层; 形成在所述栅极绝缘层上的半导体层; 形成在栅极绝缘层上并与栅极线相交的数据线; 至少形成在所述半导体层上的漏电极; 与数据线平行布置的导体; 形成在所述数据线上的第二绝缘层，所述漏电极和所述导体，并且具有暴露所述漏电极的一部分的第一接触孔; 以及形成在第二绝缘层上的像素电极，通过第一接触孔连接到漏电极，完全覆盖数据线。

25. 发明授权

US07436479B2 Thin film panel for preventing stitch defect 有权
标题翻译：用于防止针迹缺陷的薄膜面板
公开(公告)号：US07436479B2
公开(公告)日：2008-10-14
申请号：US11747719
申请日：2007-05-11
申请人： Myung-Jae Park , Young-Joon Rhee , Hyeong-Jun Park , Hyang-Shik Kong
发明人： Myung-Jae Park , Young-Joon Rhee , Hyeong-Jun Park , Hyang-Shik Kong
IPC分类号： G02F1/1343
CPC分类号： G02F1/136286 , G02F1/133707 , G02F2001/13625
摘要： A thin film panel is provided, which includes: a substrate; a first signal line formed on the substrate; a second signal line that intersects the first signal line and includes first and second portions being substantially rectilinear and disposed on different straight lines and a connection connected to the first and the second portions; and first and second pixel electrodes disposed adjacent to the second signal line and overlapping the first and the second portions of the second signal line, respectively.
摘要翻译：提供薄膜面板，其包括：基板; 形成在所述基板上的第一信号线; 第二信号线与第一信号线相交并且包括基本上直线的第一和第二部分，并且设置在不同的直线上，以及连接到第一和第二部分的连接; 以及与第二信号线相邻设置并与第二信号线的第一和第二部分重叠的第一和第二像素电极。

26. 发明授权

US07289171B2 Thin film transistor array panel for liquid crystal display having pixel electrode 有权
标题翻译：具有像素电极的液晶显示器的薄膜晶体管阵列面板
公开(公告)号：US07289171B2
公开(公告)日：2007-10-30
申请号：US11551450
申请日：2006-10-20
申请人： Dong-Gyu Kim , Hyang-Shik Kong , Jang-Soo Kim
发明人： Dong-Gyu Kim , Hyang-Shik Kong , Jang-Soo Kim
IPC分类号： G02F1/136 , G02F1/1343
CPC分类号： G02F1/136213 , G02F1/1337 , G02F1/133784 , G02F1/134336 , G02F1/136227 , G02F2201/123
摘要： A TFT array panel includes an insulating substrate, a gate line and a storage electrode line formed thereon. The gate line and the storage electrode line are covered with a gate insulating layer, and a semiconductor island is formed on the gate insulating layer. A pair of ohmic contacts are formed on the semiconductor island, and a data line and a drain electrode are formed thereon. The data line and the drain electrode are covered with a passivation layer having a contact hole exposing the drain electrode. A pixel electrode is formed on the passivation layer and connected to the drain electrode through the contact hole. The TFT array panel is covered with an alignment layer rubbed approximately in a direction from the upper left corner to the lower right corner of the TFT array panel or the pixel electrodes. The pixel electrode has approximately a rectangular shape and overlaps the gate line and the data line. The pixel electrode has an expansion located near the upper left corner of the pixel electrode to increase the width of the corresponding overlapping area between the pixel electrode and the gate line and/or the data line.
摘要翻译： TFT阵列面板包括绝缘基板，栅极线和形成在其上的存储电极线。栅极线和存储电极线被栅极绝缘层覆盖，并且在栅极绝缘层上形成半导体岛。在半导体岛上形成一对欧姆接触，在其上形成数据线和漏电极。数据线和漏电极被具有暴露漏电极的接触孔的钝化层覆盖。像素电极形成在钝化层上，并通过接触孔与漏电极连接。 TFT阵列面板被大致沿着从TFT阵列板的左上角到右下角或像素电极的方向摩擦的取向膜覆盖。像素电极具有大致矩形形状并且与栅极线和数据线重叠。像素电极具有位于像素电极的左上角附近的扩展部，以增加像素电极与栅极线和/或数据线之间的对应重叠区域的宽度。

27. 发明申请

US20070134858A1 Thin Film Transistor Array Panel and Manufacturing Method Thereof 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20070134858A1
公开(公告)日：2007-06-14
申请号：US11674457
申请日：2007-02-13
申请人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
发明人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
IPC分类号： H01L21/84
CPC分类号： G02F1/136227 , G02F2001/136236 , H01L27/1244 , H01L27/1248
摘要： A thin film transistor array panel is provided, which includes: a gate line, a gate insulating layer, and a semiconductor layer sequentially formed on a substrate; a data line and a drain electrode formed at least on the semiconductor layer; a first passivation layer formed on the data line and the drain electrode and having a first contact hole exposing the drain electrode at least in part; a second passivation layer formed on the first passivation layer and having a second contact hole that is disposed on the first contact hole and has a first bottom edge placed outside the first contact hole and a second bottom edge placed inside the first contact hole; and a pixel electrode formed on the second passivation layer and connected to the drain electrode through the first and the second contact holes.
摘要翻译：提供薄膜晶体管阵列面板，其包括：顺序地形成在基板上的栅极线，栅极绝缘层和半导体层; 至少形成在所述半导体层上的数据线和漏电极; 形成在所述数据线和所述漏电极上的第一钝化层，并且具有至少部分地暴露所述漏电极的第一接触孔; 第二钝化层，其形成在所述第一钝化层上，并且具有设置在所述第一接触孔上并具有放置在所述第一接触孔外部的第一底部边缘的第二接触孔和放置在所述第一接触孔内部的第二底部边缘; 以及形成在所述第二钝化层上并通过所述第一和第二接触孔连接到所述漏电极的像素电极。

28. 发明申请

US20050110019A1 Thin film transistor array panel and manufacturing method thereof 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20050110019A1
公开(公告)日：2005-05-26
申请号：US10915958
申请日：2004-08-11
申请人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
发明人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
IPC分类号： H01L21/77 , H01L21/84 , H01L27/12 , H01L29/04
CPC分类号： G02F1/136227 , G02F2001/136236 , H01L27/1244 , H01L27/1248
摘要： A thin film transistor array panel is provided, which includes: a gate line, a gate insulating layer, and a semiconductor layer sequentially formed on a substrate; a data line and a drain electrode formed at least on the semiconductor layer; a first passivation layer formed on the data line and the drain electrode and having a first contact hole exposing the drain electrode at least in part; a second passivation layer formed on the first passivation layer and having a second contact hole that is disposed on the first contact hole and has a first bottom edge placed outside the first contact hole and a second bottom edge placed inside the first contact hole; and a pixel electrode formed on the second passivation layer and connected to the drain electrode through the first and the second contact holes.
摘要翻译：提供薄膜晶体管阵列面板，其包括：顺序地形成在基板上的栅极线，栅极绝缘层和半导体层; 至少形成在所述半导体层上的数据线和漏电极; 形成在所述数据线和所述漏电极上的第一钝化层，并且具有至少部分地暴露所述漏电极的第一接触孔; 第二钝化层，其形成在所述第一钝化层上，并且具有设置在所述第一接触孔上并具有放置在所述第一接触孔外部的第一底部边缘的第二接触孔和放置在所述第一接触孔内部的第二底部边缘; 以及形成在所述第二钝化层上并通过所述第一和第二接触孔连接到所述漏电极的像素电极。

29. 发明申请

US20050012873A1 Array substrate, method of manufacturing the same and display apparatus having the same 有权
标题翻译：阵列基板及其制造方法以及具有该基板的显示装置
公开(公告)号：US20050012873A1
公开(公告)日：2005-01-20
申请号：US10886530
申请日：2004-07-09
申请人： Myung-Jae Park , Hyang-Shik Kong
发明人： Myung-Jae Park , Hyang-Shik Kong
IPC分类号： G02F1/133 , G02F1/1362 , G09G3/20 , G02F1/136
CPC分类号： G02F1/13454 , G09G3/20 , G09G2300/0408 , G09G2310/0267 , G09G2310/0275 , G09G2330/08
摘要： A first wiring is formed on an array substrate, such that the first wiring has a first protrusion. A second wiring is formed on a different layer from that of the first wiring, such that a portion of the second wiring overlaps with the first protrusion. A protection layer that covers the first and second wirings is formed, such that the protection layer has first and second contact holes that expose the first and second wirings, respectively. Then, a third wiring that electrically connects the first wiring to the second wiring through the first and second contact holes is formed. When electrical connection between the first and second wirings is abnormal, a laser beam is irradiated toward the first protrusion, so that the electrical connection may be repaired.
摘要翻译：在阵列基板上形成第一布线，使得第一布线具有第一突起。第二布线形成在与第一布线不同的层上，使得第二布线的一部分与第一突起重叠。形成覆盖第一和第二布线的保护层，使得保护层具有分别暴露第一和第二布线的第一和第二接触孔。然后，形成通过第一和第二接触孔将第一布线电连接到第二布线的第三布线。当第一和第二布线之间的电连接异常时，向第一突起照射激光束，从而可以修复电连接。

30. 发明授权

US06650379B2 Thin film transistor array panel 有权
标题翻译：薄膜晶体管阵列面板
公开(公告)号：US06650379B2
公开(公告)日：2003-11-18
申请号：US10280055
申请日：2002-10-25
申请人： Bum-Kee Baek , Hyang-Shik Kong , Dal-Moe Kim
发明人： Bum-Kee Baek , Hyang-Shik Kong , Dal-Moe Kim
IPC分类号： G02F113
CPC分类号： G02F1/13458 , G02F1/136227 , G02F1/1368 , H01L27/124 , H01L27/1288
摘要： Disclosed is a simplified manufacturing method for liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on an insulating substrate. Next, a gate insulating layer covering the gate wire, a semiconductor layer, an ohmic contact layer, and a data conductive layer are sequentially deposited, and a photoresist pattern is formed on the data conductive layer. Following this step, the data conductive layer, using the photoresist pattern as an etch mask, is etched to form a data wire including a data line, a source electrode, a drain electrode, and a data pad. Next, the photoresist pattern is reflowed to cover the portion between the source electrode and the drain electrode, and a portion of the ohmic contact layer adjacent to a periphery of the data wire. Subsequently, portions of the ohmic contact layer and the semiconductor layer, which are not covered by the photoresist pattern, are etched, and the photoresist pattern is removed. Next, a portion of the ohmic contact layer, which is not covered by the data wire, is etched to expose a portion of the semiconductor layer between the source electrode and the drain electrode that is a channel portion of a thin film transistor. Finally, a protection layer, a pixel electrode, a redundant gate pad and a redundant data pad are formed.
摘要翻译：公开了一种用于液晶显示器的简化制造方法。在绝缘基板上形成包括栅极线，栅极焊盘和栅电极的栅极线。接下来，依次沉积覆盖栅极线，半导体层，欧姆接触层和数据导电层的栅极绝缘层，并且在数据导电层上形成光致抗蚀剂图案。在该步骤之后，蚀刻使用光致抗蚀剂图案作为蚀刻掩模的数据导电层，以形成包括数据线，源电极，漏电极和数据焊盘的数据线。接下来，光致抗蚀剂图案被回流以覆盖源电极和漏电极之间的部分，以及与数据线周边相邻的欧姆接触层的一部分。随后，蚀刻未被光致抗蚀剂图案覆盖的欧姆接触层和半导体层的部分，并除去光致抗蚀剂图案。接下来，蚀刻未被数据线覆盖的欧姆接触层的一部分，以暴露作为薄膜晶体管的沟道部分的源极和漏极之间的半导体层的一部分。最后，形成保护层，像素电极，冗余栅极焊盘和冗余数据焊盘。

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