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21. 发明申请

US20070228435A1 Semiconductor device and fabrication thereof 审中-公开
标题翻译：半导体器件及其制造
公开(公告)号：US20070228435A1
公开(公告)日：2007-10-04
申请号：US11476266
申请日：2006-06-28
申请人： Jar-Ming Ho , Shian-Jyh Lin , Chin-Tien Yang , Chien-Li Cheng
发明人： Jar-Ming Ho , Shian-Jyh Lin , Chin-Tien Yang , Chien-Li Cheng
IPC分类号： H01L29/94
CPC分类号： H01L27/10876 , H01L27/10823 , H01L27/10829
摘要： A method for forming a semiconductor device is disclosed, in which a substrate comprising a recessed gate is provided, and a protrusion of the recessed gate protrudes a surface of the substrate. A spacer is formed on a sidewall of the protrusion of the recessed gate. A conductive structure is formed overlying the recessed gate, wherein the conductive structure is narrower than the recessed gate to expose a portion of the recessed gate. An etching process is utilized to recess a exposed portion of the recessed gate, and form a recess portion between the recessed gate and the spacer. A conductive line spacer is formed on a sidewall of the conductive line structure, wherein the conductive line spacer fills the recessed portion.
摘要翻译：公开了一种用于形成半导体器件的方法，其中提供包括凹入栅极的衬底，并且凹入栅极的突起突出于衬底的表面。间隔件形成在凹入门的突起的侧壁上。导电结构形成在凹入栅极上，其中导电结构比凹入栅极窄，以暴露凹入栅极的一部分。利用蚀刻工艺来凹入凹入栅极的暴露部分，并在凹入栅极和间隔物之间形成凹陷部分。在导线结构的侧壁上形成导线间隔物，其中导线间隔物填充凹陷部分。

22. 发明申请

US20060091566A1 Bond pad structure for integrated circuit chip 审中-公开
标题翻译：用于集成电路芯片的焊盘结构
公开(公告)号：US20060091566A1
公开(公告)日：2006-05-04
申请号：US10989481
申请日：2004-11-16
申请人： Chin-Tien Yang , Shou Chang , Min Cao , Yuh-Jier Mii
发明人： Chin-Tien Yang , Shou Chang , Min Cao , Yuh-Jier Mii
IPC分类号： H01L23/48
CPC分类号： H01L24/05 , H01L24/45 , H01L2224/04042 , H01L2224/05093 , H01L2224/05552 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05681 , H01L2224/05684 , H01L2224/45124 , H01L2224/45144 , H01L2224/48624 , H01L2224/48639 , H01L2224/48644 , H01L2224/48647 , H01L2224/48655 , H01L2224/48666 , H01L2224/48681 , H01L2224/48684 , H01L2224/48724 , H01L2224/48739 , H01L2224/48744 , H01L2224/48747 , H01L2224/48755 , H01L2224/48766 , H01L2224/48781 , H01L2224/48784 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： An integrated circuit chip is provided, which includes a bond pad structure, a low-k dielectric layer, and active circuits. The bond pad structure includes a conductive bond pad, an Mtop solid conductive plate, and an Mtop−1 solid conductive plate. The Mtop solid conductive plate is located under the bond pad. The Mtop plate is electrically coupled to the bond pad. The Mtop−1 solid conductive plate is located under the Mtop plate. A low-k dielectric layer is located under the bond pad of the bond pad structure. At least part of an active circuit is located under the bond pad of the bond pad structure.
摘要翻译：提供了一种集成电路芯片，其包括接合焊盘结构，低k电介质层和有源电路。接合焊盘结构包括导电接合焊盘，M＆lt;顶部＆lt;固体导电板和M＆lt;顶1实心导电板。 M＆lt;＆gt;顶部<！ - SIPO - >固体导电板位于接合焊盘下方。 M＆lt;顶部板电连接到接合焊盘。 M＆lt; 1＆gt;顶部实体导电板位于M＆lt;顶部板下方。低k电介质层位于接合焊盘结构的接合焊盘下方。有源电路的至少一部分位于接合焊盘结构的接合焊盘的下方。

23. 发明申请

US20130248482A1 METHODS OF PATTERNING LAYERED-MATERIAL AND FORMING IMPRINTING MOLD 有权
标题翻译：形成层状材料和形成模塑的方法
公开(公告)号：US20130248482A1
公开(公告)日：2013-09-26
申请号：US13609854
申请日：2012-09-11
申请人： Chin-Tien YANG , Ming-Chia LI , Chung-Ta CHENG
发明人： Chin-Tien YANG , Ming-Chia LI , Chung-Ta CHENG
IPC分类号： G03F7/20 , B29C59/16 , B82Y30/00 , B82Y40/00
CPC分类号： G03F7/027 , B82Y10/00 , B82Y40/00 , G03F7/0002 , G03F7/0042
摘要： Disclosed is a method of patterning a layered material. A layered material is provided, and a photoresist layer is formed thereon. The photoresist layer is patterned by a focused laser beam to expose a part of the layered material. The exposed layered material is etched to pattern the layered material.
摘要翻译：公开了层叠材料的图案化方法。提供层状材料，并在其上形成光致抗蚀剂层。光致抗蚀剂层通过聚焦激光束图案化以暴露部分分层材料。暴露的层状材料被蚀刻以对层状材料进行图案化。

24. 发明授权

US08502929B2 Display apparatus and method for driving the same 有权
标题翻译：显示装置及其驱动方法
公开(公告)号：US08502929B2
公开(公告)日：2013-08-06
申请号：US12953851
申请日：2010-11-24
申请人： Chia-Liang Hung , Cheng-Yi Chen , Chin-Tien Yang , Yueh-Jui Li
发明人： Chia-Liang Hung , Cheng-Yi Chen , Chin-Tien Yang , Yueh-Jui Li
IPC分类号： G02F1/1335 , G09G3/36 , H04N13/04
CPC分类号： G09G3/342 , G09G3/003 , G09G3/3611 , G09G2310/024 , G09G2310/08 , G09G2320/0252 , G09G2320/0261 , G09G2330/021 , H04N13/341 , H04N13/398
摘要： A display apparatus and a method of driving the same are provided. The display apparatus includes a backlight module, a liquid crystal panel and a controller. The backlight module has a plurality of light emitting regions capable of emitting light individually. The liquid crystal panel is disposed at a side of the backlight module. The controller is electrically coupled to the backlight module and the liquid crystal panel. When the liquid crystal panel updates a left-eye image to a right-eye image row by row along a column-direction, the controller sequentially turns on and off the light emitting regions along the column-direction, such that a whole region of the liquid crystal panel lighted by light emitting region displays the left-eye image or the right-eye image.
摘要翻译：提供了一种显示装置及其驱动方法。显示装置包括背光模块，液晶面板和控制器。背光模块具有能够单独发光的多个发光区域。液晶面板设置在背光模块的一侧。控制器电耦合到背光模块和液晶面板。当液晶面板沿着列方向逐行地将左眼图像更新为右眼图像时，控制器顺序地沿着列方向打开和关闭发光区域，使得整个区域由发光区域点亮的液晶面板显示左眼图像或右眼图像。

25. 发明授权

US08253014B2 Solar cell with upper and lower conductor layers stacked together 失效
标题翻译：太阳能电池具有上下导体层堆叠在一起
公开(公告)号：US08253014B2
公开(公告)日：2012-08-28
申请号：US12985847
申请日：2011-01-06
申请人： Sheng Yung Liu , Chin-Tien Yang , Chun-Hung Lin
发明人： Sheng Yung Liu , Chin-Tien Yang , Chun-Hung Lin
IPC分类号： H01L31/00
CPC分类号： H01L31/022433 , H01L31/02168 , Y02E10/50 , Y02E10/52
摘要： A solar cell includes a substrate, a lower conductor layer, an anti-reflection coating (ARC) layer and an upper conductor layer. The substrate has a front side, a back side and a doped region adjacent to the front side. The lower conductor layer has a first portion embedded into the doped region and a second portion other than the first portion. The ARC layer is disposed on the front side of the substrate and covers the lower conductor layer such that the second portion of the lower conductor layer is disposed in the ARC layer. The upper conductor layer has a first portion embedded into the ARC layer and a second portion other than the first portion of the upper conductor layer. The second portion of the upper conductor layer is exposed out of the ARC layer, and the upper conductor layer is electrically connected to the lower conductor layer.
摘要翻译：太阳能电池包括基板，下导体层，抗反射涂层（ARC）层和上导体层。衬底具有与前侧相邻的前侧，后侧和掺杂区。下导体层具有嵌入掺杂区域中的第一部分和除第一部分之外的第二部分。 ARC层设置在基板的前侧，并覆盖下导体层，使得下导体层的第二部分设置在ARC层中。上导体层具有嵌入到ARC层中的第一部分和除了上导体层的第一部分之外的第二部分。上导体层的第二部分露出ARC层，并且上导体层电连接到下导体层。

26. 发明申请

US20120156320A1 MANUFACTURING-PROCESS EQUIPMENT 失效
标题翻译：制造过程设备
公开(公告)号：US20120156320A1
公开(公告)日：2012-06-21
申请号：US12971466
申请日：2010-12-17
申请人： Wen-Yuh Jywe , Jing-Chung Shen , Chin-Tien Yang , Chien-Hung Liu , Jau-Jiu Ju , Chia-Hung Wu , Chun-Chieh Huang , Lili Duan , Yuan-Chin Lee
发明人： Wen-Yuh Jywe , Jing-Chung Shen , Chin-Tien Yang , Chien-Hung Liu , Jau-Jiu Ju , Chia-Hung Wu , Chun-Chieh Huang , Lili Duan , Yuan-Chin Lee
IPC分类号： B29C59/16 , B29C37/00
CPC分类号： B23K26/0853
摘要： A manufacturing-process equipment has a platform assembly, a measurement feedback assembly and a laser-working assembly. The platform assembly has a base and a hybrid-moving platform. The base has a mounting frame. The hybrid-moving platform is mounted on the base and has a long-stroke moving stage and a piezo-driven micro-stage. The long-stroke moving stage has a benchmark set and a driving device. The piezo-driven micro-stage is connected to the long-stroke moving stage and has a working platform. The measurement feedback assembly is securely mounted on the platform assembly and has a laser interferometer, a reflecting device and a signal-receiving device. The laser-working assembly is mounted on the platform assembly, is electrically connected to the measurement feedback assembly and has a laser direct-writing head, a controlling interface device and a positioning interface device.
摘要翻译：制造过程设备具有平台组件，测量反馈组件和激光加工组件。平台组件具有基座和混合动力平台。底座有一个安装架。混合动力平台安装在基座上，具有长行程移动台和压电驱动微型平台。长冲程移动台具有基准组和驱动装置。压电驱动微型平台连接到长行程移动台，并具有工作平台。测量反馈组件牢固地安装在平台组件上，并具有激光干涉仪，反射装置和信号接收装置。激光加工组件安装在平台组件上，电连接到测量反馈组件，并具有激光直写头，控制接口装置和定位接口装置。

27. 发明申请

US20080299734A1 Method of manufacturing a self-aligned fin field effect transistor (FinFET) device 审中-公开
标题翻译：制造自对准鳍状场效应晶体管（FinFET）器件的方法
公开(公告)号：US20080299734A1
公开(公告)日：2008-12-04
申请号：US11934044
申请日：2007-11-01
申请人： Tzung-Han Lee , Chin-Tien Yang
发明人： Tzung-Han Lee , Chin-Tien Yang
IPC分类号： H01L21/336
CPC分类号： H01L29/7853 , H01L29/66818
摘要： A method of manufacturing a self-aligned fin FET (FinFET) device is disclosed, in which, an insulating layer of a shallow trench isolation is etched back to partially expose sidewalls of the semiconductor substrate surrounded by the shallow trench isolation, and the sidewalls of the semiconductor substrate are then isotropically etched, allowing the semiconductor substrate to form into a relatively thin fin structure for forming a three-dimensional gate structure having three faces.
摘要翻译：公开了一种制造自对准翅片FET（FinFET）器件的方法，其中将浅沟槽隔离的绝缘层回蚀刻以部分地暴露由浅沟槽隔离包围的半导体衬底的侧壁，并且侧壁然后各向同性蚀刻半导体衬底，使得半导体衬底形成相对薄的鳍结构，以形成具有三个面的三维栅极结构。

28. 发明申请

US20080251827A1 Checkerboard deep trench dynamic random access memory cell array layout 有权
标题翻译：棋盘深沟动态随机存取存储单元阵列布局
公开(公告)号：US20080251827A1
公开(公告)日：2008-10-16
申请号：US11776558
申请日：2007-07-12
申请人： Chien-Li Cheng , Chin-Tien Yang , Tzung-Han Lee , Shian-Hau Liao , Chung-Yuan Lee
发明人： Chien-Li Cheng , Chin-Tien Yang , Tzung-Han Lee , Shian-Hau Liao , Chung-Yuan Lee
IPC分类号： H01L27/108
CPC分类号： H01L27/0207 , H01L27/10885 , H01L27/10888 , Y10S257/905 , Y10S257/906
摘要： A checkerboard deep trench dynamic random access memory cell array layout is disclosed, which includes a substrate, a plurality of gate conductor lines disposed on the substrate, a plurality of checkerboard-arranged and staggered deep trench capacitor structures embedded in the substrate under the gate conductor lines, and a plurality of active areas formed in the substrate under the gate conductor lines, alternatively arranged with the deep trench capacitor structures, and electrically connected with an adjacent deep trench capacitor structure. The width of the parts of the gate conductor lines above the deep trench capacitor structures is narrower than that of the parts of the gate conductor lines above the active areas.
摘要翻译：公开了一种棋盘深沟动态随机存取存储单元阵列布局，其包括衬底，设置在衬底上的多个栅极导体线，嵌入在栅极导体下方的衬底中的多个棋盘布置且交错的深沟槽电容器结构线路，以及形成在栅极导体线下方的基板中的多个有源区域，交替布置有深沟槽电容器结构，并与相邻的深沟槽电容器结构电连接。深沟槽电容器结构之上的栅极导体线的部分的宽度比在有源区上方的栅极导体线的部分的宽度窄。

29. 发明申请

US20080241706A1 HOLOGRAPHIC DATA STORAGE MEDIUM AND FABRICATION METHOD THEREOF 审中-公开
标题翻译：全息数据存储介质及其制造方法
公开(公告)号：US20080241706A1
公开(公告)日：2008-10-02
申请号：US11694527
申请日：2007-03-30
申请人： Ming-Chia Li , Chih-Ming Lin , An-Tze Lee , Chin-Tien Yang , Ming-Fang Hsu , Chien-Liang Huang , Tzuan-Ren Jeng
发明人： Ming-Chia Li , Chih-Ming Lin , An-Tze Lee , Chin-Tien Yang , Ming-Fang Hsu , Chien-Liang Huang , Tzuan-Ren Jeng
IPC分类号： G11B7/0065
CPC分类号： G11B7/24044 , G11B7/245 , G11B7/2531 , G11B7/256 , G11B7/258 , G11B7/26
摘要： A holographic data storage medium and a fabrication method thereof are provided. First, a precursor solution including an ultraviolet curable adhesive composition including a monomer having at least one (meth)acryloyl group in the molecule and an oligomer having at least two (meth)acryloyl groups in the molecule, a photopolymerizable organic compound and a photoinitiator including 2, 4, 6 trimethyl benzoldiphenyl phosphine oxide is provided. Next, a first substrate and a second substrate are attached to one another such that a gap is formed between the first and second glass substrates. Next, the precursor solution is filled into the gap. Next, the precursor solution between the first and second substrates is irradiated with a light in an atmosphere of an inert gas to induce photo-polymerization reaction to form the recording layer.
摘要翻译：提供了全息数据存储介质及其制造方法。首先，在分子内含有具有至少一个（甲基）丙烯酰基的单体的紫外线固化性粘合剂组合物和分子内具有至少两个（甲基）丙烯酰基的低聚物的前体溶液，光聚合性有机化合物和光引发剂，提供2,4,6-三甲基苯并二苯基氧化膦。接下来，第一基板和第二基板彼此附接，使得在第一和第二玻璃基板之间形成间隙。接下来，将前体溶液填充到间隙中。接下来，在惰性气体气氛中用光照射第一和第二基板之间的前体溶液，以引起光聚合反应，形成记录层。

30. 发明申请

US20070153092A1 VIDEO CAMERA APPARATUS FOR WHOLE SPACE MONITOR 审中-公开
标题翻译：视频摄像机用于全空间监视器
公开(公告)号：US20070153092A1
公开(公告)日：2007-07-05
申请号：US11306635
申请日：2006-01-05
申请人： Chin-Tien Yang , Yu-Sheng Cheng , Yu-Min Chen , Cheng-Hung Weng , Hung-Jen Chen , Ruei-Shiang Lin , Hui-Shan Chen , Yi-Shiuan Hsu , Sheng-Chia Lee , I-Hao Chan , Yi-Jen Cheng , Chi-Ming Lin , Chan-Sheng Lin
发明人： Chin-Tien Yang , Yu-Sheng Cheng , Yu-Min Chen , Cheng-Hung Weng , Hung-Jen Chen , Ruei-Shiang Lin , Hui-Shan Chen , Yi-Shiuan Hsu , Sheng-Chia Lee , I-Hao Chan , Yi-Jen Cheng , Chi-Ming Lin , Chan-Sheng Lin
IPC分类号： H04N5/225
CPC分类号： H04N5/232 , G08B13/19626 , G08B13/19628 , G08B13/1963 , H04N5/23238 , H04N7/183
摘要： A video camera apparatus for whole space monitoring is provided, which includes a lens module having a plurality of lenses, a calculation unit, and a processing unit. The lens module captures images from different directions and generates a plurality of image data, then outputs the image data to the calculation unit. The calculation unit calculates the received image data and outputs the image data to the processing unit. The processing unit compresses the image data according to the output of the calculation unit and outputs the compressed image data to the host apparatus.
摘要翻译：提供一种用于全空间监视的摄像机装置，其包括具有多个透镜的透镜模块，计算单元和处理单元。镜头模块从不同方向拍摄图像，并生成多个图像数据，然后将图像数据输出到计算单元。计算单元计算接收到的图像数据并将该图像数据输出到处理单元。处理单元根据计算单元的输出压缩图像数据，并将压缩图像数据输出到主机设备。

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