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21. 发明授权

US06880152B1 Method of determining a mode of code generation 有权
标题翻译：确定代码生成方式的方法
公开(公告)号：US06880152B1
公开(公告)日：2005-04-12
申请号：US09417979
申请日：1999-10-13
申请人： Linus Torvalds , H. Peter Anvin
发明人： Linus Torvalds , H. Peter Anvin
IPC分类号： G06F9/45 , G06F9/318 , G06F9/455 , G06F11/34
CPC分类号： G06F9/3017 , G06F9/45504 , G06F11/3409 , G06F11/3447 , G06F2201/865 , G06F2201/88 , G06F2201/885
摘要： A method for determining a process to use for converting instructions in a target instruction set to instructions in a host instructions set including the steps of executing code morphing software including an interpreter and a translator to generate host instructions from target instructions, detecting at intervals whether the interpreter or the translator is executing, increasing a count if the interpreter is executing and decreasing the count if the translator is executing, and changing from interpreting to translating a sequence of target instructions when the count reaches a selected maximum.
摘要翻译：一种用于确定用于将目标指令集中的指令转换为主机指令集中的指令的过程的方法，包括执行包括解释器和转换器的代码变形软件的步骤，以从目标指令生成主指令，解释器或翻译器正在执行，如果解释器正在执行则增加计数，并且如果翻译器正在执行则减少计数，并且当计数达到所选择的最大值时，从解释变换到翻译目标指令序列。

22. 发明申请

US20020144184A1 Method and apparatus for handling nested faults 有权
标题翻译：处理嵌套故障的方法和装置
公开(公告)号：US20020144184A1
公开(公告)日：2002-10-03
申请号：US09822933
申请日：2001-03-30
申请人： Transmeta Corporation
发明人： H. Peter Anvin , David Keppel
IPC分类号： G06F011/36
CPC分类号： G06F11/0721 , G06F11/0778 , G06F11/0793
摘要： Apparatus and a method for handling nested faults including the steps of determining whether a fault is a first level fault, responding to a determination of a first level fault by saving a first amount of state sufficient to handle a first level fault, and responding to a determination of a nested fault by saving an additional amount of state before handling the fault.
摘要翻译：一种用于处理嵌套故障的装置和方法，包括以下步骤：确定故障是否是第一级故障，通过保存足以处理第一级故障的第一数量的状态来响应第一级故障的确定，以及响应于在处理故障之前通过保存额外的状态来确定嵌套故障。

23. 发明授权

US5958061A Host microprocessor with apparatus for temporarily holding target processor state 失效
标题翻译：主机微处理器，用于临时保持目标处理器状态
公开(公告)号：US5958061A
公开(公告)日：1999-09-28
申请号：US685721
申请日：1996-07-24
申请人： Edmund J. Kelly , Malcolm John Wing
发明人： Edmund J. Kelly , Malcolm John Wing
IPC分类号： G06F9/38 , G06F11/00
CPC分类号： G06F11/004 , G06F9/3834 , G06F9/3863
摘要： Apparatus for use in a processing system having a host processor capable of executing a first instruction set to assist in running instructions of a different instruction set which is translated to the first instruction set by the host processor including circuitry for temporarily storing memory stores generated until a determination that a sequence of translated instructions will execute without exception or error on the host processor, circuitry for permanently storing memory stores temporarily stored when a determination is made that a sequence of translated instructions will execute without exception or error on the host processor, and circuitry for eliminating memory stores temporarily stored when a determination is made that a sequence of translated instructions will generate an exception or error on the host processor.
摘要翻译：一种用于具有主机处理器的处理系统的装置，该处理器能够执行第一指令集以协助运行不同指令集的指令，所述指令集被转换为由主机处理器设置的第一指令，所述指令集包括用于暂时存储直到确定在主机处理器上转换的指令序列无异常或错误地执行，当确定在主机处理器上确定转换的指令序列无异常或错误时，临时存储的存储器存储器的电路，以及电路用于消除当确定转换的指令序列将在主机处理器上产生异常或错误时临时存储的存储器存储器。

24. 发明授权

US5832205A Memory controller for a microprocessor for detecting a failure of speculation on the physical nature of a component being addressed 失效
标题翻译：用于微处理器的存储器控制器，用于检测正在寻址的部件的物理性质的猜测失败
公开(公告)号：US5832205A
公开(公告)日：1998-11-03
申请号：US700302
申请日：1996-08-20
申请人： Edmund J. Kelly , Robert F. Cmelik , Malcolm John Wing
发明人： Edmund J. Kelly , Robert F. Cmelik , Malcolm John Wing
IPC分类号： G06F9/38 , C09K8/34 , G06F9/30 , G06F9/318 , G06F9/455 , G06F11/00 , G06F11/14 , G06F11/28 , G06F12/02 , G06F12/10
CPC分类号： C09K8/34 , G06F11/141 , G06F12/0292 , G06F12/1027 , G06F9/30181 , G06F9/3808 , G06F9/3824 , G06F9/3834 , G06F9/3842 , G06F9/3861 , G06F9/3863 , G06F9/3885 , G06F9/45504
摘要： A memory controller for a microprocessor including apparatus to both detect a failure of speculation on the nature of the memory being addressed, and apparatus to recover from such failures.
摘要翻译：一种用于微处理器的存储器控制器，包括用于检测对正在寻址的存储器的性质的猜测失败的装置以及从这种故障中恢复的装置。

25. 发明申请

US20150145580A1 APPARATUS FOR CONTROLLING SEMICONDUCTOR CHIP CHARACTERISTICS 审中-公开
标题翻译：控制半导体芯片特性的装置
公开(公告)号：US20150145580A1
公开(公告)日：2015-05-28
申请号：US12346633
申请日：2008-12-30
申请人： Godfrey P. D'Souza , Keith Klayman
发明人： Godfrey P. D'Souza , Keith Klayman
IPC分类号： G06F11/30 , H03K5/05 , H03K5/07
CPC分类号： H03K5/05 , G06F11/348 , H03K5/07 , H03K2005/00019
摘要： Apparatus including functional components of circuitry defined on a semiconductor chip, the functional components including a component having modifiable operating characteristics, a performance measuring circuit providing an output indicative of operating characteristics of the circuitry defined on the semiconductor chip during operation of the circuitry, and computer implemented software means for controlling a value for an operating characteristic of the component having modifiable operating characteristics in response to the output provided by the performance measuring circuit.
摘要翻译：包括限定在半导体芯片上的电路的功能部件的功能部件，功能部件包括具有可修改的工作特性的部件，性能测量电路，提供指示在电路运行期间在半导体芯片上定义的电路的工作特性的输出，以及计算机实现的软件装置，用于响应于由性能测量电路提供的输出来控制具有可修改的操作特性的部件的操作特性的值。

26. 发明申请

US20090045846A1 ADVANCED REPEATER WITH DUTY CYCLE ADJUSTMENT 有权
标题翻译：高级重复器与占空比调整
公开(公告)号：US20090045846A1
公开(公告)日：2009-02-19
申请号：US12181221
申请日：2008-07-28
申请人： Scott Pitkethly
发明人： Scott Pitkethly
IPC分类号： H03K19/094 , H03K3/017
CPC分类号： H03K19/01721 , H03K5/1565
摘要： An advanced repeater with duty cycle adjustment. In accordance with a first embodiment of the present invention, an advanced repeater includes an output stage for driving an output signal line responsive to an input signal and a plurality of active devices for selectably adjusting a duty cycle of the signal. The advanced repeater may further include circuitry for producing a delayed version of the signal.
摘要翻译：具有占空比调整的高级中继器。根据本发明的第一实施例，高级中继器包括用于响应于输入信号驱动输出信号线的输出级和用于可选择地调整信号的占空比的多个有源器件。高级中继器还可以包括用于产生信号的延迟版本的电路。

27. 发明授权

US07472033B1 Apparatus for controlling semiconductor chip characteristics 有权
标题翻译：用于控制半导体芯片特性的装置
公开(公告)号：US07472033B1
公开(公告)日：2008-12-30
申请号：US10273681
申请日：2002-10-17
申请人： Godfrey P. D'Souza , Keith Klayman
发明人： Godfrey P. D'Souza , Keith Klayman
IPC分类号： G06F11/30 , G06F9/00
CPC分类号： H03K5/05 , G06F11/348 , H03K5/07 , H03K2005/00019
摘要： Apparatus including functional components of circuitry defined on a semiconductor chip, the functional components including a component having modifiable operating characteristics, a performance measuring circuit providing an output indicative of operating characteristics of the circuitry defined on the semiconductor chip during operation of the circuitry, and computer implemented software means for controlling a value for an operating characteristic of the component having modifiable operating characteristics in response to the output provided by the performance measuring circuit.
摘要翻译：包括限定在半导体芯片上的电路的功能部件的功能部件，功能部件包括具有可修改的工作特性的部件，性能测量电路，提供指示在电路运行期间在半导体芯片上定义的电路的工作特性的输出，以及计算机实现的软件装置，用于响应于由性能测量电路提供的输出来控制具有可修改的操作特性的部件的操作特性的值。

28. 发明授权

US07444471B1 Method and system for using external storage to amortize CPU cycle utilization 有权
标题翻译：使用外部存储器来分摊CPU周期利用率的方法和系统
公开(公告)号：US07444471B1
公开(公告)日：2008-10-28
申请号：US10335405
申请日：2002-12-30
申请人： Brian O'Clair , Dean Gaudet
发明人： Brian O'Clair , Dean Gaudet
IPC分类号： G06F12/04
CPC分类号： G06F9/30174 , G06F9/3808 , G06F9/45504
摘要： A method and system for using external storage to amortize CPU cycle utilization, wherein translated instructions are stored in a storage medium and subsequently accessed on a subsequent execution of a non-native application in order to amortize CPU cycles used in generating the translated instructions.
摘要翻译：一种用于使用外部存储器来分摊CPU周期利用率的方法和系统，其中翻译的指令被存储在存储介质中，并且随后在非本地应用的后续执行中被访问，以便分摊用于生成转换的指令的CPU周期。

29. 发明申请

US20080246110A1 STRUCTURE FOR SPANNING GAP IN BODY-BIAS VOLTAGE ROUTING STRUCTURE 有权
标题翻译： BODY-BIAS电压路由结构中的扫描缝隙结构
公开(公告)号：US20080246110A1
公开(公告)日：2008-10-09
申请号：US12140197
申请日：2008-06-16
申请人： Robert P. Masleid , James B. Burr , Michael Pelham
发明人： Robert P. Masleid , James B. Burr , Michael Pelham
IPC分类号： H01L23/52
CPC分类号： H01L23/535 , H01L23/52 , H01L23/585 , H01L27/0218 , H01L27/092 , H01L2924/0002 , H01L2924/00
摘要： Structures for spanning gap in body-bias voltage routing structure. In an embodiment, a structure is comprised of at least one metal wire.
摘要翻译：体偏电压布线结构跨越间隙的结构。在一个实施例中，结构由至少一根金属线构成。

30. 发明授权

US07405597B1 Advanced repeater with duty cycle adjustment 有权
标题翻译：高级中继器，带占空比调整
公开(公告)号：US07405597B1
公开(公告)日：2008-07-29
申请号：US11172013
申请日：2005-06-30
申请人： Scott Pitkethly
发明人： Scott Pitkethly
IPC分类号： H03K3/017 , H03K19/094
CPC分类号： H03K19/01721 , H03K5/1565
摘要： An advanced repeater with duty cycle adjustment. In accordance with a first embodiment of the present invention, an advanced repeater includes an output stage for driving an output signal line responsive to an input signal and a plurality of active devices for selectably adjusting a duty cycle of the signal. The advanced repeater may further include circuitry for producing a delayed version of the signal.
摘要翻译：具有占空比调整的高级中继器。根据本发明的第一实施例，高级中继器包括用于响应于输入信号驱动输出信号线的输出级和用于可选择地调整信号的占空比的多个有源器件。高级中继器还可以包括用于产生信号的延迟版本的电路。

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