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1. 发明授权

US6031992A Combining hardware and software to provide an improved microprocessor 失效
标题翻译：结合硬件和软件提供改进的微处理器
公开(公告)号：US6031992A
公开(公告)日：2000-02-29
申请号：US678541
申请日：1996-07-05
申请人： Robert F. Cmelik , David R. Ditzel , Edmund J. Kelly , Colin B. Hunter , Douglas A. Laird , Malcolm John Wing , Grzegorz B. Zyner
发明人： Robert F. Cmelik , David R. Ditzel , Edmund J. Kelly , Colin B. Hunter , Douglas A. Laird , Malcolm John Wing , Grzegorz B. Zyner
IPC分类号： G06F9/318 , G06F9/38 , G06F9/455 , G06F9/45
CPC分类号： G06F9/3812 , G06F9/3017 , G06F9/30174 , G06F9/45504
摘要： A microprocessor for a host computer designed to execute target application programs for a target computer having a target instruction set including the combination of code morphing software, and morph host processing hardware designed to execute instructions of a host instruction set, the combination of the code morphing software and the morph host processing hardware comprising means to translate a set of target instructions into instructions of a host instruction set, means to optimize the instructions of the host instruction set translated from the target application program speculating upon the occurrence of a condition, means to determine under control of the code morphing software official state of the target computer which existed at the beginning of a translation of a set of target instructions during execution of the target application program by the microprocessor, means for updating state of the target computer from state of the host computer when a set of host instructions executes in accordance with the speculation, means to detect failure of the condition during the execution of the set of host instructions, means for updating state of the host computer from state of the target computer when a set of host instructions fails to execute in accordance with the speculation, and means to translate a new set of host instructions without the speculation when a set of host instructions fails to execute in accordance with the speculation.
摘要翻译：一种用于主计算机的微处理器，被设计用于执行目标计算机的目标应用程序，所述目标计算机具有目标指令集，所述目标指令集包括代码变形软件的组合，以及被设计为执行主机指令集的指令的变形主机处理硬件，代码变形软件和变形主机处理硬件包括将一组目标指令转换为主机指令集的指令的装置，用于优化从发生条件时推测的目标应用程序翻译的主机指令集的指令的装置，在由微处理器在目标应用程序执行期间在一组目标指令的转换开始时存在的目标计算机的代码变形软件官方状态的控制下确定用于从目标计算机的状态更新目标计算机的状态的装置主机当一套主机指令时根据推测执行的装置，用于在执行主机指令集期间检测状况的失败的手段，用于当主机指令的集合根据不可执行的主机指令不能执行时从目标计算机的状态更新主机的状态的装置当一组主机指令根据推测不能执行时，这种推测和翻译一组新的主机指令的手段无需推测。

2. 发明授权

US5958061A Host microprocessor with apparatus for temporarily holding target processor state 失效
标题翻译：主机微处理器，用于临时保持目标处理器状态
公开(公告)号：US5958061A
公开(公告)日：1999-09-28
申请号：US685721
申请日：1996-07-24
申请人： Edmund J. Kelly , Malcolm John Wing
发明人： Edmund J. Kelly , Malcolm John Wing
IPC分类号： G06F9/38 , G06F11/00
CPC分类号： G06F11/004 , G06F9/3834 , G06F9/3863
摘要： Apparatus for use in a processing system having a host processor capable of executing a first instruction set to assist in running instructions of a different instruction set which is translated to the first instruction set by the host processor including circuitry for temporarily storing memory stores generated until a determination that a sequence of translated instructions will execute without exception or error on the host processor, circuitry for permanently storing memory stores temporarily stored when a determination is made that a sequence of translated instructions will execute without exception or error on the host processor, and circuitry for eliminating memory stores temporarily stored when a determination is made that a sequence of translated instructions will generate an exception or error on the host processor.
摘要翻译：一种用于具有主机处理器的处理系统的装置，该处理器能够执行第一指令集以协助运行不同指令集的指令，所述指令集被转换为由主机处理器设置的第一指令，所述指令集包括用于暂时存储直到确定在主机处理器上转换的指令序列无异常或错误地执行，当确定在主机处理器上确定转换的指令序列无异常或错误时，临时存储的存储器存储器的电路，以及电路用于消除当确定转换的指令序列将在主机处理器上产生异常或错误时临时存储的存储器存储器。

3. 发明授权

US5832205A Memory controller for a microprocessor for detecting a failure of speculation on the physical nature of a component being addressed 失效
标题翻译：用于微处理器的存储器控制器，用于检测正在寻址的部件的物理性质的猜测失败
公开(公告)号：US5832205A
公开(公告)日：1998-11-03
申请号：US700302
申请日：1996-08-20
申请人： Edmund J. Kelly , Robert F. Cmelik , Malcolm John Wing
发明人： Edmund J. Kelly , Robert F. Cmelik , Malcolm John Wing
IPC分类号： G06F9/38 , C09K8/34 , G06F9/30 , G06F9/318 , G06F9/455 , G06F11/00 , G06F11/14 , G06F11/28 , G06F12/02 , G06F12/10
CPC分类号： C09K8/34 , G06F11/141 , G06F12/0292 , G06F12/1027 , G06F9/30181 , G06F9/3808 , G06F9/3824 , G06F9/3834 , G06F9/3842 , G06F9/3861 , G06F9/3863 , G06F9/3885 , G06F9/45504
摘要： A memory controller for a microprocessor including apparatus to both detect a failure of speculation on the nature of the memory being addressed, and apparatus to recover from such failures.
摘要翻译：一种用于微处理器的存储器控制器，包括用于检测对正在寻址的存储器的性质的猜测失败的装置以及从这种故障中恢复的装置。

4. 发明授权

US08063455B2 Multi-terminal electromechanical nanocsopic switching device with control and release electrodes 有权
标题翻译：具有控制和释放电极的多端子机电纳米开关器件
公开(公告)号：US08063455B2
公开(公告)日：2011-11-22
申请号：US11285595
申请日：2005-11-22
申请人： Louis Charles Kordus, II , Colin Neal Murphy , Malcolm John Wing
发明人： Louis Charles Kordus, II , Colin Neal Murphy , Malcolm John Wing
IPC分类号： H01L51/10 , H01L49/02
CPC分类号： G11C13/025 , B82Y10/00 , G11C23/00 , Y10S977/938 , Y10S977/94 , Y10S977/943
摘要： A multi-terminal electromechanical nanoscopic switching device which may be used as a memory device, a pass gate, a transmission gate, or a multiplexer, among other things.
摘要翻译：可以用作存储器件，通孔，传输门或多路复用器的多端子机电纳米切换器件等。

5. 发明申请

US20110122686A1 NON-VOLATILE ELECTROMECHANICAL CONFIGURATION BIT ARRAY 有权
标题翻译：非挥发性电化学配置位阵列
公开(公告)号：US20110122686A1
公开(公告)日：2011-05-26
申请号：US12974737
申请日：2010-12-21
申请人： David Richard Trossen , Malcolm John Wing
发明人： David Richard Trossen , Malcolm John Wing
IPC分类号： G11C11/50 , B82Y30/00
CPC分类号： G11C13/025 , B82Y10/00 , G11C23/00 , Y10S977/708 , Y10S977/732 , Y10S977/943
摘要： A configuration bit array including a hybrid electromechanical and semiconductor memory cell, and circuitry for addressing and controlling read, write, and erase accesses of the memory.
摘要翻译：包括混合机电和半导体存储器单元的配置位阵列以及用于寻址和控制存储器的读，写和擦除存取的电路。

6. 发明授权

US07940557B1 Non-volatile electromechanical configuration bit array 有权
标题翻译：非易失性机电配置位阵列
公开(公告)号：US07940557B1
公开(公告)日：2011-05-10
申请号：US12974737
申请日：2010-12-21
申请人： David Richard Trossen , Malcolm John Wing
发明人： David Richard Trossen , Malcolm John Wing
IPC分类号： G11C11/50
CPC分类号： G11C13/025 , B82Y10/00 , G11C23/00 , Y10S977/708 , Y10S977/732 , Y10S977/943
摘要： A configuration bit array including a hybrid electromechanical and semiconductor memory cell, and circuitry for addressing and controlling read, write, and erase accesses of the memory.
摘要翻译：包括混合机电和半导体存储器单元的配置位阵列以及用于寻址和控制存储器的读，写和擦除存取的电路。

7. 发明授权

US08331138B1 Non-volatile electromechanical configuration bit array 有权
标题翻译：非易失性机电配置位阵列
公开(公告)号：US08331138B1
公开(公告)日：2012-12-11
申请号：US13103038
申请日：2011-05-06
申请人： David Richard Trossen , Malcolm John Wing
发明人： David Richard Trossen , Malcolm John Wing
IPC分类号： G11C11/50
CPC分类号： G11C13/025 , B82Y10/00 , G11C23/00 , Y10S977/708 , Y10S977/732 , Y10S977/943
摘要： A configuration bit array including a hybrid electromechanical and semiconductor memory cell, and circuitry for addressing and controlling read, write, and erase accesses of the memory.
摘要翻译：包括混合机电和半导体存储器单元的配置位阵列以及用于寻址和控制存储器的读，写和擦除存取的电路。

8. 发明授权

US07885103B2 Non-volatile electromechanical configuration bit array 有权
公开(公告)号：US07885103B2
公开(公告)日：2011-02-08
申请号：US11285535
申请日：2005-11-22
申请人： David Richard Trossen , Malcolm John Wing
发明人： David Richard Trossen , Malcolm John Wing
IPC分类号： G11C11/50
CPC分类号： G11C13/025 , B82Y10/00 , G11C23/00 , Y10S977/708 , Y10S977/732 , Y10S977/943
摘要： A configuration bit array including a hybrid electromechanical and semiconductor memory cell, and circuitry for addressing and controlling read, write, and erase accesses of the memory.

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