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11. 发明授权

US5824601A Carboxylic acid etching solution and method 失效
标题翻译：羧酸蚀刻溶液及方法
公开(公告)号：US5824601A
公开(公告)日：1998-10-20
申请号：US885265
申请日：1997-06-30
申请人： Patrick P. H. Dao , Paul William Dryer , Ping-Chang Lue , Michael J. Davison , Terry Andrew Willett , Margaret Leslie Kniffin , Rita Prasad Subrahmanyan
发明人： Patrick P. H. Dao , Paul William Dryer , Ping-Chang Lue , Michael J. Davison , Terry Andrew Willett , Margaret Leslie Kniffin , Rita Prasad Subrahmanyan
IPC分类号： C09K13/08 , H01L21/311 , B44C1/22
CPC分类号： C09K13/08 , H01L21/31111 , Y10S438/911
摘要： A sacrificial oxide etching solution of carboxylic acid and HF having a high etch selectivity for silicon oxide relative to polysilicon, metal, and nitride. The solution is useful in the fabrication of microstructures having integrated electronics on the same chip. A carboxylic acid anhydride can be added to this solution to substantially remove all free water so that the etch selectivity to metal is improved. One specific solution is formed by mixing acetic acid, acetic anhydride, and aqueous HF.
摘要翻译：对于氧化硅相对于多晶硅，金属和氮化物具有高蚀刻选择性的羧酸和HF的牺牲氧化物蚀刻溶液。该解决方案可用于在同一芯片上制造具有集成电子元件的微结构。可以向该溶液中加入羧酸酐以基本上除去所有游离水，从而改善对金属的蚀刻选择性。通过混合乙酸，乙酸酐和HF水溶液形成一种具体的溶液。

12. 发明授权

US5817570A Semiconductor structure for an MOS transistor and method for fabricating the semiconductor structure 失效
标题翻译：用于MOS晶体管的半导体结构和用于制造半导体结构的方法
公开(公告)号：US5817570A
公开(公告)日：1998-10-06
申请号：US870121
申请日：1997-06-03
申请人： Martin Kerber , Udo Schwalke
发明人： Martin Kerber , Udo Schwalke
IPC分类号： H01L29/78 , H01L21/28 , H01L21/316 , H01L21/8234 , H01L27/08 , H01L21/3205 , H01L21/4763
CPC分类号： H01L21/823462 , H01L21/28123 , Y10S438/911
摘要： The MOS transistor has field plates and a subarea of the gate formed from the same polysilicon layer. A gate oxide lying underneath them is produced at the beginning of the fabrication process and it therefore exhibits particularly high quality. The polysilicon in the active area is raised to the same level as the adjoining field oxide areas, resulting in a planar topology.
摘要翻译： MOS晶体管具有场板和由同一多晶硅层形成的栅极的子区域。位于其下方的栅极氧化物在制造过程开始时产生，因此其显示出特别高的质量。有源区域中的多晶硅被提高到与邻接的场氧化物区域相同的水平，导致平面拓扑结构。

13. 发明授权

US5707888A Oxide formed in semiconductor substrate by implantation of substrate with a noble gas prior to oxidation 失效
公开(公告)号：US5707888A
公开(公告)日：1998-01-13
申请号：US434674
申请日：1995-05-04
申请人： Sheldon Aronowitz , James Kimball
发明人： Sheldon Aronowitz , James Kimball
IPC分类号： H01L21/265 , H01L21/316 , H01L21/762 , H01L21/76
CPC分类号： H01L21/02238 , H01L21/02255 , H01L21/02299 , H01L21/26506 , H01L21/31662 , H01L21/76213 , Y10S438/911
摘要： A process and resulting product is described for forming an oxide in a semiconductor substrate which comprises initially implanting the substrate with atoms of a noble gas, then oxidizing the implanted substrate at a reduced temperature, e.g., less than 900.degree. C., to form oxide in the implanted region of the substrate, and then etching the oxidized substrate to remove a portion of the oxide. The resulting oxidation produces a dual layer of oxide in the substrate. The upper layer is an extremely porous and frothy layer of oxide, while the lower layer is a more dense oxide. The upper porous layer of oxide can be selectively removed from the substrate by a mild etch, leaving the more dense oxide layer in the substrate. Further oxide can then be formed adjacent the dense layer of oxide in the substrate, either by oxide deposition over the dense oxide or by growing further oxide beneath the dense oxide layer. The initial oxide formed by the process appears to be temperature independent, at temperatures of 900.degree. C. or less, with oxide formation apparently dependent upon the extent of the implanted regions of the substrate, rather than upon temperature, resulting in thermal savings. Furthermore, the excess implanted noble gas in the substrate adjacent the oxide formed therein can have beneficial effects in inhibiting the formation of parasitic field transistors and in greater control over field thresholds.

14. 发明授权

US5612246A Method for manufacturing semiconductor substrate having buck transistor and SOI transistor areas 失效
标题翻译：具有降压晶体管和SOI晶体管区域的半导体衬底的制造方法
公开(公告)号：US5612246A
公开(公告)日：1997-03-18
申请号：US549441
申请日：1995-10-27
申请人： Jong-Hyon Ahn
发明人： Jong-Hyon Ahn
IPC分类号： H01L21/8238 , H01L21/20 , H01L21/762 , H01L21/84 , H01L27/08 , H01L27/092 , H01L27/12 , H01L29/786 , H01L21/76
CPC分类号： H01L21/76202 , H01L21/7624 , H01L21/84 , Y10S438/911
摘要： A method for manufacturing a semiconductor substrate structure wherein a comprising the steps of defining bulk transistor and SOI transistor areas, the bulk transistor area disposed on a lower single crystalline silicon layer, and the SOI transistor area diposed on an upper single crystalline silicon layer. The method characterized in that a spacer is formed on a portion of the bulk transistor area which covers a sidewall of the SOI transistor area, a first conductive well is formed in the lower single crystalline silicon layer and a well oxide layer is formed over the first conductive well region, a second conductive well is formed in the lower single crystalline silicon layer between the SOI transistor layer and the first conductive well, and the first conductive well is rediffused.
摘要翻译：一种用于制造半导体衬底结构的方法，其中包括以下步骤：定义体晶体管和SOI晶体管区域，所述体晶体管区域设置在下单晶硅层上，并且所述SOI晶体管区域被放置在上单晶硅层上。该方法的特征在于，在覆盖SOI晶体管区域的侧壁的体晶体管区域的一部分上形成间隔物，第一导电阱形成在下单晶硅层中，并且在第一在SOI晶体管层和第一导电阱之间的下单晶硅层中形成第二导电阱，并且第一导电阱被再扩散。

15. 发明授权

US5576225A Method of forming electric circuit using anodic oxidation 失效
标题翻译：使用阳极氧化形成电路的方法
公开(公告)号：US5576225A
公开(公告)日：1996-11-19
申请号：US53227
申请日：1993-04-28
申请人： Hongyong Zhang , Hideki Uochi , Hiroki Adachi , Itaru Koyama , Shunpei Yamazaki
发明人： Hongyong Zhang , Hideki Uochi , Hiroki Adachi , Itaru Koyama , Shunpei Yamazaki
IPC分类号： H01L21/28 , H01L21/8234 , H01L21/84
CPC分类号： H01L21/823475 , H01L21/28079 , H01L21/84 , Y10S438/911
摘要： An improved method of forming insulated gate field effect transistors is described. In accordance with the method, gate electrodes are formed from metal such as aluminum together with wirings electrically connecting the gate electrodes. The gate electrodes are anodic oxidized by dipping them as an anode in an electrolyte to form an oxide of the metal covering them. Since the connecting wirings are covered with a suitable organic film before the anodizing, no aluminum oxide is formed thereon so that it is easy to remove the connecting wiring by usual etching.
摘要翻译：描述了形成绝缘栅场效应晶体管的改进方法。根据该方法，栅电极由诸如铝的金属以及电连接栅电极的布线形成。通过将栅电极作为阳极浸渍在电解质中以形成覆盖它们的金属的氧化物来阳极氧化。由于在阳极氧化之前用合适的有机膜覆盖连接布线，所以不会在其上形成氧化铝，从而通过通常的蚀刻容易地去除连接布线。

16. 发明授权

US5407840A Method for simultaneously fabricating bipolar and complementary field effect transistors 失效
标题翻译：同时制造双极和互补场效应晶体管的方法
公开(公告)号：US5407840A
公开(公告)日：1995-04-18
申请号：US925807
申请日：1992-08-04
申请人： Juliana Manoliu , Prateep Tuntasood
发明人： Juliana Manoliu , Prateep Tuntasood
IPC分类号： H01L21/74 , H01L21/8249 , H01L21/328 , H01L21/336
CPC分类号： H01L21/8249 , H01L21/74 , Y10S438/911 , Y10S438/981
摘要： A process is disclosed for simultaneously fabricating bipolar and complementary field effect transistors. The process includes the fabrication of buried layers 18 doped with both phosphorus and arsenic to permit a shorter diffusion time while simultaneously providing buried layers having low resistance and high diffusivity. The process enables fabrication of BiCMOS structures using only six masks prior to the contact mask. The process also comprises oxidizing an epitaxial layer for forming a differential thickness oxide layer which is thicker over the source and drain regions, the collector contact and the emitter than over the base contact region.
摘要翻译：公开了同时制造双极和互补场效应晶体管的方法。该方法包括制造掺杂有磷和砷的掩埋层18，以允许更短的扩散时间，同时提供具有低电阻和高扩散率的掩埋层。该过程使得在接触掩模之前仅使用六个掩模制造BiCMOS结构。该工艺还包括氧化外延层以形成比源极和漏极区域，集电极触点和发射极之上比在底部接触区域上更厚的差分厚度氧化物层。

17. 发明授权

US5372950A Method for forming isolation regions in a semiconductor memory device 失效
标题翻译：在半导体存储器件中形成隔离区域的方法
公开(公告)号：US5372950A
公开(公告)日：1994-12-13
申请号：US845705
申请日：1992-03-04
申请人： Yun-gi Kim , Cheon-su Bhan , Byeong-yeol Kim
发明人： Yun-gi Kim , Cheon-su Bhan , Byeong-yeol Kim
IPC分类号： H01L21/76 , H01L21/316 , H01L21/32 , H01L21/762
CPC分类号： H01L21/76213 , H01L21/32 , Y10S438/911
摘要： A method for forming an isolation region within a semiconductor device is disclosed. A trench is first formed in a predefined isolation region of a semiconductor substrate. An oxidation blocking material is injected into the inside walls of the trench before growing a field oxide film inside the trench. Accordingly, the present invention can simplify the fabrication of isolation regions within a semiconductor device by directly implanting the oxidation blocking material at a predetermined angle into the inside walls of the trench which constitutes the isolation region. In the present invention, unlike conventional fabrication processes using spacers to prevent penetration of a field oxide film into the surface of semiconductor non-isolation regions, the need for spacers is obviated.
摘要翻译：公开了一种在半导体器件内形成隔离区域的方法。首先在半导体衬底的预定隔离区中形成沟槽。在沟槽内生长场氧化物膜之前，将氧化阻挡材料注入沟槽的内壁。因此，本发明可以通过将预定角度的氧化阻挡材料直接注入构成隔离区域的沟槽的内壁来简化半导体器件内的隔离区的制造。在本发明中，与使用间隔物以防止场氧化物膜渗透到半导体非隔离区域的表面中的常规制造方法不同，不需要间隔物。

18. 发明授权

US5350492A Oxide removal method for improvement of subsequently grown oxides 失效
标题翻译：用于改进随后生长的氧化物的氧化物去除方法
公开(公告)号：US5350492A
公开(公告)日：1994-09-27
申请号：US947314
申请日：1992-09-18
申请人： Steven C. Hall , Mark I. Gardner , Henry J. Fulford, Jr.
发明人： Steven C. Hall , Mark I. Gardner , Henry J. Fulford, Jr.
IPC分类号： H01L21/306 , H01L21/311 , H01L21/762 , H01L21/00 , B44C1/22 , C03C15/00 , H01L21/02
CPC分类号： H01L21/76202 , H01L21/31111 , Y10S438/911
摘要： A method is disclosed for removing oxide from the surface of a semiconductor body having a thick oxide and an adjoining nitride-covered thin oxide, without subjecting the surface to significant over-etching and thus avoiding degredation of the surface of the semiconductor body. The thick oxide is first etched for a period of time so that a portion of the thick oxide remains, and has a thickness comparable to that of the thin oxide. The nitride covering the thin oxide is next removed without appreciably etching either the remaining portion of the thick oxide or the thin oxide. Finally, the thin oxide and the remaining portion of the thick oxide are removed, without appreciably over-etching the surface of the semiconductor body.
摘要翻译：公开了一种用于从具有厚氧化物和邻接的氮化物覆盖的薄氧化物的半导体主体的表面去除氧化物的方法，而不会使表面受到显着的过度蚀刻，从而避免半导体本体的表面变色。首先蚀刻厚氧化物一段时间，使得一部分厚氧化物保留，并具有与薄氧化物相当的厚度。覆盖薄氧化物的氮化物接下来被去除，而不明显地蚀刻厚氧化物或薄氧化物的剩余部分。最后，去除薄氧化物和厚氧化物的剩余部分，而不会明显地过度蚀刻半导体本体的表面。

19. 发明授权

US5324675A Method of producing semiconductor devices of a MONOS type 失效
标题翻译：制造MONOS型半导体器件的方法
公开(公告)号：US5324675A
公开(公告)日：1994-06-28
申请号：US40341
申请日：1993-03-30
申请人： Itsunari Hayabuchi
发明人： Itsunari Hayabuchi
IPC分类号： H01L21/28 , H01L21/314 , H01L21/336 , H01L29/51 , H01L21/31
CPC分类号： H01L21/28202 , H01L21/28211 , H01L21/3144 , H01L29/513 , H01L29/518 , H01L29/66833 , Y10S438/911 , Y10S438/954
摘要： A method of producing a semiconductor device of the type which includes a semiconductor substrate; a gate insulating layer of a triplex structure formed on the semiconductor substrate and composed of a first oxide layer, an oxidation-resistant layer and a second oxide layer, and a gate electrode formed on the gate insulating layer, includes the steps of: forming the first oxide layer, the oxidation-resistant layer, and the second oxide layer successively on the semiconductor substrate; adjusting the thickness of the oxidation-resistant layer during or after the formation thereof in such a way that the entire oxidation-resistant layer can be oxidized in a post-process in which the oxidation-resistant layer is oxidized except for that region which corresponds to the gate electrode; and oxidizing the oxidation-resistant layer except for the region corresponding to the gate electrode and forming an oxide layer around the gate electrode, whereby the oxidation-resistant layer is entirely oxidized except for the region corresponding to the gate electrode. The resulting silicon oxide layer can be used as an address gate or as the gate insulating layer of an MOS transistor gate for a peripheral circuit.
摘要翻译：一种制造包括半导体衬底的类型的半导体器件的方法; 在半导体衬底上形成的由第一氧化物层，耐氧化层和第二氧化物层构成的三重结构的栅极绝缘层和形成在栅极绝缘层上的栅电极包括以下步骤：第一氧化物层，抗氧化层和第二氧化物层; 在其形成期间或之后调整抗氧化层的厚度，使得整个抗氧化层可以在除氧化层被氧化的后期工艺中被氧化，除了对应于栅电极; 除了与栅电极对应的区域之外氧化耐氧化层，在栅极周围形成氧化层，除了对应于栅电极的区域外，氧化层完全被氧化。所得到的氧化硅层可用作外围电路的MOS晶体管栅极的地址栅极或栅极绝缘层。

20. 发明授权

US5292680A Method of forming a convex charge coupled device 失效
标题翻译：形成凸电荷耦合器件的方法
公开(公告)号：US5292680A
公开(公告)日：1994-03-08
申请号：US57883
申请日：1993-05-07
申请人： Water Lur , J. Y. Wu , Jenn-Tarng Lin
发明人： Water Lur , J. Y. Wu , Jenn-Tarng Lin
IPC分类号： H01L21/306 , H01L21/339 , H01L29/10 , H01L29/768
CPC分类号： H01L29/66954 , H01L21/306 , H01L29/1062 , H01L29/76833 , Y10S438/911 , Y10S438/981
摘要： A new method of fabricating a convex charge coupled device is achieved. A silicon oxide layer is formed over the surface of a silicon substrate and patterned with a charge coupled device (CCD) electrode mask to provide openings to the silicon substrate. Nitride spacers are formed on the sidewalls of the openings. The integrated circuit is coated with a spin-on-glass layer. After curing, the spin-on-glass layer is etched back to expose the nitride spacers. Removing the nitride spacers leaves a second set of openings to the silicon substrate. Ions are implanted into the substrate through the second set of openings. The oxide layer is removed. The wafer is globally oxidized resulting in a thermal oxide layer with undulatory thickness. The thermal oxide is removed leaving a convex surface on the silicon substrate. A gate oxide layer is formed on the convex surface of the silicon substrate. A polysilicon layer is deposited overlying the gate oxide layer and patterned to form gate electrodes to complete formation of the charge coupled device.
摘要翻译：实现了一种制造凸电荷耦合器件的新方法。在硅衬底的表面上形成硅氧化物层，并用电荷耦合器件（CCD）电极掩模构图，以向硅衬底提供开口。氮化物间隔物形成在开口的侧壁上。集成电路涂有旋涂玻璃层。固化后，将旋涂玻璃层回蚀以暴露氮化物间隔物。去除氮化物间隔物留下第二组开口到硅衬底。离子通过第二组开口植入衬底。去除氧化物层。晶片被全局氧化，导致具有波浪厚度的热氧化层。去除热氧化物，留下硅衬底上的凸表面。在硅衬底的凸表面上形成栅氧化层。沉积覆盖栅极氧化物层的多晶硅层并图案化以形成栅电极以完成电荷耦合器件的形成。

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