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11. 发明授权

US08692281B2 Light emitting diode submount with high thermal conductivity for high power operation 有权
标题翻译：具有高导热性的发光二极管底座，用于大功率操作
公开(公告)号：US08692281B2
公开(公告)日：2014-04-08
申请号：US13271986
申请日：2011-10-12
申请人： Wen-Herng Su , Junying Lu , Ho-Shang Lee
发明人： Wen-Herng Su , Junying Lu , Ho-Shang Lee
IPC分类号： H01L33/00
CPC分类号： H01L33/483 , H01L33/005 , H01L33/60 , H01L2224/13 , H01L2224/45144 , H01L2224/48091 , H01L2924/19107 , H05K1/053 , H05K1/162 , H05K1/183 , H05K2201/0116 , H05K2201/0179 , H05K2201/10106 , H05K2203/0315 , Y10S362/80 , Y10T29/4913 , Y10T29/49144 , Y10T29/49147 , Y10T29/49149 , Y10T29/49155 , Y10T29/53113 , H01L2924/00014 , H01L2924/00
摘要： This invention relates to the thermal management, extraction of light, and cost effectiveness of Light Emitting Diode, or LED, electrical circuits. An integrated circuit LED submount is described, for the packaging of high power LEDs. The LED submount provides high thermal conductivity while preserving electrical insulation. In particular, a process is described for anodizing a high thermal conductivity aluminum alloy sheet to form a porous aluminum oxide layer and a non-porous aluminum oxide layer. This anodized aluminum alloy sheet acts as a superior electrical insulator, and also provides surface morphology and mechanical properties that are useful for the fabrication of high-density and high-power multilevel electrical circuits.
摘要翻译：本发明涉及发光二极管或LED电路的热管理，光提取和成本效益。描述了集成电路LED基座，用于大功率LED的封装。 LED基座提供高导热性，同时保持电气绝缘。特别地，描述了用于阳极氧化高导热性铝合金板以形成多孔氧化铝层和无孔氧化铝层的工艺。该阳极氧化铝合金板作为优异的电绝缘体，并且还提供用于制造高密度和大功率多电平电路的表面形态和机械性能。

12. 发明授权

US08563420B2 Multilayer printed wiring board 有权
标题翻译：多层印刷线路板
公开(公告)号：US08563420B2
公开(公告)日：2013-10-22
申请号：US13561247
申请日：2012-07-30
申请人： Takashi Kariya , Akira Mochida
发明人： Takashi Kariya , Akira Mochida
IPC分类号： H01L21/4763
CPC分类号： H05K1/162 , H05K1/0231 , H05K1/0271 , H05K1/113 , H05K3/4602 , H05K2201/0133 , H05K2201/0175 , H05K2201/0179 , H05K2201/0187 , H05K2201/09509 , H05K2201/09518 , H05K2201/09563 , H05K2201/096 , H05K2201/09718 , H05K2201/09763 , H05K2201/10522 , H05K2201/10734
摘要： A method for manufacturing a printed wiring board includes forming an uncalcined layer containing a raw ceramic material on a first metal layer, firing the uncalcined layer formed on the first metal layer such that a high dielectric constant layer having a ceramic body calcined in a sheet form is formed on the first metal layer, forming a second metal layer on the high dielectric constant layer on the opposite side of the high dielectric constant layer with respect to the first metal layer such that a layered capacitor having the high dielectric constant layer and first and second layer electrodes sandwiching the high dielectric constant layer is formed, and disposing the layered capacitor in a main body.
摘要翻译：一种制造印刷电路板的方法包括在第一金属层上形成含有原料陶瓷材料的未煅烧层，焙烧形成在第一金属层上的未煅烧层，使得具有以片状形式煅烧的陶瓷体的高介电常数层形成在第一金属层上，相对于第一金属层在高介电常数层的相对侧的高介电常数层上形成第二金属层，使得具有高介电常数层的层状电容器和第一金属层形成夹着高介电常数层的第二层电极，并将层叠电容器配置在主体中。

13. 发明授权

US08394509B2 Surface-treated copper foil 有权
标题翻译：表面处理铜箔
公开(公告)号：US08394509B2
公开(公告)日：2013-03-12
申请号：US13002394
申请日：2009-06-26
申请人： Seiji Nagatani , Hiroshi Watanabe , Kazufumi Izumida
发明人： Seiji Nagatani , Hiroshi Watanabe , Kazufumi Izumida
IPC分类号： B32B15/04
CPC分类号： H05K3/382 , B32B15/08 , B32B15/20 , B32B27/06 , B32B2255/06 , B32B2255/20 , B32B2255/26 , B32B2255/28 , B32B2307/206 , B32B2307/50 , B32B2307/538 , B32B2307/714 , B32B2307/732 , B32B2307/75 , C23C14/024 , C23C14/14 , H05K3/388 , H05K2201/0179 , H05K2201/0317 , H05K2201/0323 , Y10T428/12028 , Y10T428/12438 , Y10T428/12625 , Y10T428/12681 , Y10T428/12806 , Y10T428/12903 , Y10T428/24975 , Y10T428/265
摘要： Object is to provide a surface-treated copper foil free from chromium in the surface-treatment layer and excellent in peel strength of a circuit and chemical resistance against to degradation of the peel strength after processing into a printed wiring board. To achieve the object, the surface-treated copper foil having a surface-treatment layer on a bonding surface of a copper foil for manufacturing a copper-clad laminate by laminating it to an insulating resin substrate has the surface-treatment layer formed by depositing a metal component having high melting point not lower than 1400° C. by dry process film formation method to the bonding surface of the copper foil after the cleaning treatment and further depositing a carbon component to the surface.
摘要翻译：本发明提供一种在表面处理层中不含铬的表面处理铜箔，并且电路的剥离强度优异，并且在加工成印刷线路板之后，耐化学性能降低剥离强度。为了实现该目的，在覆铜层压板的制造用铜箔的接合面上具有表面处理层的表面处理铜箔通过层叠在绝缘性树脂基板上而形成有表面处理层，通过干法成膜法将熔点不低于1400℃的高熔点金属成分施加到清洁处理后的铜箔的接合面上，并进一步在表面上沉积碳成分。

14. 发明授权

US08310838B2 Electric drive with a circuit board 有权
标题翻译：电驱动带电路板
公开(公告)号：US08310838B2
公开(公告)日：2012-11-13
申请号：US12591037
申请日：2009-11-05
申请人： Helmut Kellermann
发明人： Helmut Kellermann
IPC分类号： H01R9/00
CPC分类号： H05K3/284 , H05K3/28 , H05K3/308 , H05K2201/0179 , H05K2201/09581 , H05K2201/1059 , Y10T29/49139
摘要： An electric drive (1) with a circuit board (2), having conductor tracks (3) and contact openings (4) with plated through-holes (5) and equipped with electronic components (6), the circuit board (2) being coated with a protective layer (7) of insulating material, and press-fit contacts (8) are inserted into the contact openings (4) and in electrical contact areas (9) within the contact openings (4) electrical contact exists between a press-fit contact (8) and the plated through-hole (5) of the contact opening (4). The task of the invention is to reliably protect circuit boards of electric drives exposed to moisture and other chemical environmental effects and contact them economically. This task is solved according to the invention in that the protective layer (7) is a parylene coating, which covers the circuit board (2), the electronic components (6) and the surface areas of the contact openings (4) and circuit board (2) directly connected to the contact areas (9) between at least one press-fit contact (8) and at least one contact opening (4).
摘要翻译：一种具有电路板（2）的电驱动器（1），具有导体轨道（3）和具有电镀通孔（5）并具有电子部件（6）的接触开口（4），所述电路板（2）涂覆有绝缘材料的保护层（7），并且压配合触点（8）被插入到接触开口（4）和接触开口（4）内的电接触区域（9）中，电接触存在于压机（8）和接触开口（4）的电镀通孔（5）。本发明的任务是可靠地保护暴露于水分和其他化学环境影响的电驱动电路板，并经济地接触它们。根据本发明解决的这个任务是保护层（7）是聚对二甲苯涂层，其覆盖电路板（2），电子部件（6）和接触开口（4）的表面积和电路板（2）直接连接在至少一个压配合触头（8）和至少一个触点开口（4）之间的接触区域（9）上。

15. 发明授权

US08288655B2 Circuit board structure and manufacturing method thereof 有权
标题翻译：电路板结构及其制造方法
公开(公告)号：US08288655B2
公开(公告)日：2012-10-16
申请号：US12258453
申请日：2008-10-27
申请人： Ra-Min Tain , Ming-Ji Dai
发明人： Ra-Min Tain , Ming-Ji Dai
IPC分类号： H05K1/03 , H05K1/09 , H05K1/00 , H05K7/20
CPC分类号： H05K1/053 , B82Y10/00 , H05K2201/0179 , H05K2201/0209 , H05K2201/0251 , H05K2201/026 , H05K2201/0323 , H05K2203/025
摘要： A circuit board structure and a manufacturing method thereof are provided. The circuit board structure includes a composite substrate, a dielectric layer, and a circuit layer. The composite substrate includes a metal substrate doped with non-metal powders and a metal buffer layer. A surface of the metal buffer layer opposite to the other surface of the metal buffer layer in contact with the metal substrate is treated by a polishing process. The dielectric layer is formed on the polished surface of the metal buffer layer, and the circuit layer is formed on the dielectric layer. Alternatively, a barrier layer is interposed between the dielectric layer and the metal buffer layer for preventing a diffusion effect of the metal buffer layer.
摘要翻译：提供一种电路板结构及其制造方法。电路板结构包括复合衬底，电介质层和电路层。复合衬底包括掺杂有非金属粉末和金属缓冲层的金属衬底。通过抛光处理处理与金属基板接触的金属缓冲层的另一表面相对的金属缓冲层的表面。电介质层形成在金属缓冲层的抛光表面上，电介质层形成在电介质层上。或者，在电介质层和金属缓冲层之间插入阻挡层，以防止金属缓冲层的扩散效应。

16. 发明授权

US08254082B2 Capacitor material, production method of the same, and capacitor, wiring board and electronic device containing that material 有权
标题翻译：电容器材料，制造方法相同，电容器，接线板和含有该材料的电子器件
公开(公告)号：US08254082B2
公开(公告)日：2012-08-28
申请号：US12374698
申请日：2008-01-25
申请人： Akihiko Shirakawa , Ryuichi Mitsumoto , Koji Tokita
发明人： Akihiko Shirakawa , Ryuichi Mitsumoto , Koji Tokita
IPC分类号： H01G4/008
CPC分类号： H01G4/33 , H01G4/1218 , H01G4/20 , H01G9/0032 , H01G9/052 , H01G9/07 , H05K1/162 , H05K2201/0175 , H05K2201/0179 , H05K2201/0195 , H05K2203/0315 , Y10T156/10 , Y10T428/266
摘要： The capacitor material of the present invention is comprised by laminating a titanium dioxide layer and a titanate compound layer having perovskite crystals.
摘要翻译：本发明的电容器材料通过层叠二氧化钛层和具有钙钛矿结晶的钛酸盐化合物层构成。

17. 发明授权

US08173906B2 Environmental protection coating system and method 有权
标题翻译：环保涂料体系及方法
公开(公告)号：US08173906B2
公开(公告)日：2012-05-08
申请号：US11848891
申请日：2007-08-31
申请人： John M. Bedinger , Michael A. Moore
发明人： John M. Bedinger , Michael A. Moore
IPC分类号： H05K1/00
CPC分类号： H05K3/284 , H01L23/3192 , H01L23/4821 , H01L24/83 , H01L2224/2929 , H01L2224/293 , H01L2224/48137 , H01L2224/73265 , H01L2224/83801 , H01L2224/83851 , H01L2224/8592 , H01L2924/00011 , H01L2924/01004 , H01L2924/01019 , H01L2924/0781 , H01L2924/1305 , H01L2924/14 , H01L2924/1423 , H01L2924/19041 , H05K2201/0179 , H05K2201/0195 , H05K2203/1322 , Y10T29/49124 , Y10T29/49146 , Y10T29/49155 , Y10T29/49982 , H01L2924/3512 , H01L2924/00 , H01L2224/29075 , H01L2924/00014
摘要： According to one embodiment of the disclosure, an environmental protection coating comprises a circuit assembly having a first protective dielectric layer and a second dielectric layer. The circuit assembly has an outer surface on which a plurality of discrete electrical components are attached. The first protective dielectric layer overlays the circuit assembly. The second dielectric layer overlays the first protective dielectric layer and is made of a dielectric material having modulus of elasticity less than 3.5 Giga-Pascal (GPa), dielectric constant less than 2.7, dielectric loss less than 0.008, breakdown voltage strength in excess of 2 million volts/centimeter (MV/cm), temperature stability to 300° Celsius, defect densities less than 0.5/centimeter, pinhole free in films greater than 50 Angstroms, capable of being deposited conformally over and under 3D structures with thickness uniformity less than or equal to 10%.
摘要翻译：根据本公开的一个实施例，环境保护涂层包括具有第一保护介电层和第二电介质层的电路组件。电路组件具有附接有多个分立电气部件的外表面。第一保护介电层覆盖电路组件。第二电介质层覆盖第一保护介电层，并由弹性模量小于3.5千兆帕（GPa），介电常数小于2.7，介电损耗小于0.008的电介质材料制成，击穿电压强度超过2 百万伏/厘米（MV /厘米），温度稳定至300摄氏度，缺陷密度小于0.5厘米，薄膜中无针孔大于50埃，能够平滑地沉积在3D结构之上和之下，厚度均匀度小于或等于等于10％。

18. 发明授权

US08117744B2 Process for forming an isolated electrically conductive contact through a metal package 失效
标题翻译：用于通过金属封装形成隔离的导电触点的工艺
公开(公告)号：US08117744B2
公开(公告)日：2012-02-21
申请号：US13027167
申请日：2011-02-14
申请人： Michael Nashner , Jeffrey Howerton
发明人： Michael Nashner , Jeffrey Howerton
IPC分类号： H01K3/10
CPC分类号： H05K3/445 , H05K1/053 , H05K3/4061 , H05K5/0247 , H05K2201/0179 , H05K2201/09581 , H05K2201/09827 , H05K2203/0315 , H05K2203/0323 , H05K2203/107 , Y10T29/49155 , Y10T29/49165
摘要： A method of forming an isolated electrically conductive contact through a metallic substrate includes creating at least one via through the substrate, where the via includes a first opening in a top surface of the substrate, a second opening in an opposing bottom surface and at least one continuous sidewall extending therebetween. A dielectric sleeve is formed on the at least one sidewall of the via while preserving at least a portion of the through via. An electrically conductive filler is then placed into the via. In the examples disclosed, the filler may be a conductive ink or a conductive epoxy.
摘要翻译：通过金属基底形成隔离的导电接触的方法包括产生穿过基底的至少一个通孔，其中通孔包括在基底的顶表面中的第一开口，在相对的底表面中的第二开口和至少一个连续的侧壁在其间延伸。介电套筒形成在通孔的至少一个侧壁上，同时保留通孔的至少一部分。然后将导电填料放入通孔中。在所公开的实施例中，填料可以是导电油墨或导电环氧树脂。

19. 发明申请

US20120037414A1 MULTILAYER PRINTED WIRING BOARD AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：多层印刷接线板及其制造方法
公开(公告)号：US20120037414A1
公开(公告)日：2012-02-16
申请号：US13269079
申请日：2011-10-07
申请人： Hironori Tanaka
发明人： Hironori Tanaka
IPC分类号： H05K1/16
CPC分类号： H05K1/162 , H05K1/0269 , H05K1/112 , H05K3/205 , H05K3/4602 , H05K3/4644 , H05K2201/0179 , H05K2201/0347 , H05K2201/0355 , H05K2201/09309 , H05K2201/09518 , H05K2201/09563 , H05K2201/096 , H05K2201/09718 , H05K2201/09763 , H05K2201/09918 , H05K2203/166
摘要： A multilayer printed wiring board including a layered capacitor section provided on a first interlayer resin insulation layer and a high dielectric layer and first and second layered electrodes that sandwich the high dielectric layer. A second interlayer resin insulation layer is provided on the first insulation layer and the capacitor section, and a metal thin-film layer is provided over the capacitor section and on the second insulation layer. An outermost interlayer resin insulation layer is provided on the second insulation layer and the metal thin-film layer. A mounting section is provided on the outermost insulation layer and has first and second external terminals to mount a semiconductor element. Multiple via conductors penetrate each insulation layer. The via conductors include first via conductors that electrically connect the first layered electrode to the first external terminals. Second via conductors electrically connect the second layered electrode to the second external terminals.
摘要翻译：一种多层印刷线路板，包括设置在第一层间树脂绝缘层和高电介质层上的层状电容器部分和夹着高电介质层的第一和第二层状电极。在第一绝缘层和电容器部分上设置第二层间树脂绝缘层，并且在电容器部分和第二绝缘层上设置金属薄膜层。在第二绝缘层和金属薄膜层上设置最外层的层间树脂绝缘层。安装部分设置在最外层绝缘层上，并且具有安装半导体元件的第一和第二外部端子。多个通孔导体穿过每个绝缘层。通孔导体包括将第一层状电极电连接到第一外部端子的第一通孔导体。第二通孔导体将第二层状电极电连接到第二外部端子。

20. 发明授权

US08108990B2 Method for manufacturing printed circuit board 有权
标题翻译：印刷电路板制造方法
公开(公告)号：US08108990B2
公开(公告)日：2012-02-07
申请号：US12255699
申请日：2008-10-22
申请人： Takashi Kariya , Hironori Tanaka
发明人： Takashi Kariya , Hironori Tanaka
IPC分类号： H05K3/00
CPC分类号： H05K1/162 , H01L23/49822 , H01L23/49827 , H01L23/50 , H01L23/642 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2924/00014 , H01L2924/3011 , H05K3/4602 , H05K2201/0175 , H05K2201/0179 , H05K2201/0352 , H05K2201/09309 , H05K2201/09536 , H05K2201/09563 , H05K2201/096 , H05K2201/09718 , H05K2201/09827 , Y10T29/43 , Y10T29/435 , Y10T29/49124 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , H01L2224/05599
摘要： A printed circuit board including a conductor portion, an insulating layer formed over the conductor portion, a thin-film capacitor formed over the insulating layer and including a first electrode, a second electrode and a high-dielectric layer interposed between the first electrode and the second electrode, and a via-hole conductor structure formed through the second electrode and insulating layer and electrically connecting the second electrode and the conductor portion. The via-hole conductor structure has a first portion in the second electrode and a second portion in the insulating layer. The first portion of the via-hole conductor structure has a truncated-cone shape tapering toward the conductor portion.
摘要翻译：一种印刷电路板，包括导体部分，在导体部分上形成的绝缘层，形成在绝缘层之上的薄膜电容器，并且包括第一电极，第二电极和介于第一电极和第二电极之间的高电介质层第二电极和通过第二电极和绝缘层形成的通孔导体结构，并且电连接第二电极和导体部分。通孔导体结构在第二电极中具有第一部分，在绝缘层中具有第二部分。通孔导体结构的第一部分具有朝向导体部分逐渐变细的截锥形。

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