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11. 发明申请

US20150357980A1 SIGNAL PROCESSING CIRCUIT, RESOLVER DIGITAL CONVERTER, AND MULTIPATH NESTED MIRROR AMPLIFIER 有权
标题翻译：信号处理电路，分辨率数字转换器和多路径镜像放大器
公开(公告)号：US20150357980A1
公开(公告)日：2015-12-10
申请号：US14827519
申请日：2015-08-17
申请人： Renesas Electronics Corporation
发明人： Yoshihiro FUNATO , Toshio KUMAMOTO , Tomoaki YOSHIZAWA , Kazuaki KUROOKA
IPC分类号： H03F3/393 , H03F3/217 , H03F3/45
CPC分类号： H03F3/2171 , H03F3/005 , H03F3/393 , H03F3/45179 , H03F3/45192 , H03F3/45762 , H03F3/45946 , H03F2200/264 , H03F2200/271 , H03F2200/375 , H03F2200/408 , H03F2200/411 , H03F2200/81 , H03F2203/45012 , H03F2203/45028 , H03F2203/45116 , H03F2203/45136 , H03F2203/45138 , H03F2203/45174 , H03F2203/45212 , H03F2203/45512 , H03F2203/45528 , H03F2203/45558 , H03F2203/45594 , H03F2203/45601 , H03F2203/45604 , H03F2203/45631 , H03F2203/45632 , H03F2203/45634 , H03F2203/45641 , H03F2203/45681 , H03F2203/45698 , H03F2203/45726
摘要： A signal processing circuit includes a chopper amplifier that has a differential amplifier circuit that amplifies differential input signals Vsp(t) and Vsm(t), and an adder circuit that generates an addition signal Vfil(t) by addition of the chopper output signal Vsub(t) that the chopper amplifier generates. Differential signals inputted into the differential amplifier circuit are interchanged for every first phase period and second phase period, and the adder circuit generates the addition signal by addition of the chopper output signal in the first phase period and in the second phase period.
摘要翻译：信号处理电路包括具有放大差分输入信号Vsp（t）和Vsm（t）的差分放大器电路的斩波放大器，以及通过将斩波器输出信号Vsub相加产生相加信号Vfil（t）的加法电路（t）斩波放大器产生。输入到差分放大器电路的差分信号每第一相位周期和第二相位周期互换，并且加法器电路通过在第一相位周期和第二相位周期中相加斩波器输出信号来生成相加信号。

12. 发明申请

US20150035813A1 DRIVE CIRCUIT OF ORGANIC LIGHT EMITTING DISPLAY AND OFFSET VOLTAGE ADJUSTMENT UNIT THEREOF 审中-公开
标题翻译：有机发光显示器和偏移电压调整单元的驱动电路
公开(公告)号：US20150035813A1
公开(公告)日：2015-02-05
申请号：US14070515
申请日：2013-11-02
申请人： INTEGRATED SOLUTIONS TECHNOLOGY INC.
发明人： CHIA CHENG LEI
IPC分类号： G09G3/32 , H03F3/45
CPC分类号： G09G3/3208 , G09G2310/027 , G09G2310/0291 , H03F3/393 , H03F3/45134 , H03F2203/45112 , H03F2203/45726
摘要： A drive circuit of an organic light emitting display and an offset voltage adjustment unit thereof are provided. The offset voltage adjustment unit can be used in an operational amplifier of the drive circuit having a differential input stage, a bias stage, and an output stage. The offset voltage adjustment unit coupled between the bias stage and a ground including a resistor string and a plurality of latch units. The resistor string has a first-end, a second-end, and a plurality of resistors series-connected between the first-end and the second-end forming a plurality of junctions. The latch units are coupled between the junctions and the ground, respectively. The latch units are sequentially conducted to adjust a bias current of the bias stage according to a control signal. The latch units enter a latch state upon receiving a latch signal to calibrate an output offset voltage of the operational amplifier.
摘要翻译：提供有机发光显示器的驱动电路及其偏移电压调整单元。偏移电压调整单元可以用在具有差分输入级，偏置级和输出级的驱动电路的运算放大器中。偏置电压调整单元耦合在偏置级与包括电阻串和多个锁存单元的接地之间。电阻串具有第一端，第二端和串联连接在第一端和第二端之间的多个电阻器，形成多个结。闩锁单元分别连接在接头和接地之间。根据控制信号顺序导通锁存单元以调整偏置级的偏置电流。锁存单元在接收到锁存信号时进入锁存状态，以校准运算放大器的输出失调电压。

13. 发明申请

US20140340145A1 SIGNAL PROCESSING CIRCUIT, RESOLVER DIGITAL CONVERTER, AND MULTIPATH NESTED MIRROR AMPLIFIER 有权
标题翻译：信号处理电路，分辨率数字转换器和多路径镜像放大器
公开(公告)号：US20140340145A1
公开(公告)日：2014-11-20
申请号：US14254294
申请日：2014-04-16
申请人： RENESAS ELECTRONICS CORPORATION
发明人： Yoshihiro FUNATO , Toshio KUMAMOTO , Tomoaki YOSHIZAWA , Kazuaki KUROOKA
IPC分类号： H03F3/217 , H03F3/45
CPC分类号： H03F3/2171 , H03F3/005 , H03F3/393 , H03F3/45179 , H03F3/45192 , H03F3/45762 , H03F3/45946 , H03F2200/264 , H03F2200/271 , H03F2200/375 , H03F2200/408 , H03F2200/411 , H03F2200/81 , H03F2203/45012 , H03F2203/45028 , H03F2203/45116 , H03F2203/45136 , H03F2203/45138 , H03F2203/45174 , H03F2203/45212 , H03F2203/45512 , H03F2203/45528 , H03F2203/45558 , H03F2203/45594 , H03F2203/45601 , H03F2203/45604 , H03F2203/45631 , H03F2203/45632 , H03F2203/45634 , H03F2203/45641 , H03F2203/45681 , H03F2203/45698 , H03F2203/45726
摘要： A signal processing circuit includes a chopper amplifier that has a differential amplifier circuit that amplifies differential input signals Vsp(t) and Vsm(t), and an adder circuit that generates an addition signal Vfil(t) by addition of the chopper output signal Vsub(t) that the chopper amplifier generates. Differential signals inputted into the differential amplifier circuit are interchanged for every first phase period and second phase period, and the adder circuit generates the addition signal by addition of the chopper output signal in the first phase period and in the second phase period.
摘要翻译：信号处理电路包括具有放大差分输入信号Vsp（t）和Vsm（t）的差分放大器电路的斩波放大器，以及通过将斩波器输出信号Vsub相加产生相加信号Vfil（t）的加法电路（t）斩波放大器产生。输入到差分放大器电路的差分信号每第一相位周期和第二相位周期互换，并且加法器电路通过在第一相位周期和第二相位周期中相加斩波输出信号来生成相加信号。

14. 发明授权

US08847683B2 Differential amplifying circuit 有权
标题翻译：差分放大电路
公开(公告)号：US08847683B2
公开(公告)日：2014-09-30
申请号：US13446698
申请日：2012-04-13
申请人： Noriaki Shirai
发明人： Noriaki Shirai
IPC分类号： H03F3/45
CPC分类号： H03F3/45 , H03F3/45179 , H03F3/45183 , H03F3/72 , H03F2203/45394 , H03F2203/45554 , H03F2203/45608 , H03F2203/45631 , H03F2203/45638 , H03F2203/45701 , H03F2203/45702 , H03F2203/45706 , H03F2203/45726
摘要： A differential amplifying circuit includes: two metal oxide semiconductor transistors to form a differential pair and receive a differential signal; a plurality of capacitance elements coupled in series between drains of the two metal oxide semiconductor transistors; and an inductance circuit coupled between at least one connection node of the plurality of capacitance elements and a bias power terminal.
摘要翻译：差分放大电路包括：两个金属氧化物半导体晶体管，用于形成差分对并接收差分信号; 串联耦合在两个金属氧化物半导体晶体管的漏极之间的多个电容元件; 以及耦合在所述多个电容元件中的至少一个连接节点与偏置电源端子之间的电感电路。

15. 发明授权

US08742847B1 Amplifier and dynamic-bias generation device and dynamic-bias method thereof 有权
标题翻译：放大器和动态偏置产生装置及其动态偏置方法
公开(公告)号：US08742847B1
公开(公告)日：2014-06-03
申请号：US13737397
申请日：2013-01-09
申请人： Himax Technologies Limited
发明人： Jia-Hui Wang
IPC分类号： H03F3/45
CPC分类号： H03F3/4521 , H03F1/0261 , H03F3/3028 , H03F2203/45112 , H03F2203/45726
摘要： An amplifier, a dynamic-bias generation device of the amplifier and a dynamic-bias method of the amplifier are provided. The dynamic-bias generation device comprises an input stage, an output stage, a detection unit, a dynamic-bias generation unit and a switch unit. The input stage having a plurality of bias terminals converts an input signal of the amplifier into at least one current signal according to the voltage of the bias terminals. The output stage receives and converts the current signal into an output signal of the amplifier. The detection unit detects the current signal. The dynamic-bias generation unit generates a plurality of bias voltages according to the current signal. The switch unit dynamically determines the connection relations between the bias voltages of the dynamic-bias generation unit and the bias terminals of the input stage according to the detection result of the detection unit.
摘要翻译：提供放大器，放大器的动态偏置产生装置和放大器的动态偏置方法。动态偏置产生装置包括输入级，输出级，检测单元，动态偏置产生单元和开关单元。具有多个偏置端的输入级根据偏置端子的电压将放大器的输入信号转换为至少一个电流信号。输出级接收并将当前信号转换为放大器的输出信号。检测单元检测当前信号。动态偏置产生单元根据当前信号产生多个偏置电压。开关单元根据检测单元的检测结果动态地确定动态偏置产生单元的偏置电压与输入级的偏置端子之间的连接关系。

16. 发明授权

US08643432B1 Op-Amp sharing by swapping trans-conductance cells 有权
标题翻译：通过交换反电导单元进行Op-Amp共享
公开(公告)号：US08643432B1
公开(公告)日：2014-02-04
申请号：US13560455
申请日：2012-07-27
申请人： Chi Hong Chan , Chi Fat Chan , Gordon Chung
发明人： Chi Hong Chan , Chi Fat Chan , Gordon Chung
IPC分类号： H03F1/02 , H03F3/45
CPC分类号： H03F3/005 , H03F3/45179 , H03F3/45192 , H03F3/45636 , H03F2203/45544 , H03F2203/45551 , H03F2203/45616 , H03F2203/45631 , H03F2203/45644 , H03F2203/45702 , H03F2203/45724 , H03F2203/45726 , H03F2203/45728
摘要： A two-stage op amp has a transconductance cell in a second stage modified to match a transconductance cell in a first stage. A transconductance swap network is inserted between transconductance cells and trans-impedance cells, such as current-steering networks, current mirrors, or drivers connected to the transconductance cells. The transconductance swap network directly connects the first transconductance cell to the first stage trans-impedance cell during a second clock phase, but crosses-over the first transconductance cell to the second-stage trans-impedance cell during a first clock phase. A first switched-capacitor network drives the gates of differential transistors in the first transconductance cell by alternately sampling an input and feedback, and equalizing to reset inputs. A second first switched-capacitor network drives differential transistors in the second transconductance cell, but during opposite clock phases. Two independent inputs are sampled by the switched-capacitor networks and alternately amplified by swapping connections within the shared op amp.
摘要翻译：两级运算放大器具有在第一级修改为匹配跨导单元的第二级中的跨导单元。在跨导单元和跨阻抗单元之间插入跨导互换网络，例如电流转向网络，电流镜或连接到跨导单元的驱动器。跨导互换网络在第二时钟相位期间将第一跨导单元直接连接到第一级跨阻抗单元，但是在第一时钟阶段期间，跨越第一跨导单元跨越第二级跨阻抗单元。第一开关电容器网络通过交替地对输入和反馈进行采样并均衡复位输入来驱动第一跨导单元中的差分晶体管的栅极。第二个第一个开关电容网络驱动第二跨导单元中的差分晶体管，但是在相反的时钟阶段。两个独立的输入由开关电容网络采样，并通过交换共享运算放大器内的连接来交替放大。

17. 发明授权

US08581631B2 Sense amplifier and electronic apparatus using the same 有权
公开(公告)号：US08581631B2
公开(公告)日：2013-11-12
申请号：US13677351
申请日：2012-11-15
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Yutaka Shionoiri , Kiyoshi Kato , Munehiro Azami
IPC分类号： G01R19/00
CPC分类号： H03F3/45179 , G01R19/00 , G11C7/062 , G11C11/4091 , G11C11/413 , G11C2207/063 , H03F3/45183 , H03F3/45188 , H03F2203/45396 , H03F2203/45506 , H03F2203/45546 , H03F2203/45551 , H03F2203/45702 , H03F2203/45726
摘要： A sense amplifier according to the present invention for detecting a potential difference of signals input to a first input terminal and a second input terminal, includes a first means for applying voltages corresponding to threshold voltages of first and second transistors to gate-source voltages of the first and second transistors, and a second means for transferring signals input to the first and second input terminals to gates of the first and second transistors. In this case, a threshold variation of the first and second transistors is corrected.

18. 发明申请

US20130281042A1 RECONFIGURABLE LNA FOR INCREASED JAMMER REJECTION 有权
标题翻译：用于增加JAMMER拒绝的可重构LNA
公开(公告)号：US20130281042A1
公开(公告)日：2013-10-24
申请号：US13450120
申请日：2012-04-18
申请人： Cheng-Han Wang , Liang Zhao , Hong Sun Kim , Jin-Su Ko
发明人： Cheng-Han Wang , Liang Zhao , Hong Sun Kim , Jin-Su Ko
IPC分类号： H04B1/10
CPC分类号： H03F3/45188 , H03F1/565 , H03F3/193 , H03F2200/294 , H03F2200/546 , H03F2203/45386 , H03F2203/45641 , H03F2203/45726 , H04B1/109 , H04B1/3805
摘要： A reconfigurable LNA for increased jammer rejection is disclosed. An exemplary embodiment includes an LNA having a tunable resonant frequency, and a detector configured to output a control signal to tune the resonant frequency of the LNA to increase jammer suppression. An exemplary method includes detecting if a jammer is present, tuning a resonant frequency of an LNA away from the jammer to increase jammer rejection if the jammer is present, and tuning the resonant frequency of the LNA to a selected operating frequency if the jammer is not present.
摘要翻译：公开了一种用于增加干扰抑制的可重构LNA。示例性实施例包括具有可调谐谐振频率的LNA，以及被配置为输出控制信号以调谐LNA的谐振频率以增加干扰抑制的检测器。一种示例性方法包括检测干扰信号是否存在，如果干扰信号存在，则调谐LNA的谐振频率远离干扰信号以增加干扰抑制，并且如果干扰信号不是，则将LNA的谐振频率调谐到所选择的操作频率当下。

19. 发明申请

US20130265108A1 Extremely High Frequency Dual-Mode Class AB Power Amplifier 有权
标题翻译：极高频双模AB类功率放大器
公开(公告)号：US20130265108A1
公开(公告)日：2013-10-10
申请号：US13591061
申请日：2012-08-21
申请人： Joos Dieter , Wim Philibert , Patrick Reynaert , Dixian Zhao
发明人： Joos Dieter , Wim Philibert , Patrick Reynaert , Dixian Zhao
IPC分类号： H03F3/45
CPC分类号： H03F1/0277 , H03F3/195 , H03F3/211 , H03F3/213 , H03F3/72 , H03F2200/06 , H03F2200/09 , H03F2200/222 , H03F2200/312 , H03F2200/396 , H03F2200/411 , H03F2200/414 , H03F2200/417 , H03F2200/421 , H03F2200/451 , H03F2200/534 , H03F2200/537 , H03F2200/541 , H03F2200/72 , H03F2200/75 , H03F2203/21106 , H03F2203/21142 , H03F2203/21175 , H03F2203/45018 , H03F2203/45036 , H03F2203/45172 , H03F2203/45206 , H03F2203/45556 , H03F2203/45566 , H03F2203/45592 , H03F2203/45621 , H03F2203/45638 , H03F2203/45726 , H03F2203/45728 , H03F2203/45731 , H03F2203/7221 , H03F2203/7224 , H03H7/48
摘要： An Extremely High Frequency (EHF) dual-mode PA with a power combiner is designed using 40-nm bulk CMOS technology. One of the unit PAs can be switched off for the low power applications. In the design, circuit level optimization and trade-off are performed to ensure the good performance in both modes. The PA achieves a PSAT of 17.4 dBm with 29.3% PAE in high power mode and a PSAT of 12.6 dBm with 19.6% PAE in low power mode. The reliability measurements are also conducted and a lifetime of 80613 hours is estimated based on a commonly used empirical model. The excellent performance (e.g., highest reported PAE) achieved in this design further confirms the scaling of CMOS technology will continue to benefit the mm-wave transceiver design.
摘要翻译：具有功率组合器的极高频（EHF）双模PA采用40-nm大容量CMOS技术设计。对于低功率应用，其中一个单元PA可以关闭。在设计中，执行电路级优化和权衡，以确保两种模式的良好性能。 PA在高功率模式下实现了17.4dBm的PSAT和29.3％的PAE，在低功率模式下，PAAT为12.6dBm，PAE为19.6％。还进行可靠性测量，并且基于常用的经验模型估计80613小时的寿命。在该设计中实现的优异性能（例如，报告最高的PAE）进一步证实了CMOS技术的扩展将继续有利于mm波收发器设计。

20. 发明授权

US08537153B2 Source driver having multiplexers positioned between differential amplifiers and buffers and associated driving method 有权
标题翻译：源极驱动器具有位于差分放大器和缓冲器之间的多路复用器和相关联的驱动方法
公开(公告)号：US08537153B2
公开(公告)日：2013-09-17
申请号：US12650503
申请日：2009-12-30
申请人： Jia-Hao Wu
发明人： Jia-Hao Wu
IPC分类号： G06F3/038 , G09G5/00
CPC分类号： H03F3/45475 , G09G3/3685 , G09G2310/0291 , H03F3/68 , H03F3/72 , H03F2200/414 , H03F2203/45724 , H03F2203/45726 , H03F2203/7206 , H03F2203/7215 , H03F2203/7221
摘要： A source driver includes a first differential amplifier, a first output stage, a second differential amplifier, a second output stage and a multiplexer. The first differential amplifier is utilized for receiving a first differential input signal pair to generate a first differential output signal pair. The second differential amplifier is utilized for receiving a second differential input signal pair to generate a second differential output signal pair. The multiplexer couples the first differential amplifier to the first output stage and couples the second differential amplifier to the second output stage under a first configuration, and couples the first differential amplifier to the second output stage and couples the second differential amplifier to the first output stage under a second configuration.
摘要翻译：源极驱动器包括第一差分放大器，第一输出级，第二差分放大器，第二输出级和多路复用器。第一差分放大器用于接收第一差分输入信号对以产生第一差分输出信号对。第二差分放大器用于接收第二差分输入信号对以产生第二差分输出信号对。多路复用器将第一差分放大器耦合到第一输出级，并以第一配置将第二差分放大器耦合到第二输出级，并且将第一差分放大器耦合到第二输出级，并将第二差分放大器耦合到第一输出级在第二配置下。

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