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11. 发明授权

US4912055A Method of fabricating a semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US4912055A
公开(公告)日：1990-03-27
申请号：US265420
申请日：1988-10-31
申请人： Sung-Ki Min , Chang-Won Kahng , Uk-Rae Cho , Jong-Mil Youn , Suk-Gi Choi
发明人： Sung-Ki Min , Chang-Won Kahng , Uk-Rae Cho , Jong-Mil Youn , Suk-Gi Choi
IPC分类号： H01L29/73 , C08G18/30 , C08G18/32 , H01L21/331 , H01L21/8249 , H01L27/06 , H01L27/08 , H01L27/10 , H01L29/732
CPC分类号： H01L21/8249
摘要： A method for fabricating a BiCMOS device to achieve a maximum performance through a of minimum processing steps, in which the BiCMOS device is exemplary for its high integration and high performance MOS transistors, self-aligned metal contact emitter type bipolar transistors having high load driving force, high performance matching characteristics and high integration, and self-aligned polycrystalline silicon emitter type bipolar transistors having high integration and high speed characteristics in low current, thereby being used in high integration, high speed digital and precise analog system. The method includes a plurality of fabrication steps including ion-implantation, formation of a thin film oxide layer, deposition of a nitride layer, etching of the oxide layer, formation of windows and others, alternately and/or sequentially in a single chip substrate.
摘要翻译：一种用于制造BiCMOS器件以通过最小处理步骤实现最大性能的方法，其中BiCMOS器件是其高集成度和高性能MOS晶体管的示例性，具有高负载驱动力的自对准金属接触发射极型双极晶体管，高性能匹配特性和高集成度，以及在低电流下具有高集成度和高速特性的自对准多晶硅发射极型双极晶体管，从而被用于高集成度，高速数字和精确模拟系统。该方法包括在单个芯片衬底中交替地和/或顺序地包括离子注入，薄膜氧化物层的形成，氮化物层的沉积，氧化物层的蚀刻，窗口等的形成的多个制造步骤。

12. 发明授权

US4881042A Automatically tunable phase locked loop FM detection system 失效
标题翻译：自动调谐锁相环FM检测系统
公开(公告)号：US4881042A
公开(公告)日：1989-11-14
申请号：US147433
申请日：1988-01-25
申请人： Sung-Ki Min , Chan-Kyu Myung , Ki-Ho Shin
发明人： Sung-Ki Min , Chan-Kyu Myung , Ki-Ho Shin
IPC分类号： H03D3/02 , H03B5/12 , H03D3/24 , H03D7/00 , H03L7/06 , H03L7/10
CPC分类号： H03D3/245 , H03B5/1215 , H03B5/1221 , H03B5/1243
摘要： A FM detection system using a phase locked loop (PPL 20) and including: a wave shaping comparator (7) for accepting a signal V.sub.CO2 from a voltage controlled oscillator (4) which is 90.degree. out of phase with a control signal V.sub.CO1 from the voltage controlled oscillator (4), the comparator reshaping the signal to a square wave; an in-lock detector (8) for accepting the square wave and a frequency modulated input signal (VFM) to provide a sum frequency and a difference frequency; a low-pass filter (9) cutting off the sum frequency component, and filtering out the difference frequency signal when the PLL (20) is unlocked; a comparator (10) for comparing the output of the low-pass filter (9) with a reference voltage (V.sub.REF1), and providing a constant logic level when the PLL (20) is locked, or providing a clock pulse corresponding to the difference frequency when the PLL (20) is unlocked; a ripple counter (11) for counting the clock pulse and providing a binary signal output reflective of the count; a D/A converter (12) for accepting the binary output to provide an analogue current; and the oscillation frequency of the voltage controlled oscillator (4) being controlled in response to the output voltage from an amplifier (3) of PLL (20) and the output current of the D/A converter (12). A large detection output is attained in spite of a small loop gain.
摘要翻译：一种使用锁相环（PPL 20）的FM检测系统，包括：波形整形比较器（7），用于从与来自该控制信号VCO1的控制信号VCO1相差90度的压控振荡器（4）接收信号VCO2 压控振荡器（4），比较器将信号重新整形为方波; 用于接受方波的锁定检测器（8）和调频输入信号（VFM）以提供和频和差频; 切断所述和频分量的低通滤波器（9），并且在所述PLL（20）解锁时滤除所述差频信号; 比较器（10），用于将低通滤波器（9）的输出与参考电压（VREF1）进行比较，并且当PLL（20）被锁定时提供恒定的逻辑电平，或者提供与差分对应的时钟脉冲 PLL（20）解锁时的频率; 波纹计数器（11），用于对时钟脉冲进行计数并提供反映计数的二进制信号输出; D / A转换器（12），用于接受二进制输出以提供模拟电流; 并且受压控振荡器（4）的振荡频率响应于来自PLL（20）的放大器（3）的输出电压和D / A转换器（12）的输出电流而被控制。尽管环路增益较小，但仍能获得较大的检测输出。

13. 发明授权

US5703497A Current source responsive to supply voltage variations 失效
标题翻译：响应电源电压变化的电流源
公开(公告)号：US5703497A
公开(公告)日：1997-12-30
申请号：US686007
申请日：1996-07-25
申请人： Sung-Ki Min
发明人： Sung-Ki Min
IPC分类号： G05F3/22 , H03K19/003 , H03K19/0175 , H03K3/011 , H03K19/086
CPC分类号： G05F3/227 , H03K19/00376 , H03K19/017527
摘要： A current source varies the bias current to a differential amplifier according to fluctuations in the supply voltage. In this manner, the operating point of the differential amplifier is automatically adjusted to compensate for variations in the supply voltage. Adjusting bias current in this manner provides for a reduction in power dissipation. The current supply is coupled to the differential amplifier in such a manner that a current mirror is not required to be connected between the differential amplifier and the inverter. Eliminating the need for such a current mirror is advantageous in reducing the number of gate delays and thereby increasing the speed of a level translator to which the current source is coupled.
摘要翻译：电流源根据电源电压的波动将偏置电流改变为差分放大器。以这种方式，差分放大器的工作点被自动调节以补偿电源电压的变化。以这种方式调节偏置电流可以降低功耗。电流源以差分放大器和逆变器之间不需要连接电流镜的方式耦合到差分放大器。消除对这种电流镜的需要有利于减少门延迟的数量，从而提高电流源耦合到的电平转换器的速度。

14. 发明授权

US5682108A High speed level translator 失效
标题翻译：高速翻译器
公开(公告)号：US5682108A
公开(公告)日：1997-10-28
申请号：US442725
申请日：1995-05-17
申请人： Sung-Ki Min
发明人： Sung-Ki Min
IPC分类号： G05F3/22 , H03K19/003 , H03K19/0175 , H03K19/086
CPC分类号： G05F3/227 , H03K19/00376 , H03K19/017527
摘要： A high speed level translator is disclosed in which an ECL differential input signal is applied to a differential input amplifier, amplified, and converted to a single ended intermediate signal. An inverter circuit receives the intermediate signal and outputs a signal indicative of the polarity of the ECL differential input signal. The differential amplifier is biased with a current source which varies the bias current according to fluctuations in the supply voltage such that the operating point of the differential amplifier is automatically adjusted to compensate for variations in the supply voltage. Adjusting the bias current in such a manner allows for a reduction in power dissipation over conventional level translators. Further, since the differential amplifier is configured to provide a single ended intermediate signal, a current mirror is not required to be connected between the differential amplifier and the inverter. Eliminating the need for such a current mirror is advantageous in reducing the number of gate delays and thereby increasing the speed of the level translator.
摘要翻译：公开了一种高速电平转换器，其中ECL差分输入信号被施加到差分输入放大器，被放大并转换成单端中间信号。逆变器电路接收中间信号并输出表示ECL差分输入信号的极性的信号。差分放大器用电流源进行偏置，电流源根据电源电压的波动来改变偏置电流，使得差分放大器的工作点被自动调节以补偿电源电压的变化。以这种方式调节偏置电流允许与常规电平转换器相比降低功率耗散。此外，由于差分放大器被配置为提供单端中间信号，所以不需要在差分放大器和逆变器之间连接电流镜。消除对这种电流镜的需要有利于减少门延迟的数量，从而提高电平转换器的速度。

15. 发明授权

US4950616A Method for fabricating a BiCMOS device 失效
标题翻译： BiCMOS器件制造方法
公开(公告)号：US4950616A
公开(公告)日：1990-08-21
申请号：US353105
申请日：1989-05-17
申请人： Chang-Won Kahng , Sung-Ki Min , Jong-Mil Youn
发明人： Chang-Won Kahng , Sung-Ki Min , Jong-Mil Youn
IPC分类号： H01L29/73 , H01L21/331 , H01L21/763 , H01L21/8249 , H01L27/06 , H01L29/68 , H01L29/70
CPC分类号： H01L21/763 , Y10S148/009
摘要： This invention provides a method for fabricating a semiconductor device comprising the steps of forming buried layers on the silicon substrate; etching an epitaxial layer after said layer is grown up, the step further including the processes of etching selectively the silicon epitaxial layer of well region on which a high speed bipolar transistor is formed to be thin and keeping the silicon epitaxial layer of well region on which nMOS transistor is formed remained the same thickness as grown up; and forming a pMOS transistor, a nMOS transistor and a bipolar transistor. High efficiency and high integration is easily attained in fabricating the high speed bipolar transistor and high performance CMOS transistor on same chip and by reducing the difficulty in processing according to the method of present invention.
摘要翻译：本发明提供一种制造半导体器件的方法，包括以下步骤：在硅衬底上形成掩埋层; 在所述层生长之后蚀刻外延层，该步骤还包括选择性地蚀刻其上形成有高速双极晶体管的阱区的硅外延层的工艺，并保持其上的阱区的硅外延层形成的nMOS晶体管的长度保持相同的厚度; 以及形成pMOS晶体管，nMOS晶体管和双极晶体管。在同一芯片上制造高速双极晶体管和高性能CMOS晶体管并且通过降低根据本发明的方法的处理难度，容易实现高效率和高集成度。

16. 发明授权

US4853559A High voltage and power BiCMOS driving circuit 失效
标题翻译：高压和电源BiCMOS驱动电路
公开(公告)号：US4853559A
公开(公告)日：1989-08-01
申请号：US144933
申请日：1988-01-15
申请人： Sung-Ki Min , Jae S. Lee
发明人： Sung-Ki Min , Jae S. Lee
IPC分类号： H03F1/52 , H03F1/42 , H03F3/20 , H03F3/21 , H03F3/213 , H03K17/0812 , H03K17/10 , H03K17/567
CPC分类号： H03K17/107 , H03K17/08126 , H03K17/567
摘要： This invention is related to an integrated driving circuit which can control high voltage and power, and more particularly to a high voltage and power driving circuit by employing BiCMOS technology. The principal object of this invention is to provide an integrated high voltage and high power driving circuit which is reliable by using BiCMOS technology without external discrete components. According to this invention, in the high voltage and power driving circuit using bipolar transistors and high voltage CMOS transistors, a high voltage and power driving circuit comprising: the current driving part composed of high voltage MOS transistor inverter and high current driving bipolar transistor 1 with the supply voltage of the certain multiple of breakdown voltage between collector and emitter of the bipolar transistor; the load driving part which drives the load with high current and high voltage of said certain multiple of the breakdown voltage which is composed of the high voltage MOS transistor inverter and the bipolar transistor 2; the reference voltage generation part which divides said certain multiple supply voltage into the breakdown voltages to prevent the bipolar transistors 1 and 2 from breaking down between the collector and the emitter; the reference voltage transfer part which transfers said reference voltage to the connection point of said bipolar transistor 1 and 2 by the switching action of the high voltage MOS transistor depending on said CMOS level signal input; and the high voltage, high power driving circuit using BiCMOS whose feature is to use delay part to prevent the operation of said load driving part till the voltage at said connection point of the bipolar transistor 1 and 2 reaches the divided voltage in the reference voltage generation part.
摘要翻译：本发明涉及一种可以通过采用BiCMOS技术来控制高压和高功率的集成驱动电路，更具体地说涉及高压和功率驱动电路。本发明的主要目的是提供一种集成的高压和大功率驱动电路，其通过使用BiCMOS技术而不需要外部分立元件就可靠。根据本发明，在采用双极型晶体管和高电压CMOS晶体管的高电压和电力驱动电路中，高电压和电源驱动电路包括：由高电压MOS晶体管反相器和高电流驱动双极晶体管1组成的电流驱动部分，双极晶体管的集电极和发射极之间的一定倍数击穿电压的电源电压; 由所述高电压MOS晶体管反相器和所述双极型晶体管2构成的所述击穿电压的所述一定倍数的高电流和高电压驱动负载的负载驱动部; 所述参考电压产生部分将所述一定的多个电源电压分为击穿电压以防止双极晶体管1和2在集电极和发射极之间分解; 参考电压转移部分，根据所述CMOS电平信号输入，通过高电压MOS晶体管的开关动作将所述参考电压传送到所述双极晶体管1和2的连接点; 以及使用BiCMOS的高电压，高功率驱动电路，其特征在于使用延迟部分来防止所述负载驱动部分的操作，直到双极晶体管1和2的所述连接点的电压达到参考电压产生中的分压部分。

17. 发明申请

US20080272828A1 Method and system for adaptive power management 审中-公开
标题翻译：自适应电源管理方法与系统
公开(公告)号：US20080272828A1
公开(公告)日：2008-11-06
申请号：US12113323
申请日：2008-05-01
申请人： Sung-Ki Min
发明人： Sung-Ki Min
IPC分类号： H01L37/00
CPC分类号： G05D23/2034 , G01K7/01 , G06F1/206 , G06F1/3203 , G06F1/3296 , Y02D10/172
摘要： A system comprises an integrated circuit comprising one or more transistors that receive a supply voltage. The system also includes a reference transistor operable to receive a constant current and produce a reference voltage that varies according to temperature or process variations, wherein the reference transistor behaves similarly to at least one of the one or more transistors with respect to temperature or process variations. The system also includes a comparator operable to compare the reference voltage with the received supply voltage and produce an output based at least in part on the difference between the reference voltage and the received supply voltage. The system further includes a controller operable to adjust the received supply voltage based at least in part on the output of the comparator.
摘要翻译：一种系统包括集成电路，其包括接收电源电压的一个或多个晶体管。该系统还包括可操作以接收恒定电流并产生根据温度或过程变化而变化的参考电压的参考晶体管，其中参考晶体管的行为类似于一个或多个晶体管中的至少一个相对于温度或过程变化。该系统还包括比较器，用于将参考电压与所接收的电源电压进行比较，并至少部分地基于参考电压和接收的电源电压之间的差产生输出。该系统还包括可操作以至少部分地基于比较器的输出来调整所接收的电源电压的控制器。

18. 发明授权

US06459531B1 Screen mounting device for projection TV 失效
标题翻译：投影电视屏幕安装装置
公开(公告)号：US06459531B1
公开(公告)日：2002-10-01
申请号：US09672971
申请日：2000-09-29
申请人： Sung-Ki Min
发明人： Sung-Ki Min
IPC分类号： G03B2156
CPC分类号： H04N9/3141 , G03B21/56 , Y10S348/904
摘要： A screen mounting device for a projection TV includes a mask for protecting an edge of a screen on which an image is displayed which is arranged to enclose an edge portion of the screen and having a hooking socket formed at a back side thereof, and a holder member for fixing the screen s and the mask to the cabinet. The holder member includes a coupling portion fitting in a front edge portion of the cabinet and fixed thereto, a hooking portion inserted in the hooking socket of the mask and coupled thereto, and a screen fixing portion in which the edge portion of the screen is inserted. Also, the coupling portion, the hooking portion and the screen fixing portion are integrally formed.
摘要翻译：一种用于投影电视的屏幕安装装置，包括：用于保护屏幕边缘的掩模，其上显示图像的边缘，该屏幕被布置成围绕屏幕的边缘部分并且具有形成在其背面的钩形插座，用于将屏幕和面罩固定到机柜的构件。所述保持器构件包括：接合部，其配合在所述机壳的前端部并固定于其上;钩挂部，插入所述面罩的所述钩接插座并与其连接;以及屏幕固定部，所述屏幕的边缘部插入。另外，连结部，钩部和屏蔽固定部一体形成。

19. 发明授权

US06275117B1 Circuit and method for controlling an output of a ring oscillator 有权
标题翻译：用于控制环形振荡器输出的电路和方法
公开(公告)号：US06275117B1
公开(公告)日：2001-08-14
申请号：US09216460
申请日：1998-12-18
申请人： Khaldoon Abugharbieh , Sung-Ki Min
发明人： Khaldoon Abugharbieh , Sung-Ki Min
IPC分类号： H03B500
CPC分类号： H03K3/0315 , H03L7/0891 , H03L7/0995
摘要： A circuit and method configured to generate a variable impedance. The circuit may comprise a voltage controlled resistor configured to generate the variable impedance in response to (i) a first transistor configured to receive a first control signal and (ii) a bias transistor configured to receive a bias signal. In one example, the variable impedance may be generated in further response to a clamp transistor.
摘要翻译：一种配置成产生可变阻抗的电路和方法。电路可以包括被配置为响应于（i）被配置为接收第一控制信号的第一晶体管和（ii）被配置为接收偏置信号的偏置晶体管而产生可变阻抗的电压控制电阻器。在一个示例中，可以进一步响应于钳位晶体管产生可变阻抗。

20. 发明授权

US06275116B1 Method, circuit and/or architecture to improve the frequency range of a voltage controlled oscillator 有权
标题翻译：提高压控振荡器频率范围的方法，电路和/或结构
公开(公告)号：US06275116B1
公开(公告)日：2001-08-14
申请号：US09328083
申请日：1999-06-08
申请人： Khaldoon Abugharbieh , Sung-Ki Min
发明人： Khaldoon Abugharbieh , Sung-Ki Min
IPC分类号： H03L7099
CPC分类号： H03L7/099 , H03L2207/06
摘要： A circuit comprising an oscillator configured to generate a periodic signal in response to (i) control signal and (ii) a current. The current may be varied independently of the control signal. In one example, the oscillator may generate the periodic signal in further response to a second current that may vary in response to the control signal. In another example, the oscillator may be used in a phase-locked loop circuit.
摘要翻译：一种电路，包括响应于（i）控制信号和（ii）电流而产生周期性信号的振荡器。电流可以独立于控制信号而变化。在一个示例中，振荡器可以进一步响应于可响应于控制信号而变化的第二电流产生周期信号。在另一示例中，振荡器可以用在锁相环电路中。

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