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1. 发明授权

US4912055A Method of fabricating a semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US4912055A
公开(公告)日：1990-03-27
申请号：US265420
申请日：1988-10-31
申请人： Sung-Ki Min , Chang-Won Kahng , Uk-Rae Cho , Jong-Mil Youn , Suk-Gi Choi
发明人： Sung-Ki Min , Chang-Won Kahng , Uk-Rae Cho , Jong-Mil Youn , Suk-Gi Choi
IPC分类号： H01L29/73 , C08G18/30 , C08G18/32 , H01L21/331 , H01L21/8249 , H01L27/06 , H01L27/08 , H01L27/10 , H01L29/732
CPC分类号： H01L21/8249
摘要： A method for fabricating a BiCMOS device to achieve a maximum performance through a of minimum processing steps, in which the BiCMOS device is exemplary for its high integration and high performance MOS transistors, self-aligned metal contact emitter type bipolar transistors having high load driving force, high performance matching characteristics and high integration, and self-aligned polycrystalline silicon emitter type bipolar transistors having high integration and high speed characteristics in low current, thereby being used in high integration, high speed digital and precise analog system. The method includes a plurality of fabrication steps including ion-implantation, formation of a thin film oxide layer, deposition of a nitride layer, etching of the oxide layer, formation of windows and others, alternately and/or sequentially in a single chip substrate.
摘要翻译：一种用于制造BiCMOS器件以通过最小处理步骤实现最大性能的方法，其中BiCMOS器件是其高集成度和高性能MOS晶体管的示例性，具有高负载驱动力的自对准金属接触发射极型双极晶体管，高性能匹配特性和高集成度，以及在低电流下具有高集成度和高速特性的自对准多晶硅发射极型双极晶体管，从而被用于高集成度，高速数字和精确模拟系统。该方法包括在单个芯片衬底中交替地和/或顺序地包括离子注入，薄膜氧化物层的形成，氮化物层的沉积，氧化物层的蚀刻，窗口等的形成的多个制造步骤。

2. 发明授权

US5173760A BiCMOS semiconductor device 失效
标题翻译： BiCMOS半导体器件
公开(公告)号：US5173760A
公开(公告)日：1992-12-22
申请号：US498590
申请日：1990-03-26
申请人： Sung-Ki Min , Chang-Won Kahng , Uk-Rae Cho , Jong-Mil Youn , Suk-Gi Choi
发明人： Sung-Ki Min , Chang-Won Kahng , Uk-Rae Cho , Jong-Mil Youn , Suk-Gi Choi
IPC分类号： H01L21/8249
CPC分类号： H01L21/8249
摘要： A method for fabricating a BiCMOS device to achieve a maximum performance through a minimum processing steps, in which the BiCMOS device comprises high integration and high performance MOS transistors, self-aligned metal contact emitter type bipolar transistors having high load driving force, high performance matching characteristics and high integration, and self-aligned polycrystalline silicon emitter type bipolar transistors having high integration and high speed characteristics in low current, thereby being used in high integration, high speed digital and precise analog system. Said method comprises a plurality of fabrication steps including ion-implantation, formation of thin film oxide layer, deposition of nitride layer, etching of oxide layer, formation of windows and others, alternately or/and sequentially in a single chip substrate.
摘要翻译：一种用于制造BiCMOS器件以通过最小处理步骤实现最大性能的方法，其中BiCMOS器件包括高集成度和高性能MOS晶体管，具有高负载驱动力的自对准金属接触发射极型双极晶体管，高性能匹配特性和高集成度，以及在低电流下具有高集成度和高速特性的自对准多晶硅发射极型双极晶体管，从而被用于高集成度，高速数字和精确模拟系统。所述方法包括在单个芯片衬底中交替地或/或顺序地包括离子注入，薄膜氧化物层的形成，氮化物层的沉积，氧化物层的蚀刻，窗口的形成等多个制造步骤。

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