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11. 发明申请

US20060246670A1 Schottky device and method of forming 有权
标题翻译：肖特基器件和成型方法
公开(公告)号：US20060246670A1
公开(公告)日：2006-11-02
申请号：US11117996
申请日：2005-04-29
申请人： Vishnu Khemka , Vijay Parthasarathy , Ronghua Zhu , Amitava Bose
发明人： Vishnu Khemka , Vijay Parthasarathy , Ronghua Zhu , Amitava Bose
IPC分类号： H01L21/336
CPC分类号： H01L29/872 , H01L29/063 , H01L29/0692 , H01L29/66136 , H01L29/66143 , H01L29/8611
摘要： A Schottky device having a plurality of unit cells, each having a Schottky contact portion, surrounded by a termination structure that causes depletion regions to form in a vertical and horizontal direction, relative to a surface of the device, during a reverse bias voltage condition.
摘要翻译：肖特基器件具有多个单元电池，每个单元电池具有肖特基接触部分，由反向偏置电压条件期间相对于器件的表面在垂直和水平方向上形成耗尽区域的终端结构包围。

12. 发明申请

US20050245020A1 Semiconductor device and method of forming the same 有权
标题翻译：半导体器件及其形成方法
公开(公告)号：US20050245020A1
公开(公告)日：2005-11-03
申请号：US10836170
申请日：2004-04-30
申请人： Ronghua Zhu , Amitava Bose , Vishnu Khemka , Vijay Parthasarathy
发明人： Ronghua Zhu , Amitava Bose , Vishnu Khemka , Vijay Parthasarathy
IPC分类号： G06F13/00 , H01L21/20 , H01L29/739 , H01L29/861
CPC分类号： H01L29/7391 , H01L29/861
摘要： In one embodiment, semiconductor device 10 comprises a diode which uses isolation regions (34, 16, and 13) and a plurality of dopant concentrations (30, 20, 24, and 26) which may be used to limit the parasitic current that is injected into the semiconductor substrate (12). Various biases on the isolation regions (34, 16, and 13) may be used to affect the behavior of semiconductor device (10). In addition, a conductive layer (28) may be formed overlying the junction between anode (42) and cathode (40). This conductive layer (28) may decrease the electric field in selected regions in order to increase the maximum voltage that may be applied to cathode (40).
摘要翻译：在一个实施例中，半导体器件10包括使用隔离区域（34,16和13）和多个掺杂剂浓度（30,20,24和26）的二极管，其可用于限制注入的寄生电流进入半导体基板（12）。可以使用隔离区域（34,16和13）上的各种偏压来影响半导体器件（10）的行为。此外，可以形成覆盖在阳极（42）和阴极（40）之间的连接处的导电层（28）。为了增加施加到阴极（40）的最大电压，该导电层（28）可以减小选定区域中的电场。

13. 发明申请

US20050285188A1 LDMOS transistor 有权
标题翻译： LDMOS晶体管
公开(公告)号：US20050285188A1
公开(公告)日：2005-12-29
申请号：US10875105
申请日：2004-06-23
申请人： Vishnu Khemka , Vijay Parthasarathy , Ronghua Zhu , Amitava Bose
发明人： Vishnu Khemka , Vijay Parthasarathy , Ronghua Zhu , Amitava Bose
IPC分类号： H01L29/06 , H01L29/47 , H01L29/76 , H01L29/78
CPC分类号： H01L29/782 , H01L27/0727 , H01L29/0619 , H01L29/0653 , H01L29/47 , H01L29/66659 , H01L29/66681 , H01L29/7835
摘要： An LDMOS transistor has a Schottky diode inserted at the center of a doped region of the LDMOS transistor. A Typical LDMOS transistor has a drift region in the center. In this case a Schottky diode is inserted at the center of this drift region which has the effect of providing a Schottky diode connected from source to drain in the forward direction so that the drain voltage is clamped to a voltage that is lower than the PN junction threshold, thereby avoiding forward biasing the PN junction. An alternative is to insert the Schottky diode at the well in which the source is formed, which is on the periphery of the LDMOS transistor. In such case the Schottky diode is formed differently but still is connected from source to drain in the forward direction to achieve the desired voltage clamping at the drain.
摘要翻译： LDMOS晶体管具有插入在LDMOS晶体管的掺杂区域的中心处的肖特基二极管。典型的LDMOS晶体管在中心具有漂移区域。在这种情况下，肖特基二极管插在该漂移区的中心，其具有提供从正向连接到源极到漏极的肖特基二极管的作用，使得漏极电压被钳位到低于PN结的电压阈值，从而避免正向偏置PN结。一种替代方案是将肖特基二极管插入其中形成源的阱，其位于LDMOS晶体管的外围。在这种情况下，肖特基二极管的形成方式不同，但仍然在正向方向上从源极到漏极连接，以在漏极处实现所需的电压钳位。

14. 发明申请

US20050275055A1 Schottky device 失效
标题翻译：肖特基装置
公开(公告)号：US20050275055A1
公开(公告)日：2005-12-15
申请号：US10856602
申请日：2004-05-28
申请人： Vijay Parthasarathy , Vishnu Khemka , Ronghua Zhu , Amitava Bose
发明人： Vijay Parthasarathy , Vishnu Khemka , Ronghua Zhu , Amitava Bose
IPC分类号： H01L27/06 , H01L27/07 , H03K19/00
CPC分类号： H01L27/0727 , H01L27/0629
摘要： A regular Schottky diode or a device that has a Schottky diode characteristic and an MOS transistor are coupled in series to provide a significant improvement in leakage current and breakdown voltage with only a small degradation in forward current. In the reverse bias case, there is a small reverse bias current but the voltage across the Schottky diode remains small due the MOS transistor. Nearly all of the reverse bias voltage is across the MOS transistor until the MOS transistor breaks down. This transistor breakdown, however, is not initially destructive because the Schottky diode limits the current. As the reverse bias voltage continues to increase the Schottky diodes begins to absorb more of the voltage. This increases the leakage current but the breakdown voltage is a somewhat additive between the transistor and the Schottky diode.
摘要翻译：正交肖特基二极管或具有肖特基二极管特性和MOS晶体管的器件串联耦合以提供泄漏电流和击穿电压的显着改进，只有正向电流的降低很小。在反向偏置情况下，存在小的反向偏置电流，但由于MOS晶体管，肖特基二极管两端的电压保持较小。几乎所有的反向偏置电压都跨越MOS晶体管，直到MOS晶体管故障。然而，该晶体管击穿不是最初的破坏性，因为肖特基二极管限制了电流。随着反向偏压持续增加，肖特基二极管开始吸收更多的电压。这增加了漏电流，但是在晶体管和肖特基二极管之间的击穿电压稍微相加。

15. 发明授权

US06815780B1 Semiconductor component with substrate injection protection structure 有权
标题翻译：半导体元件具有基板注入保护结构
公开(公告)号：US06815780B1
公开(公告)日：2004-11-09
申请号：US10417972
申请日：2003-04-15
申请人： Vishnu Khemka , Vijay Parthasarathy , Ronghua Zhu , Amitava Bose , Todd C. Roggenbauer
发明人： Vishnu Khemka , Vijay Parthasarathy , Ronghua Zhu , Amitava Bose , Todd C. Roggenbauer
IPC分类号： H01L2976
CPC分类号： H01L21/76224 , H01L21/763
摘要： A semiconductor component includes a semiconductor substrate (210) having a first conductivity type, a semiconductor epitaxial layer (220) having the first conductivity type located over the semiconductor substrate, a first semiconductor device (110) and a second semiconductor device (130) located in the semiconductor epitaxial layer and including, respectively, a first semiconductor region (120) and a second semiconductor region (140), both having the second conductivity type, an ohmic contact region (150) in the semiconductor epitaxial layer having the first conductivity type and located between the first and second semiconductor devices, and at least one electrically insulating trench (160, 360) located in the semiconductor epitaxial layer and circumscribing at least the first semiconductor device. The semiconductor epitaxial layer has a doping concentration lower than a doping concentration of the semiconductor substrate.

16. 发明授权

US06734524B1 Electronic component and method of manufacturing same 有权
标题翻译：电子元件及其制造方法
公开(公告)号：US06734524B1
公开(公告)日：2004-05-11
申请号：US10335030
申请日：2002-12-31
申请人： Vijay Parthasarathy , Vishnu Khemka , Ronghua Zhu , Amitava Bose , Todd Roggenbauer , Paul Hui
发明人： Vijay Parthasarathy , Vishnu Khemka , Ronghua Zhu , Amitava Bose , Todd Roggenbauer , Paul Hui
IPC分类号： H01L2900
CPC分类号： H01L27/088 , H01L21/76232
摘要： An electronic component includes a semiconductor substrate (110), an epitaxial semiconductor layer (120, 221, 222) over the semiconductor substrate, and a semiconductor region (130, 230) in the epitaxial semiconductor layer. The epitaxial semiconductor layer has an upper surface (123). A first portion (121) of the epitaxial semiconductor layer is located below the semiconductor region, and a second portion (122) of the epitaxial semiconductor layer is located above the semiconductor region. The semiconductor substrate and the first portion of the epitaxial semiconductor layer have a first conductivity type, and the semiconductor region has a second conductivity type. At least one electrically insulating trench (140, 240) extends from the upper surface of the epitaxial semiconductor layer into at least a portion of the semiconductor region. The semiconductor substrate has a doping concentration higher than a doping concentration of the first portion of the epitaxial semiconductor layer.
摘要翻译：电子部件包括半导体衬底（110），半导体衬底上的外延半导体层（120,221,222）以及外延半导体层中的半导体区域（130,230）。外延半导体层具有上表面（123）。外延半导体层的第一部分（121）位于半导体区域的下方，并且外延半导体层的第二部分（122）位于半导体区域的上方。半导体衬底和外延半导体层的第一部分具有第一导电类型，并且半导体区域具有第二导电类型。至少一个电绝缘沟槽（140,240）从外延半导体层的上表面延伸到半导体区域的至少一部分。半导体衬底的掺杂浓度高于外延半导体层的第一部分的掺杂浓度。

17. 发明申请

US20070221967A1 Semiconductor device and method for forming the same 有权
标题翻译：半导体装置及其形成方法
公开(公告)号：US20070221967A1
公开(公告)日：2007-09-27
申请号：US11390796
申请日：2006-03-27
申请人： Vishnu Khemka , Amitava Bose , Todd Roggenbauer , Ronghua Zhu
发明人： Vishnu Khemka , Amitava Bose , Todd Roggenbauer , Ronghua Zhu
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7835 , H01L29/0634 , H01L29/0653 , H01L29/0847 , H01L29/0878 , H01L29/0882 , H01L29/0886 , H01L29/1045 , H01L29/1083 , H01L29/7816
摘要： A semiconductor device may include a semiconductor substrate having a first dopant type. A first semiconductor region within the semiconductor substrate may have a plurality of first and second portions (44, 54). The first portions (44) may have a first thickness, and the second portions (54) may have a second thickness. The first semiconductor region may have a second dopant type. A plurality of second semiconductor regions (42) within the semiconductor substrate may each be positioned at least one of directly below and directly above a respective one of the first portions (44) of the first semiconductor region and laterally between a respective pair of the second portions (54) of the first semiconductor region. A third semiconductor region (56) within the semiconductor substrate may have the first dopant type. A gate electrode (64) may be over at least a portion of the first semiconductor region and at least a portion of the third semiconductor region (56).
摘要翻译：半导体器件可以包括具有第一掺杂剂类型的半导体衬底。半导体衬底内的第一半导体区域可以具有多个第一和第二部分（44,45）。第一部分（44）可以具有第一厚度，并且第二部分（54）可以具有第二厚度。第一半导体区域可以具有第二掺杂剂类型。半导体衬底内的多个第二半导体区域（42）可以各自定位在第一半导体区域的第一部分（44）的相应一个的正下方并直接位于第一半导体区域的第一部分（44）的下方中的至少一个，并且横向地位于相应的一对第二半导体区域第一半导体区域的部分（54）。半导体衬底内的第三半导体区域（56）可以具有第一掺杂剂类型。栅电极（64）可以在第一半导体区域的至少一部分和第三半导体区域（56）的至少一部分之上。

18. 发明申请

US20070200136A1 Isolated zener diodes 审中-公开
标题翻译：隔离齐纳二极管
公开(公告)号：US20070200136A1
公开(公告)日：2007-08-30
申请号：US11364769
申请日：2006-02-28
申请人： Ronghua Zhu , Vishnu Khemka , Amitava Bose , Todd Roggenbauer
发明人： Ronghua Zhu , Vishnu Khemka , Amitava Bose , Todd Roggenbauer
IPC分类号： H01L29/00
CPC分类号： H01L29/866 , H01L29/0692
摘要： The present disclosure relates to isolated Zener diodes (100) that are substantially free of substrate current injection when forward biased. In particular, the Zener diodes (100) include an “isolation tub” structure that includes surrounding walls (150, 195) and a base (130) formed of semiconductor regions. In addition, the diodes (100) include silicide block (260) extending between anode (210) and cathode (220) regions. The reduction or elimination of substrate current injection overcomes a significant shortcoming of conventional Zener diodes that generally all suffer from substrate current injection when they are forward biased. Due to this substrate current injection, the current from each of a conventional diode's two terminals is not the same.
摘要翻译：本公开涉及在正向偏置时基本上不含衬底电流注入的隔离齐纳二极管（100）。特别地，齐纳二极管（100）包括包括由半导体区形成的周围壁（150,195）和基座（130）的“隔离桶”结构。此外，二极管（100）包括在阳极（210）和阴极（220）区域之间延伸的硅化物块（260）。衬底电流注入的减少或消除克服了常规齐纳二极管的显着缺点，当它们正向偏置时，其通常都遭受衬底电流注入。由于这种衬底电流注入，来自常规二极管的两个端子中的每一个的电流是不相同的。

19. 发明申请

US20060267089A1 Semiconductor device and method of manufacture 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060267089A1
公开(公告)日：2006-11-30
申请号：US11142111
申请日：2005-05-31
申请人： Vishnu Khemka , Amitava Bose , Ronghua Zhu
发明人： Vishnu Khemka , Amitava Bose , Ronghua Zhu
IPC分类号： H01L29/76
CPC分类号： H01L29/7393 , H01L29/66325
摘要： A semiconductor component and method of manufacture, including an insulated gate bipolar transistor (IGBT) (100, 200) that includes a semiconductor substrate (110) having a first conductivity type and buried semiconductor region (115) having a second conductivity type located above the semiconductor substrate. The IGBT further includes a first semiconductor region (120) having the first conductivity type located above the buried semiconductor region, a second semiconductor region (130) having the second conductivity type located above at least a portion of the first semiconductor region, an emitter (150) having the second conductivity type disposed in the second semiconductor region, and a collector (170) having the second conductivity type disposed in the first semiconductor region. A sinker region (140) is provided to electrically tie the buried semiconductor region (115) to the second semiconductor region (130). In a particular embodiment, the second semiconductor region and the buried semiconductor region deplete the first semiconductor region in response to a reverse bias potential applied across the semiconductor component.
摘要翻译：一种半导体元件和制造方法，包括绝缘栅双极晶体管（IGBT）（100,200），其包括具有第一导电类型的半导体衬底（110）和具有第二导电类型的掩埋半导体区域（115）半导体衬底。 IGBT还包括具有位于掩埋半导体区域上方的第一导电类型的第一半导体区域（120），具有位于第一半导体区域的至少一部分上方的第二导电类型的第二半导体区域（130），发射极 150），并且具有设置在第一半导体区域中的具有第二导电类型的集电极（170）。提供沉降片区域（140）以将掩埋的半导体区域（115）电连接到第二半导体区域（130）。在特定实施例中，响应于施加在半导体部件上的反向偏置电位，第二半导体区域和掩埋半导体区域耗尽第一半导体区域。

20. 发明授权

US06750524B2 Trench MOS RESURF super-junction devices 有权
标题翻译：沟槽MOS RESURF超连接器件
公开(公告)号：US06750524B2
公开(公告)日：2004-06-15
申请号：US10145524
申请日：2002-05-14
申请人： Vijay Parthasarthy , Vishnu Khemka , Ronghua Zhu , Amitava Bose
发明人： Vijay Parthasarthy , Vishnu Khemka , Ronghua Zhu , Amitava Bose
IPC分类号： H01L2358
CPC分类号： H01L29/402 , H01L29/0634 , H01L29/0653 , H01L29/407 , H01L29/7802 , H01L29/7816 , H01L29/7835 , H01L29/861 , H01L2924/0002 , H01L2924/00
摘要： A RESURF super-junction device (51) is provided which comprises a plurality of electrodes (53) disposed in a layer of a first material (61) having a first conductivity type. Each of the plurality of electrodes contains a second material (57) of a second conductivity type which is encased in a dielectric material (55).
摘要翻译：提供了RESURF超接合器件（51），其包括设置在具有第一导电类型的第一材料（61）的层中的多个电极（53）。多个电极中的每一个包含第二导电类型的第二材料（57），其被封装在电介质材料（55）中。

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