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11. 发明申请

US20080283929A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080283929A1
公开(公告)日：2008-11-20
申请号：US12118730
申请日：2008-05-11
申请人： Toshihide Nabatame
发明人： Toshihide Nabatame
IPC分类号： H01L27/092 , H01L21/28
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/82385 , H01L29/495 , H01L29/4958 , H01L29/513 , H01L29/517 , H01L29/665 , H01L29/7833
摘要： In a p channel MOS transistor and an n channel MOS transistor each having a gate electrode made of metal on a gate insulating film made of oxide whose relative dielectric constant is higher than that of silicon oxide, threshold voltage thereof is reduced. A gate insulating film of a p channel MOS transistor and an n channel MOS transistor is made of hafnium oxide, a gate electrode of the p channel MOS transistor is made of ruthenium, and a gate electrode of the n channel MOS transistor is made of alloy containing ruthenium as a base material and hafnium.
摘要翻译：在p沟道MOS晶体管和n沟道MOS晶体管中，其栅极绝缘膜由相对介电常数高于氧化硅的氧化物构成的栅极电极构成，其阈值电压降低。 p沟道MOS晶体管和n沟道MOS晶体管的栅极绝缘膜由氧化铪制成，p沟道MOS晶体管的栅极由钌制成，n沟道MOS晶体管的栅电极由含有钌作为基材和铪。

12. 发明申请

US20080026148A1 Film Forming System And Method For Forming Film 审中-公开
标题翻译：成膜系统及成膜方法
公开(公告)号：US20080026148A1
公开(公告)日：2008-01-31
申请号：US10585267
申请日：2004-12-22
申请人： Koji Tominaga , Tetsuji Yasuda , Toshihide Nabatame , Kunihiko Iwamoto
发明人： Koji Tominaga , Tetsuji Yasuda , Toshihide Nabatame , Kunihiko Iwamoto
IPC分类号： C23C16/00
CPC分类号： C23C16/45527 , C23C16/45531 , C23C16/45544
摘要： A throughput during a process of forming a thin film is improved and a thin film of high quality is produced at low cost.For this purpose, a film forming system comprises a chamber 8, a precursory gas supplying line 2 to supply the chamber 8 with precursory gas, a reactive gas supplying line 1 to supply the chamber 8 with reactive gas, and a purge gas supplying line 3 to supply purge gas that purges the precursory gas and the reactive gas, and forms a thin film on a substrate 82 in the chamber 8 by supplying the precursory gas or the reactive gas and purging alternately, and further comprises a middle line 22 having a certain volume that is arranged on a part or all of the precursor supplying line 2 and into which the precursory gas can be filled at a time when the precursory gas is not supplied, and/or a middle line 12 having a certain volume that is arranged on a part or all of the reactive gas supplying line 1 and into which the reactive gas can be filled at a time when the reactive gas is not supplied.
摘要翻译：在形成薄膜的过程中的生产量得到改善，并且以低成本生产高质量的薄膜。为此，成膜系统包括：腔室8，为腔室8提供前兆气体的前体气体供应管线2;向反应气体供应腔室8的反应气体供应管线1;以及吹扫气体供应管线3 以提供吹扫前体气体和反应性气体的吹扫气体，并且通过供应前体气体或反应性气体并交替进行吹扫而在室8中的基板82上形成薄膜，并且还包括具有一定的中间线22的中间线22 配置在前体供给管线2的一部分或全部的体积，并且在不供给前体气体的时候可以填充前体气体的体积，和/或具有一定体积的中间线12 反应气体供应管线1的一部分或全部，并且在不供应反应气体的时候可以填充反应气体。

13. 发明申请

US20070221970A1 Manufacturing method of semiconductor device and semiconductor device 审中-公开
标题翻译：半导体器件和半导体器件的制造方法
公开(公告)号：US20070221970A1
公开(公告)日：2007-09-27
申请号：US11715353
申请日：2007-03-08
申请人： Masaru Kadoshima , Toshihide Nabatame
发明人： Masaru Kadoshima , Toshihide Nabatame
IPC分类号： H01L29/76 , H01L21/8234
CPC分类号： H01L21/823835 , H01L21/28097 , H01L21/823842 , H01L29/66545 , H01L29/6659 , H01L29/7833
摘要： In a manufacturing process of a semiconductor device having a CMISFET, first, a silicon film and a first metal film made of a first metal are reacted with each other through heat treatment, thereby forming a gate electrode of a p-channel type MISFET and a dummy gate electrode of an n-channel type MISFET, which are formed of metal silicide. Subsequently, an insulating film is formed so as to cover the gate electrode but expose the dummy electrode, and then, a metal film formed of a second metal having a work function lower than that of the first metal. The metal film contacts with the dummy gate but not with the gate electrode due to the insulating film interposing therebetween. Thereafter, through heat treatment, the dummy gate electrode and the metal film are reacted with each other to form a gate electrode of the n-channel type MISFET.
摘要翻译：在具有CMISFET的半导体器件的制造工艺中，首先，由第一金属制成的硅膜和第一金属膜通过热处理彼此反应，从而形成p沟道型MISFET的栅电极和由金属硅化物形成的n沟道型MISFET的虚拟栅电极。随后，形成绝缘膜以覆盖栅电极，但暴露虚拟电极，然后形成由功函数低于第一金属功函数的第二金属形成的金属膜。金属膜与虚拟栅极接触，但由于绝缘膜介于其间，与栅电极接触。此后，通过热处理，虚拟栅电极和金属膜彼此反应，形成n沟道型MISFET的栅电极。

14. 发明授权

US07790627B2 Semiconductor device, method of manufacturing the same, and method of manufacturing metal compound thin film 有权
标题翻译：半导体装置及其制造方法以及金属化合物薄膜的制造方法
公开(公告)号：US07790627B2
公开(公告)日：2010-09-07
申请号：US12001381
申请日：2007-12-11
申请人： Kunihiko Iwamoto , Toshihide Nabatame , Koji Tominaga , Tetsuji Yasuda
发明人： Kunihiko Iwamoto , Toshihide Nabatame , Koji Tominaga , Tetsuji Yasuda
IPC分类号： H01L21/8242 , H01L21/4763 , H01L21/461 , H01L21/302 , H01L21/469
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L29/513 , H01L29/517 , H01L29/518
摘要： A method of manufacturing a metal compound thin film is disclosed. The method may include forming a first metal compound layer on a substrate by atomic layer deposition, performing annealing on the first metal compound layer in an atmosphere containing a nitrogen compound gas, thereby diffusing nitrogen into the first metal compound layer, and forming a second metal compound layer on the first metal compound layer by atomic layer deposition.
摘要翻译：公开了一种制造金属化合物薄膜的方法。该方法可以包括通过原子层沉积在衬底上形成第一金属化合物层，在含有氮化合物气体的气氛中对第一金属化合物层进行退火，从而将氮扩散到第一金属化合物层中，并形成第二金属通过原子层沉积在第一金属化合物层上的化合物层。

15. 发明授权

US07482234B2 Method of fabricating a metal oxynitride thin film that includes a first annealing of a metal oxide film in a nitrogen-containing atmosphere to form a metal oxynitride film and a second annealing of the metal oxynitride film in an oxidizing atmosphere 有权
标题翻译：制造金属氮氧化物薄膜的方法，其包括在含氮气氛中的金属氧化物膜的第一退火以形成金属氧氮化物膜和在氧化气氛中的金属氧氮化物膜的第二退火
公开(公告)号：US07482234B2
公开(公告)日：2009-01-27
申请号：US10928045
申请日：2004-08-27
申请人： Kunihiko Iwamoto , Koji Tominaga , Toshihide Nabatame , Tomoaki Nishimura
发明人： Kunihiko Iwamoto , Koji Tominaga , Toshihide Nabatame , Tomoaki Nishimura
IPC分类号： H01L21/473
CPC分类号： H01L29/66575 , H01L21/28185 , H01L21/28194 , H01L29/513 , H01L29/517 , H01L29/78 , H01L2924/0002 , H01L2924/00
摘要： After the surface of the substrate is cleaned, an interface layer or an antidiffusion film is formed. A metal oxide film is built upon the antidiffusion film Annealing is done in an NH3 atmosphere so as to diffuse nitrogen in the metal oxide film. Building of the metal oxide film and diffusion of nitrogen are repeated several times, whereupon annealing is done in an O2 atmosphere. By annealing the film in an O2 atmosphere at a temperature higher than 650° C., the leak current in the metal oxide film is controlled.
摘要翻译：在清洁基板的表面之后，形成界面层或反扩散膜。在抗扩散膜上构建金属氧化物膜。在NH 3气氛中进行退火，以便在金属氧化物膜中扩散氮。金属氧化物膜的构建和氮的扩散重复几次，随后在O 2气氛中进行退火。通过在高于650℃的温度下在O 2气氛中退火该膜，可以控制金属氧化物膜中的漏电流。

16. 发明申请

US20070218624A1 Semiconductor device and method of manufacturing the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070218624A1
公开(公告)日：2007-09-20
申请号：US11724247
申请日：2007-03-15
申请人： Hideki Satake , Toshihide Nabatame
发明人： Hideki Satake , Toshihide Nabatame
IPC分类号： H01L21/8242
CPC分类号： H01L29/513 , H01L21/28097 , H01L29/4975 , H01L29/517 , H01L29/6659 , H01L29/7833
摘要： A method of manufacturing an MIS semiconductor device includes forming a high dielectric film as a gate insulator on a semiconductor substrate of a first conductivity type, heat-treating the semiconductor substrate in ambient with hydrogen and oxygen gases to form an interface layer between the semiconductor substrate and the high dielectric film, forming a conductive film on the high dielectric film after the interfacial layer is formed, processing the conductive film in a gate pattern to form a gate electrode, and doping the semiconductor substrate with impurities of a second conductivity type using the gate electrode as a mask to form source/drain regions.
摘要翻译：一种制造MIS半导体器件的方法包括在第一导电类型的半导体衬底上形成作为栅极绝缘体的高介电膜，用氢气和氧气在环境中对半导体衬底进行热处理，以在半导体衬底和高介电膜，在形成界面层之后在高电介质膜上形成导电膜，以栅极图案处理导电膜以形成栅电极，并使用第二导电类型的杂质掺杂半导体衬底栅极电极作为掩模形成源极/漏极区域。

17. 发明授权

US07259058B2 Fabricating method of semiconductor integrated circuits 有权
标题翻译：半导体集成电路的制造方法
公开(公告)号：US07259058B2
公开(公告)日：2007-08-21
申请号：US10020314
申请日：2001-12-18
申请人： Yasuhiro Shimamoto , Masahiko Hiratani , Yuichi Matsui , Satoshi Yamamoto , Toshihide Nabatame , Toshio Ando , Hiroshi Sakuma , Shinpei Iijima
发明人： Yasuhiro Shimamoto , Masahiko Hiratani , Yuichi Matsui , Satoshi Yamamoto , Toshihide Nabatame , Toshio Ando , Hiroshi Sakuma , Shinpei Iijima
IPC分类号： H01L21/8242
CPC分类号： H01L28/60 , C23C16/18 , H01L21/28556 , H01L21/28568 , H01L28/55 , H01L28/91
摘要： A ruthenium electrode with a low amount of oxygen contamination and high thermal stability is formed by a chemical vapor deposition method. In the chemical vapor deposition method using an organoruthenium compound as a precursor, the introduction of an oxidation gas is limited to when the precursor is supplying, and the reaction is allowed to occur at a low oxygen partial pressure. Consequently, it is possible to form a ruthenium film with a low amount of oxygen contamination. Further, after formation of the ruthenium film, annealing at not less than the formation temperature is performed, thereby forming a ruthenium film with high thermal stability.
摘要翻译：通过化学气相沉积法形成氧气污染少，热稳定性高的钌电极。在使用有机钌化合物作为前体的化学气相沉积方法中，氧化气体的引入限于当前体供应时，并且允许反应在低氧分压下发生。因此，可以形成氧含量低的钌膜。此外，在形成钌膜之后，进行不低于形成温度的退火，由此形成热稳定性高的钌膜。

18. 发明申请

US20070054503A1 Film forming method and fabrication process of semiconductor device 审中-公开
标题翻译：半导体器件的成膜方法和制造工艺
公开(公告)号：US20070054503A1
公开(公告)日：2007-03-08
申请号：US11510679
申请日：2006-08-28
申请人： Hiroyuki Takaba , Toshihide Nabatame , Masaru Kadoshima
发明人： Hiroyuki Takaba , Toshihide Nabatame , Masaru Kadoshima
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/0228 , C23C16/44 , C23C16/45525 , H01L21/02164 , H01L21/02181 , H01L21/02189 , H01L21/022 , H01L21/28079 , H01L21/28194 , H01L21/3141 , H01L29/495 , H01L29/517
摘要： A method of forming a film on a substrate includes a first step of carrying out first film formation on an insulation layer formed on the substrate by an ALD process, and a second step of carrying out second film formation in continuation to the first step by a CVD process.
摘要翻译：在衬底上形成膜的方法包括：通过ALD工艺在形成在衬底上的绝缘层上进行第一膜形成的第一步骤;以及第二步骤，通过第一步骤进行第二膜形成 CVD工艺。

19. 发明申请

US20060180082A1 Film formation apparatus 失效
标题翻译：成膜装置
公开(公告)号：US20060180082A1
公开(公告)日：2006-08-17
申请号：US10550753
申请日：2004-03-24
申请人： Kunihiko Iwamoto , Toshihide Nabatame , Koji Tominaga , Tetsuji Yasuda
发明人： Kunihiko Iwamoto , Toshihide Nabatame , Koji Tominaga , Tetsuji Yasuda
IPC分类号： C23C16/00
CPC分类号： H01L21/3141 , C23C16/45527 , C23C16/45529 , C23C16/56 , H01L21/3143 , H01L21/31616 , H01L21/31637 , H01L21/31641 , H01L21/31645 , H01L21/31691
摘要： A metal atomic layer and an oxygen atomic layer are formed in this order by ALD, followed by rapid heating through RTA (Rapid Thermal Annealing). This cycle of steps is repeated to form a high dielectric constant film.
摘要翻译：通过ALD依次形成金属原子层和氧原子层，然后通过RTA（快速热退火）快速加热。重复该步骤循环以形成高介电常数膜。

20. 发明授权

US06992022B2 Fabrication method for semiconductor integrated devices 失效
公开(公告)号：US06992022B2
公开(公告)日：2006-01-31
申请号：US10795430
申请日：2004-03-09
申请人： Yasuhiro Shimamoto , Masahiko Hiratani , Yuichi Matsui , Toshihide Nabatame
发明人： Yasuhiro Shimamoto , Masahiko Hiratani , Yuichi Matsui , Toshihide Nabatame
IPC分类号： H01L21/31
CPC分类号： H01L28/60 , C23C16/18 , C23C16/409 , H01L21/28556 , H01L21/31604 , H01L27/10814 , H01L28/55
摘要： A process for forming the lower and upper electrodes of a high dielectric constant capacitor in a semiconductor device from an organoruthenium compound by chemical vapor deposition. This chemical vapor deposition technique employs an organoruthenium compound, an oxidizing gas, and a gas (such as argon) which is hardly adsorbed to the ruthenium surface or a gas (such as ethylene) which is readily adsorbed to the ruthenium surface. This process efficiently forms a ruthenium film with good conformality in a semiconductor device.

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