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    • 18. 发明授权
    • Nonvolatile memory device and manufacturing method thereof
    • 非易失存储器件及其制造方法
    • US08618526B2
    • 2013-12-31
    • US13501228
    • 2011-08-11
    • Haruyuki SoradaTakeki NinomiyaTakumi MikawaYukio Hayakawa
    • Haruyuki SoradaTakeki NinomiyaTakumi MikawaYukio Hayakawa
    • H01L47/00
    • H01L27/101H01L27/2409H01L27/2463H01L45/08H01L45/1233H01L45/146H01L45/1608H01L45/1675
    • Provided are a nonvolatile memory device which can suppress non-uniformity in initial breakdown voltages among nonvolatile memory elements and prevent reduction of yield, and a manufacturing method thereof. The nonvolatile memory device includes a nonvolatile memory element (108) having a stacked-layer structure in which a resistance variable layer (106) is parallel to a main surface of a substrate (117) and is planarized, and a plug (103) electrically connected to either a first electrode (105) or a second electrode (107), and an area of an end surface of a plug (103) at which the plug (103) and the nonvolatile memory element (108) are connected together, the end surface being parallel to the main surface of the substrate (117), is greater than a cross-sectional area of a cross-section of a first transition metal oxide layer (115) which is an electrically-conductive region, the cross-section being parallel to the main surface of the substrate (117).
    • 提供一种能够抑制非易失性存储元件之间的初始击穿电压的不均匀性并且防止产量降低的非易失性存储器件及其制造方法。 非易失性存储器件包括具有堆叠层结构的非易失性存储元件(108),其中电阻变化层(106)平行于衬底(117)的主表面并被平坦化;以及电极(103) 连接到第一电极(105)或第二电极(107),以及插头(103)的端面(103)的与插头(103)和非易失性存储元件(108)连接在一起的区域, 平行于基板(117)的主表面的端面大于作为导电区域的第一过渡金属氧化物层(115)的截面的横截面积,横截面 平行于基板(117)的主表面。