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11. 发明授权

US08198665B2 Semiconductor storage device and manufacturing method thereof 有权
标题翻译：半导体存储装置及其制造方法
公开(公告)号：US08198665B2
公开(公告)日：2012-06-12
申请号：US12245396
申请日：2008-10-03
申请人： Kenji Kawabata , Hisataka Meguro
发明人： Kenji Kawabata , Hisataka Meguro
IPC分类号： H01L29/788 , H01L21/336
CPC分类号： H01L21/84 , B82Y10/00 , H01L21/28273 , H01L27/1203 , H01L29/127 , H01L29/7888
摘要： A semiconductor storage device includes: a substrate having a semiconductor layer at least on a surface thereof; and a plurality of quantum dot elements forming a charge storage layer formed above the semiconductor layer via a first insulating film that becomes a tunnel insulating film in such a manner that the quantum dot elements are connected with a bit line in series, wherein each quantum dot element forms a single electron memory.
摘要翻译：半导体存储装置包括：至少在其表面上具有半导体层的基板; 以及形成电荷存储层的多个量子点元件，其经由形成隧道绝缘膜的第一绝缘膜形成在半导体层上方，使得量子点元件与位线串联连接，其中每个量子点元件形成单个电子存储器。

12. 发明申请

US20110143503A1 Semiconductor storage element and manufacturing method thereof 有权
标题翻译：半导体存储元件及其制造方法
公开(公告)号：US20110143503A1
公开(公告)日：2011-06-16
申请号：US12929843
申请日：2011-02-18
申请人： Kenji Kawabata
发明人： Kenji Kawabata
IPC分类号： H01L21/336 , H01L21/283
CPC分类号： H01L27/1203 , H01L21/0334 , H01L21/84 , H01L27/115 , H01L27/11521 , Y10S977/936 , Y10S977/943
摘要： A semiconductor storage element includes: a semiconductor layer constituted of a line pattern with a predetermined width formed on a substrate; a quantum dot forming an electric charge storage layer formed on the semiconductor layer through a first insulating film serving as a tunnel insulating film; an impurity diffusion layer formed in a surface layer of the semiconductor layer so as to sandwich the quantum dot therebetween; and a control electrode formed on the quantum dot through a second insulating film.
摘要翻译：半导体存储元件包括：由在基板上形成的具有预定宽度的线图案构成的半导体层; 形成通过用作隧道绝缘膜的第一绝缘膜在半导体层上形成的电荷存储层的量子点; 形成在所述半导体层的表面层中以将所述量子点夹在其间的杂质扩散层; 以及通过第二绝缘膜形成在量子点上的控制电极。

13. 发明申请

US20070059517A1 Porous insulating film and its laminates 有权
公开(公告)号：US20070059517A1
公开(公告)日：2007-03-15
申请号：US11516045
申请日：2006-09-06
申请人： Shigeru Yao , Yukihiko Asano , Shyusei Ohya , Kenji Fukunaga , Masayuki Kinouchi , Kenji Kawabata
发明人： Shigeru Yao , Yukihiko Asano , Shyusei Ohya , Kenji Fukunaga , Masayuki Kinouchi , Kenji Kawabata
IPC分类号： B32B3/26
CPC分类号： B32B15/08 , B29C41/12 , B29K2995/0006 , B29K2995/0007 , B29K2995/0017 , B29L2031/3061 , B32B3/26 , B32B5/18 , B32B7/12 , B32B27/06 , B32B27/16 , B32B27/281 , B32B2305/026 , B32B2307/202 , B32B2307/204 , B32B2307/206 , B32B2307/306 , B32B2307/714 , B32B2307/7242 , B32B2457/08 , C08G73/105 , C08G73/1067 , C08G73/1071 , C08J5/18 , C08J2379/08 , H01M2/1613 , H01M2/1653 , H01M2/166 , H01M2/1686 , H01M10/056 , H01M2300/0094 , H05K1/0346 , Y10S428/901 , Y10T428/24917 , Y10T428/249958 , Y10T428/249978 , Y10T428/249979 , Y10T428/249982 , Y10T428/24999 , Y10T428/31721
摘要： A porous insulating film comprising a highly heat resistant resin film having a fine porous structure with a mean pore size of 0.01-5 μm in at least the center of the film, and a porosity of 15-80%. A laminate is prepared by forming a heat resistant adhesive layer or a conductive metal layer or an inorganic or metal substrate on one or both sides of the porous insulating film or by forming an inorganic or metal substrate on one side of the porous insulating film and a conductive metal layer on the other side.

14. 发明申请

US20070042512A1 Apparatus and method of predicting performance of semiconductor manufacturing process and semiconductor device, and manufacturing method of semiconductor device 审中-公开
标题翻译：半导体制造工艺和半导体器件的性能预测装置及方法以及半导体器件的制造方法
公开(公告)号：US20070042512A1
公开(公告)日：2007-02-22
申请号：US11504048
申请日：2006-08-15
申请人： Kenji Kawabata
发明人： Kenji Kawabata
IPC分类号： H01L21/66
CPC分类号： G05B17/02
摘要： Apparatus and method of predicting performance of a semiconductor manufacturing process and device, which reduces simulation resources to predict the performance distribution in the wafer and manufacturing method of a semiconductor device are disclosed. According to one aspect, it is provided a performance prediction apparatus comprising a uniform mesh data generator generating uniform mesh data by dividing a wafer using a uniform mesh to predict an in-plane characteristics distribution of performance in a series of process steps, a non-uniform mesh generator generating a non-uniform mesh by combining element meshes based on the uniform mesh data and predetermined threshold, a common mesh generator generating a common mesh by superimposing the non-uniform meshes and selecting a minimum mesh by region, a common mesh data generator generating common mesh data by representing the performance using the common mesh, and a predicting section predicting a comprehensive performance after processing the series of processes.
摘要翻译：公开了一种预测半导体制造工艺和器件的性能的装置和方法，其减少了模拟资源以预测晶片的性能分布以及半导体器件的制造方法。根据一个方面，提供了一种性能预测装置，其包括均匀网格数据生成器，其通过使用均匀网格划分晶片来生成均匀网格数据，以预测一系列处理步骤中的平面性能分布特性，均匀网格生成器通过基于均匀网格数据和预定阈值组合元素网格来生成不均匀网格;公共网格生成器，通过叠加非均匀网格并且逐区选择最小网格来生成公共网格，公共网格数据发生器通过使用公共网格表示性能来生成公共网格数据，以及预测部分，其在处理一系列处理之后预测综合性能。

15. 发明授权

US5744916A Discharge tube lighting apparatus 失效
标题翻译：放电管照明装置
公开(公告)号：US5744916A
公开(公告)日：1998-04-28
申请号：US543725
申请日：1995-10-16
申请人： Kenji Kawabata , Shuzo Matsumoto , Ryuichi Ikeda , Motohiro Sugino , Takashi Okada , Yoshiteru Watanabe
发明人： Kenji Kawabata , Shuzo Matsumoto , Ryuichi Ikeda , Motohiro Sugino , Takashi Okada , Yoshiteru Watanabe
IPC分类号： H05B41/24 , H05B41/285 , H05B37/02
CPC分类号： H05B41/2856 , Y10S315/07
摘要： In order to detect a fault which would result in heating or fuming of a discharge tube lighting circuit and to break the lighting circuit, input voltage and current are measured and multiplied to compute the input power. The discharge tube 3 is extinguished when an input power reaches a predetermined value.
摘要翻译：为了检测导致放电管点亮电路的加热或发烟并且使点火电路断路的故障，测量和乘以输入电压和电流以计算输入功率。当输入功率达到预定值时，放电管3熄灭。

16. 发明授权

US5621281A Discharge lamp lighting device 失效
标题翻译：放电灯照明装置
公开(公告)号：US5621281A
公开(公告)日：1997-04-15
申请号：US461817
申请日：1995-06-05
申请人： Kenji Kawabata , Ryuichi Ikeda , Motohiro Sugino , Takashi Okada , Johji Mamiya
发明人： Kenji Kawabata , Ryuichi Ikeda , Motohiro Sugino , Takashi Okada , Johji Mamiya
IPC分类号： H05B41/16 , H05B41/24 , H05B41/282 , H05B41/392 , G05F1/00
CPC分类号： H05B41/282 , H05B41/2824 , H05B41/392 , Y02B20/183
摘要： A current feedback type discharge lamp lighting device including a switching circuit which switches an impedance of an impedance device in accordance with the number of connected discharge tubes. In the discharge lamp lighting device, a tube current for each of the connected discharge tubes is maintained constant, and the discharge lamp lighting device tends to not be effected by stray capacitance.
摘要翻译：一种电流反馈型放电灯点亮装置，包括根据连接的放电管的数量切换阻抗装置的阻抗的开关电路。在放电灯点亮装置中，每个连接的放电管的管电流保持恒定，并且放电灯点亮装置趋向于不受寄生电容的影响。

17. 发明授权

US07405088B2 Method for analyzing fail bit maps of waters and apparatus therefor 失效
标题翻译：分析水域及其设备失效位图的方法
公开(公告)号：US07405088B2
公开(公告)日：2008-07-29
申请号：US10801992
申请日：2004-03-17
申请人： Hiroshi Matsushita , Kenichi Kadota , Kenji Kawabata , Yoshiyuki Shioyama
发明人： Hiroshi Matsushita , Kenichi Kadota , Kenji Kawabata , Yoshiyuki Shioyama
IPC分类号： H01L21/00
CPC分类号： H01L22/20
摘要： A failure analysis method according to the invention includes inputting the positions of failures in multiple wafers of an input device; preparing multiple sections in the multiple wafers; calculating feature amounts, which are represented by at least one numerical value representing a distribution of the failures in the multiple wafers, for each of the multiple sections; and representing by a first numerical value, the degree of similarity between the multiple wafers in terms of the feature amounts. Subsequently, the method includes detecting another wafer, which has the first numerical value greater than a predetermined first threshold, for each of the multiple wafers and forming a similar wafer group of multiple wafers with similar distributions of the failures.
摘要翻译：根据本发明的故障分析方法包括在输入设备的多个晶片中输入故障的位置; 准备多个晶片的多个部分; 计算特征量，其由表示多个晶片中的故障的分布的至少一个数值表示，用于多个部分中的每一个; 并且通过第一数值表示在特征量方面的多个晶片之间的相似度。随后，该方法包括对于每个多个晶片检测具有大于预定第一阈值的第一数值的另一个晶片，并且形成具有类似故障分布的多个晶片的相似晶片组。

18. 发明授权

US07311966B2 Porous insulating film and its laminates 有权
公开(公告)号：US07311966B2
公开(公告)日：2007-12-25
申请号：US11516045
申请日：2006-09-06
申请人： Shigeru Yao , Yukihiko Asano , Shyusei Ohya , Kenji Fukunaga , Masayuki Kinouchi , Kenji Kawabata
发明人： Shigeru Yao , Yukihiko Asano , Shyusei Ohya , Kenji Fukunaga , Masayuki Kinouchi , Kenji Kawabata
IPC分类号： B32B3/26
CPC分类号： B32B15/08 , B29C41/12 , B29K2995/0006 , B29K2995/0007 , B29K2995/0017 , B29L2031/3061 , B32B3/26 , B32B5/18 , B32B7/12 , B32B27/06 , B32B27/16 , B32B27/281 , B32B2305/026 , B32B2307/202 , B32B2307/204 , B32B2307/206 , B32B2307/306 , B32B2307/714 , B32B2307/7242 , B32B2457/08 , C08G73/105 , C08G73/1067 , C08G73/1071 , C08J5/18 , C08J2379/08 , H01M2/1613 , H01M2/1653 , H01M2/166 , H01M2/1686 , H01M10/056 , H01M2300/0094 , H05K1/0346 , Y10S428/901 , Y10T428/24917 , Y10T428/249958 , Y10T428/249978 , Y10T428/249979 , Y10T428/249982 , Y10T428/24999 , Y10T428/31721
摘要： A porous insulating film comprising a highly heat resistant resin film having a fine porous structure with a mean pore size of 0.01-5 μm in at least the center of the film, and a porosity of 15-80%. A laminate is prepared by forming a heat resistant adhesive layer or a conductive metal layer or an inorganic or metal substrate on one or both sides of the porous insulating film or by forming an inorganic or metal substrate on one side of the porous insulating film and a conductive metal layer on the other side.

19. 发明授权

US06683418B2 Inverter type illumination lighting apparatus 失效
标题翻译：逆变式照明照明装置
公开(公告)号：US06683418B2
公开(公告)日：2004-01-27
申请号：US09960406
申请日：2001-09-24
申请人： Hiroyuki Shoji , Hideki Miyazaki , Kenji Kawabata
发明人： Hiroyuki Shoji , Hideki Miyazaki , Kenji Kawabata
IPC分类号： H05B3702
CPC分类号： H05B41/39 , H05B41/295 , H05B41/38
摘要： An illumination lighting apparatus has a resonance load circuit including a discharge tube, a power supply circuit for generating DC voltage from commercial AC voltage, and an inverter for converting the generated DC voltage into an AC voltage and supplying the AC voltage to the resonance load circuit. Further, a control circuit is provided which controls electric power supplied to the resonance load circuit in response to operating parameters of the discharge tube immediately after lighting of the discharge tube.
摘要翻译：照明照明装置具有包括放电管，用于从商业交流电压产生直流电压的电源电路的谐振负载电路和用于将所产生的直流电压转换为交流电压并将交流电压提供给谐振负载电路的逆变器。此外，提供一种控制电路，其控制在放电管点亮之后响应于放电管的操作参数而供应到谐振负载电路的电力。

20. 发明授权

US06451721B2 Dielectric ceramic composition 有权
标题翻译：介电陶瓷组合物
公开(公告)号：US06451721B2
公开(公告)日：2002-09-17
申请号：US09749056
申请日：2000-12-27
申请人： Kenji Kawabata , Tomomitsu Yamanishi , Tomohiro Kawanishi , Osamu Yamaoka
发明人： Kenji Kawabata , Tomomitsu Yamanishi , Tomohiro Kawanishi , Osamu Yamaoka
IPC分类号： C04B3547
CPC分类号： H01G4/1227 , C04B35/47
摘要： A dielectric ceramic composition contains 100% by weight of main component composed of about 35 to 55% by weight of SrTiO3, about 10 to 35% by weight of PbTiO3, about 5 to 12% by weight of CaTiO3, about 8 to 25% by weight of Bi2O3 and about 5 to 13% by weight of TiO2, and about 0.02 to 0.5% by weight of MnO, about 0.05 to 2% by weight of an oxide of at least one element selected from the group consisting of La, Ce, Nd, Pr, Sm, Dy, Er and Y, and about 0.02 to 0.8% by weight of CuO. The dielectric ceramic composition can provide a capacitor which exhibits a low loss and a high dielectric constant, and which can be used in the high frequency region, thereby permitting the advance in miniaturization of the capacitor.
摘要翻译：电介质陶瓷组合物含有100重量％的主成分，其含量为约35〜55重量％的SrTiO 3，约10〜35重量％的PbTiO 3，约5〜12重量％的CaTiO 3，约8〜25重量％ Bi 2 O 3的重量和约5至13重量％的TiO 2和约0.02至0.5重量％的MnO，约0.05至2重量％的选自La，Ce， Nd，Pr，Sm，Dy，Er和Y以及约0.02〜0.8重量％的CuO。电介质陶瓷组合物可以提供具有低损耗和高介电常数的电容器，其可以用于高频区域，从而允许电容器的小型化。

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