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11. 发明申请

US20070090986A1 Analog-digital converter 有权
标题翻译：模数转换器
公开(公告)号：US20070090986A1
公开(公告)日：2007-04-26
申请号：US11583848
申请日：2006-10-20
申请人： Shigeyuki Komatsu , Ichiro Yamane
发明人： Shigeyuki Komatsu , Ichiro Yamane
IPC分类号： H03M1/12
CPC分类号： H03M1/0827 , H03M1/468 , H03M1/68 , H03M1/785 , H03M1/804
摘要： An analog-digital converter includes an analog switch on a semiconductor substrate, the analog switch having a P-channel transistor and an N-channel transistor; and a capacitive element having a first electrode and a second electrode. The first electrode and the second electrode are formed in a region in a layer different from a layer of the analog switch, the region extending over the analog switch. The first electrode and the second electrode have a comb-shaped pattern different from an arrangement pattern of the source regions and the drain regions of the P-channel transistor and the N-channel transistor.
摘要翻译：模拟数字转换器包括半导体衬底上的模拟开关，模拟开关具有P沟道晶体管和N沟道晶体管; 以及具有第一电极和第二电极的电容元件。第一电极和第二电极形成在与模拟开关的层不同的区域中，该区域在模拟开关上延伸。第一电极和第二电极具有与P沟道晶体管和N沟道晶体管的源极区域和漏极区域的布置图案不同的梳状图案。

12. 发明授权

US08081525B2 Memory device including combination SRAM-ROM cells and SRAM cells alternately arranged and semiconductor device including the memory device 有权
标题翻译：存储器件包括组合SRAM-ROM单元和SRAM单元交替布置，半导体器件包括存储器件
公开(公告)号：US08081525B2
公开(公告)日：2011-12-20
申请号：US12485253
申请日：2009-06-16
申请人： Shigeyuki Komatsu , Ichiro Yamane
发明人： Shigeyuki Komatsu , Ichiro Yamane
IPC分类号： G11C7/00
CPC分类号： H01L27/105 , G11C11/005 , G11C14/00 , G11C14/0063 , H01L27/0207 , H01L27/11 , H01L27/1116 , H01L27/11226 , H01L27/11293
摘要： A combination memory device including a static random access memory (SRAM) and a read only memory (ROM) comprises first memory cells and second memory cells arranged in rows and columns, in which each of the first memory cells includes an SRAM cell and a ROM cell and is arranged adjacent to at least one of the second memory cells, and each of the second memory cells includes an SRAM cell and does not include a ROM cell.
摘要翻译：包括静态随机存取存储器（SRAM）和只读存储器（ROM）的组合存储器件包括排列成行和列的第一存储器单元和第二存储器单元，其中每个第一存储器单元包括SRAM单元和ROM 并且被布置为与第二存储器单元中的至少一个相邻，并且每个第二存储器单元包括SRAM单元，并且不包括ROM单元。

13. 发明授权

US07394416B2 Analog-digital converter 有权
标题翻译：模数转换器
公开(公告)号：US07394416B2
公开(公告)日：2008-07-01
申请号：US11583848
申请日：2006-10-20
申请人： Shigeyuki Komatsu , Ichiro Yamane
发明人： Shigeyuki Komatsu , Ichiro Yamane
IPC分类号： H03M1/00
CPC分类号： H03M1/0827 , H03M1/468 , H03M1/68 , H03M1/785 , H03M1/804
摘要： An analog-digital converter includes an analog switch on a semiconductor substrate, the analog switch having a P-channel transistor and an N-channel transistor; and a capacitive element having a first electrode and a second electrode. The first electrode and the second electrode are formed in a region in a layer different from a layer of the analog switch, the region extending over the analog switch. The first electrode and the second electrode have a comb-shaped pattern different from an arrangement pattern of the source regions and the drain regions of the P-channel transistor and the N-channel transistor.
摘要翻译：模拟数字转换器包括半导体衬底上的模拟开关，模拟开关具有P沟道晶体管和N沟道晶体管; 以及具有第一电极和第二电极的电容元件。第一电极和第二电极形成在与模拟开关的层不同的区域中，该区域在模拟开关上延伸。第一电极和第二电极具有与P沟道晶体管和N沟道晶体管的源极区域和漏极区域的布置图案不同的梳状图案。

14. 发明申请

US20070182103A1 Sealing device 审中-公开
公开(公告)号：US20070182103A1
公开(公告)日：2007-08-09
申请号：US11727764
申请日：2007-03-28
申请人： Masatoshi Okada , Iwao Taira , Tadashi Abiko , Yosuke Kondo , Kazuki Takeno , Ichiro Yamane
发明人： Masatoshi Okada , Iwao Taira , Tadashi Abiko , Yosuke Kondo , Kazuki Takeno , Ichiro Yamane
IPC分类号： F16J15/32
CPC分类号： F16J15/3232 , F02M59/442 , F04B53/164 , F16J15/002 , F16J15/3204 , F16J15/3208 , F16J15/3236
摘要： A high performance sealing device having an excellent pressure resistance and realizing a prevention of damage. The sealing device usable at a working pressure of 0 to 2 MPa, and not damaged even if the pressure of high-pressure fuel of 5 MPa or higher is applied thereto, wherein high pressure fuel on the high pressure side H is sealed by a first seal part 2, oil from a cam side on a low pressure side L is sealed by a second seal part 3, and the fuel slightly leaked due to failure of scraping at the first seal part is sealed by the second seal part to form a dual seal structure, and a resin ring 21 coming into slidable sealing contact with a shaft 10 is used in the first seal part 2, whereby abnormal abrasion does not occur even when fuel having less lubricity is used, and the durability of the seal is increased.

15. 发明申请

US20060138729A1 Reciprocating seal 审中-公开
标题翻译：往复式密封
公开(公告)号：US20060138729A1
公开(公告)日：2006-06-29
申请号：US10531443
申请日：2003-09-19
申请人： Hidenori Arai , Kazuki Takeno , Ichiro Yamane , Shinobu Munekata , Katsumi Yamashina
发明人： Hidenori Arai , Kazuki Takeno , Ichiro Yamane , Shinobu Munekata , Katsumi Yamashina
IPC分类号： F16J15/32
CPC分类号： F16F9/36 , F16J15/3232 , F16J15/3236 , F16J15/56
摘要： The present invention relates to a reciprocating seal used, for example, for a shock absorber. A main seal lip 32 has a two-step lip structure including a first lip 32a and a second lip 32b and a plurality of protrusions 34 extending in the direction of the shaft are formed on sliding contact surface of the second lip 32b, thereby improving frictional force characteristics and, at the same time, improving sealing performance.
摘要翻译：本发明涉及例如用于减震器的往复式密封件。主密封唇32具有包括第一唇缘32a和第二唇缘32b的两段唇缘结构，并且在第二唇缘32b的滑动接触表面上形成有沿轴向方向延伸的多个突起34，从而提高摩擦力特性，同时提高密封性能。

16. 发明授权

US08487709B2 Oscillator circuit 有权
标题翻译：振荡电路
公开(公告)号：US08487709B2
公开(公告)日：2013-07-16
申请号：US13122694
申请日：2010-07-22
申请人： Shinji Ishikawa , Ichiro Yamane
发明人： Shinji Ishikawa , Ichiro Yamane
IPC分类号： H03B5/32
CPC分类号： H03B5/36 , H03B5/06 , H03B2200/0046 , H03B2200/0094 , H03K3/0307 , H03L3/00
摘要： An oscillator circuit comprises a piezoelectric vibrator, an amplifier device including inverters provided in a plurality of stages, and an inverter control device. The inverters provided in the plurality of stages includes a performance-variable inverter configured which is operational in both of an initial phase of oscillation startup and a post-startup phase where the oscillation is stabilized and capable of a variable performance depending on whether the initial phase of oscillation startup or the post-startup phase where the oscillation is stabilized, and an ON/OFF inverter which is operational in the initial phase of oscillation startup and disconnected in the post-startup phase where the oscillation is stabilized. The inverter control device have the performance-variable inverter and the ON/OFF inverter both operational and lowers the performance of the performance-variable inverter in the initial phase of oscillation startup, and the inverter control device disconnects the ON/OFF inverter and increases the performance of the performance-variable inverter in the post-startup phase where the oscillation is stabilized.
摘要翻译：振荡电路包括压电振动器，包括设置在多个级中的反相器的放大器装置和逆变器控制装置。设置在多级中的逆变器包括：性能可变逆变器，其配置为在振荡启动的初始阶段和振荡稳定的后启动阶段两者中都可操作，并且能够根据初始阶段振荡启动或振荡稳定的后启动阶段，以及在振荡稳定初始阶段中振荡启动的初始阶段和断开的ON / OFF逆变器。逆变器控制装置具有性能可变的变频器和ON / OFF变频器，在起动初始阶段均可使运行性能可变变频器的性能降低，变频器控制装置断开ON / OFF变频器，性能可变的逆变器在振荡稳定的后启动阶段的性能。

17. 发明授权

US08348639B2 Sealing device 有权
标题翻译：密封装置
公开(公告)号：US08348639B2
公开(公告)日：2013-01-08
申请号：US11727763
申请日：2007-03-28
申请人： Masatoshi Okada , Iwao Taira , Tadashi Abiko , Yosuke Kondo , Kazuki Takeno , Ichiro Yamane
发明人： Masatoshi Okada , Iwao Taira , Tadashi Abiko , Yosuke Kondo , Kazuki Takeno , Ichiro Yamane
IPC分类号： F04B35/04
CPC分类号： F16J15/3232 , F02M59/442 , F04B53/164 , F16J15/002 , F16J15/3204 , F16J15/3208 , F16J15/3236
摘要： A high performance sealing device having an excellent pressure resistance and realizing a prevention of damage. The sealing device usable at a working pressure of 0 to 2 MPa, and not damaged even if the pressure of high-pressure fuel of 5 MPa or higher is applied thereto, wherein high pressure fuel on the high pressure side is sealed by a first seal part, oil from a cam side on a low pressure side is sealed by a second seal part, and the fuel slightly leaked due to failure of scraping at the first seal part is sealed by the second seal part to form a dual seal structure. A resin ring coming into slidable sealing contact with a shaft is used in the first seal part, whereby abnormal abrasion does not occur even when fuel having less lubricity is used, and the durability of the seal is increased.
摘要翻译：一种高性能的密封装置，具有优异的耐压性和防止损伤。在0〜2MPa的工作压力下使用的密封装置，即使施加5MPa以上的高压燃料的压力也不会受到损伤，高压侧的高压燃料由第一密封件一部分，来自低压侧的凸轮侧的油被第二密封部密封，并且由于第一密封部的刮擦不良而稍微漏出的燃料被第二密封部密封，形成双重密封结构。在第一密封部分中使用与轴可滑动密封接触的树脂环，由此即使使用具有较少润滑性的燃料，也不会发生异常磨损，并且密封件的耐久性增加。

18. 发明申请

US20080061894A1 Ring oscillator and semiconductor integrated circuit and electronic device including the same 失效
标题翻译：环形振荡器和半导体集成电路和电子设备包括相同
公开(公告)号：US20080061894A1
公开(公告)日：2008-03-13
申请号：US11892444
申请日：2007-08-23
申请人： Kazuhisa Raita , Ichiro Yamane , Yoshitaka Kitao , Toshifumi Hamaguchi , Takahiro Inauchi
发明人： Kazuhisa Raita , Ichiro Yamane , Yoshitaka Kitao , Toshifumi Hamaguchi , Takahiro Inauchi
IPC分类号： H03K3/03
CPC分类号： H03K3/0322 , H03K5/133 , H03K2005/00058 , H03K2005/00208 , H03L1/00 , H03L7/0995
摘要： A differential amplifier circuit includes: a differential transistor pair composed of first and second transistors; a first resistance connected to a junction point of the first and second transistors at one terminal and to a first voltage node at the other terminal; second and third resistances provided between the first and second transistors, respectively, and a second voltage node; and first and second passive circuits respectively connected to the second and third resistances, the load characteristics of the passive circuits changing according to a control signal supplied. A ring oscillator is composed of a plurality of such differential amplifier circuits connected in a loop.
摘要翻译：差分放大电路包括：由第一和第二晶体管组成的差分晶体管对; 连接到一个端子处的第一和第二晶体管的连接点的第一电阻和另一个端子处的第一电压节点的第一电阻; 分别设置在第一和第二晶体管之间的第二和第三电阻和第二电压节点; 以及分别连接到第二和第三电阻的第一和第二无源电路，无源电路的负载特性根据提供的控制信号而变化。环形振荡器由以循环连接的多个这样的差分放大器电路组成。

19. 发明授权

US07257715B2 Semiconductor integrated circuit 有权
标题翻译：半导体集成电路
公开(公告)号：US07257715B2
公开(公告)日：2007-08-14
申请号：US10609609
申请日：2003-07-01
申请人： Ichiro Yamane
发明人： Ichiro Yamane
IPC分类号： G06F12/14 , G06F21/00
CPC分类号： G06F21/71 , G06F2221/2149
摘要： A semiconductor integrated circuit including one or a plurality of external functional blocks; a nonvolatile memory having a logical content as to whether to validate or invalidate the external functional blocks; and a logical circuit validating or invalidating an input and an output to each external functional block in accordance with the logical content of the memory, wherein a user is allowed to validate use of a necessary external functional block and to invalidate use of an unnecessary external functional block.
摘要翻译：一种包括一个或多个外部功能块的半导体集成电路; 非易失性存储器，其具有关于是否验证或使所述外部功能块无效的逻辑内容; 以及根据存储器的逻辑内容对每个外部功能块的输入和输出进行验证或使其无效的逻辑电路，其中允许用户验证使用必要的外部功能块并使无用的外部功能的使用无效块。

20. 发明申请

US20070182499A1 Oscillation circuit 审中-公开
标题翻译：振荡电路
公开(公告)号：US20070182499A1
公开(公告)日：2007-08-09
申请号：US11703647
申请日：2007-02-08
申请人： Katsushi Wakai , Ichiro Yamane , Toshifumi Hamaguchi , Kazuhisa Raita
发明人： Katsushi Wakai , Ichiro Yamane , Toshifumi Hamaguchi , Kazuhisa Raita
IPC分类号： H03B5/20
CPC分类号： H03K4/502
摘要： A first comparator outputs a first signal indicative that a voltage determined according to the amount of charge stored in a first capacitor has reached a first reference voltage. A second comparator outputs a second signal indicative that a voltage determined according to the amount of charge stored in a second capacitor has reached a second reference voltage. An RS flip flop circuit is shifted to a set state by one of the first signal and the second signal and shifted to a reset state by the other signal. When the RS flip flop circuit is in the set state, the first capacitor is in a charge state, and the second capacitor is in a discharge state. When the RS flip flop circuit is in the reset state, the first capacitor is in a discharge state, and the second capacitor is in a charge state.
摘要翻译：第一比较器输出指示根据存储在第一电容器中的电荷量确定的电压已经达到第一参考电压的第一信号。第二比较器输出指示根据存储在第二电容器中的电荷量确定的电压已经达到第二参考电压的第二信号。 RS触发器电路通过第一信号和第二信号中的一个移位到设置状态，并通过另一个信号移位到复位状态。当RS触发电路处于置位状态时，第一电容器处于充电状态，第二电容器处于放电状态。当RS触发电路处于复位状态时，第一电容器处于放电状态，第二电容器处于充电状态。

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