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11. 发明申请

US20110026571A1 AUTOMATIC GAIN CONTROLLER, TRANSCEIVER AND AUTOMATIC GAIN-CONTROL METHOD THEREOF 审中-公开
标题翻译：自动增益控制器，收发器和自动增益控制方法
公开(公告)号：US20110026571A1
公开(公告)日：2011-02-03
申请号：US12935569
申请日：2008-08-08
申请人： Seon-Ho Han , Mun-Yang Park , Cheon-Soo Kim , Jae-Young Kim
发明人： Seon-Ho Han , Mun-Yang Park , Cheon-Soo Kim , Jae-Young Kim
IPC分类号： H04B3/46 , H03G3/20
CPC分类号： H03G3/3052 , H03G3/3042
摘要： An automatic gain-control method for a communication system is comprised of determining a communication distance between the first and second transceivers and controlling gain values of transception stages of the first and second transceivers in correspondence with the communication distance.
摘要翻译：一种用于通信系统的自动增益控制方法包括：确定第一和第二收发器之间的通信距离，并根据通信距离控制第一和第二收发器的收发阶段的增益值。

12. 发明授权

US06615398B2 Method for dividing ROM and DDFS using the same method 有权
公开(公告)号：US06615398B2
公开(公告)日：2003-09-02
申请号：US10017315
申请日：2001-12-18
申请人： Hyun Kyu Yu , Seon-Ho Han , Mun Yang Park , Seong-Do Kim , Yong-Sik Youn , Lee-Sup Kim , Ki-Hyuk Sung , Byung-Do Yang , Young-Jun Kim
发明人： Hyun Kyu Yu , Seon-Ho Han , Mun Yang Park , Seong-Do Kim , Yong-Sik Youn , Lee-Sup Kim , Ki-Hyuk Sung , Byung-Do Yang , Young-Jun Kim
IPC分类号： G06F1750
CPC分类号： G06F1/0356 , G06F1/0328 , G06F2101/04 , G11C17/00
摘要： The present invention relates to a ROM division method for reducing the size of a ROM in a direct digital frequency synthesizer (DDFS), which is used to synthesize a frequency in a communication system requiring fast frequency conversion. A ROM consuming most energy in the system, a modified Nicholas architecture is brought forth to reduce the size of ROM. In this modified Nicholas architecture, a ROM is divided into coarse ROM and fine ROM to convert phase to sine value. The present invention divides the coarse ROM and the fine ROM into quantized ROM and error ROM respectively. Then, value stored in each ROM is segmented in certain intervals and the minimum quantized value in each of the section is stored in the quantized ROM, while the difference between the original ROM value and the quantized ROM value is stored in the error ROM. This way, the size of a ROM can be reduced. Phase value inputted in a DDFS, a sine value is calculated by adding the four ROM values, i.e., coarse-quantized ROM, coarse-error ROM, fine-quantized ROM and fine-error ROM.

13. 发明授权

US08509353B2 Digital receiver 有权
标题翻译：数字接收机
公开(公告)号：US08509353B2
公开(公告)日：2013-08-13
申请号：US12818510
申请日：2010-06-18
申请人： Seon-Ho Han , Hyun Kyu Yu
发明人： Seon-Ho Han , Hyun Kyu Yu
IPC分类号： H03K9/00
CPC分类号： H04B1/0025 , H04B1/001
摘要： In a digital receiver, a noise attenuation and signal magnitude mapping variable amplifying unit includes a filter and an amplifier, amplifies and band-bass filters an analog signal and attenuating white noise and an interference signal other than a band signal. An ADC performs subsampling on a carrier frequency of a desired signal and performs oversampling on the band of the desired signal by using a sampling frequency to convert the analog signal which has passed through the noise attenuation and signal magnitude mapping variable amplifying unit into a digital signal of a direct conversion frequency band or an intermediate frequency band. The ADC has a dynamic range for processing both the desired signal and an undesired signal adjacent to the desired signal. A digital signal processing unit converts a signal frequency of the digital signal or digital-filters an undesired signal within the digital signal and processes the digital signal by digitally adjusting a gain.
摘要翻译：在数字接收机中，噪声衰减和信号幅度映射可变放大单元包括滤波器和放大器，对模拟信号进行放大和频带滤波，并衰减白噪声和除频带信号之外的干扰信号。 ADC在期望信号的载波频率上执行子采样，并通过使用采样频率对已经通过噪声衰减和信号幅度映射可变放大单元的模拟信号进行数字信号的期望信号的频带上的过采样，的直接转换频带或中频带。 ADC具有用于处理期望信号和与期望信号相邻的不期望信号的动态范围。数字信号处理单元转换数字信号的信号频率或数字滤波数字信号内的不需要的信号，并通过数字调节增益来处理数字信号。

14. 发明申请

US20130064148A1 SINGLE FREQUENCY SYNTHESIZER BASED FDD TRANSCEIVER 有权
标题翻译：单频合成器FDD收发器
公开(公告)号：US20130064148A1
公开(公告)日：2013-03-14
申请号：US13608677
申请日：2012-09-10
申请人： Hyun Ho BOO , Seon-Ho Han , Jang Hong Choi , Ik Soo Eo , Hyun Kyu Yu
发明人： Hyun Ho BOO , Seon-Ho Han , Jang Hong Choi , Ik Soo Eo , Hyun Kyu Yu
IPC分类号： H04J1/02
CPC分类号： H04L27/3836 , H04B1/0007 , H04L27/206 , H04L27/2092 , H04L27/2332 , H04L27/362 , H04L27/3854
摘要： The present invention relates to a single frequency synthesizer based FDD transceiver. A single frequency synthesizer generates and provides a carrier frequency so that frequency up-conversion and frequency down-conversion can be performed at the time of transmission and reception. Accordingly, the area, power consumption, and design complexity of the entire system can be reduced, and the performance of the system can be improved.
摘要翻译：本发明涉及一种基于单频合成器的FDD收发器。单个频率合成器产生并提供载波频率，使得可以在发送和接收时执行上变频和下变频。因此，可以降低整个系统的面积，功耗和设计复杂性，并且可以提高系统的性能。

15. 发明申请

US20080042771A1 Variable capacitor circuit having linear capacitance variation and voltage controlled oscillator using the same 失效
标题翻译：具有线性电容变化的可变电容电路和使用其的压控振荡器
公开(公告)号：US20080042771A1
公开(公告)日：2008-02-21
申请号：US11645893
申请日：2006-12-27
申请人： Seon-Ho Han , Cheon-Soo Kim
发明人： Seon-Ho Han , Cheon-Soo Kim
IPC分类号： H03B5/12
CPC分类号： H03B5/1243 , H03B5/1293
摘要： Provided is an apparatus having a variable capacitor circuit which is capable of obtaining a constant gain with respect to a whole control voltage by using a linear variable frequency characteristic for a variation of the control voltages, to thereby attain a wide variable frequency range. For this, a variable capacitor circuit includes a plurality of variable capacitors being connected in parallel with each other and having different capacitances with respect to an input control voltage, wherein the sum of the variable capacitances of the plurality of variable capacitors at a same voltage level of the control voltage varied within the whole control voltage range has linearity.
摘要翻译：提供一种具有可变电容器电路的装置，其可以通过使用用于控制电压的变化的线性可变频率特性来获得相对于整个控制电压的恒定增益，从而获得宽的可变频率范围。为此，可变电容电路包括彼此并联连接并且相对于输入控制电压具有不同电容的多个可变电容器，其中在相同电压电平下的多个可变电容器的可变电容之和的控制电压在整个控制电压范围内变化具有线性关系。

16. 发明授权

US07323939B2 Low noise amplifier for wideband tunable matching 有权
标题翻译：低噪声放大器，用于宽带可调谐匹配
公开(公告)号：US07323939B2
公开(公告)日：2008-01-29
申请号：US11241128
申请日：2005-09-29
申请人： Seon-Ho Han , Mun-Yang Park , Hyun-Kyu Yu
发明人： Seon-Ho Han , Mun-Yang Park , Hyun-Kyu Yu
IPC分类号： H03F3/04
CPC分类号： H03F3/193 , H03F1/223 , H03F1/26 , H03F1/42 , H03F1/56 , H03F2200/168 , H03F2200/36 , H03F2200/372 , H03F2200/489
摘要： Provided is a low noise amplifier with a common source and a source degeneration, which has linearity, power gain, noise factor, and lossless input matching. The low noise amplifier includes: a first inductor having one terminal connected to an input terminal receiving a signal; a second inductor having one terminal connected to a ground; a MOS transistor having a gate connected to the first inductor, a source connected to the other terminal of the second inductor, and a drain transmitting a signal; and a variable capacitor connected between the source and gate of the MOS transistor and varying an input matching frequency at the input terminal.
摘要翻译：提供了具有共同源极和源极退化的低噪声放大器，其具有线性度，功率增益，噪声因数和无损输入匹配。低噪声放大器包括：第一电感器，其一端连接到接收信号的输入端; 第二电感器，其一端连接到地; MOS晶体管，具有连接到第一电感器的栅极，连接到第二电感器的另一个端子的源极和发射信号的漏极; 以及可变电容器，其连接在MOS晶体管的源极和栅极之间并改变输入端子处的输入匹配频率。

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