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    • 12. 发明授权
    • Single antenna interference cancellation within a wireless terminal
    • 无线终端内的单天线干扰消除
    • US07450635B2
    • 2008-11-11
    • US11150925
    • 2005-06-13
    • Huaiyu (Hanks) ZengBaoguo YangArkady Molev-ShteimanArie HeimanYue ChenNelson R. Sollenberger
    • Huaiyu (Hanks) ZengBaoguo YangArkady Molev-ShteimanArie HeimanYue ChenNelson R. Sollenberger
    • H03H7/30H03K5/156H04B1/10
    • H04L25/03171H04L25/03133
    • The present invention provides a multi-branch equalizer processing module operable to cancel interference associated with received radio frequency (RF) burst(s). This multi-branch equalizer processing module includes both a first equalizer processing branch and a second equalizer processing branch. The first equalizer processing branch is operable to be trained based upon known training sequences and equalize the received RF burst. This results in soft samples or decisions which in turn may be converted to data bits. The soft samples are processed with a de-interleaver and channel decoder, where the combination is operable to produce a decoded frame of data bits from the soft samples. A re-encoder may re-encode the decoded frame to produce re-encoded or at least partially re-encoded data bits. An interleaver then processes the at least partially re-encoded data bits to produce and at least partially re-encoded burst. The second equalizer processing branch uses the at least partially re-encoded data bits to train linear equalizer(s) within the second equalizer processing branch. A buffer may initially store the received RF burst(s), which are retrieved and equalized by the second equalizer processing branch once the linear equalizer(s) are trained. This results in alternate soft samples or decisions which in turn may be converted to alternate data bits. The alternate soft samples are processed with the de-interleaver and channel decoder, where the combination is operable to produce an alternate decoded frame of data bits from the alternate soft samples. This allows interfering signals to be cancelled and more accurate processing of the received RF bursts to occur.
    • 本发明提供一种多分支均衡器处理模块,其可操作以消除与接收的射频(RF)突发相关联的干扰。 该多分支均衡器处理模块包括第一均衡器处理分支和第二均衡器处理分支。 第一均衡器处理分支可操作以基于已知的训练序列进行训练,并均衡所接收的RF突发。 这导致软样本或决策,而这些样本或决定又可以转换为数据位。 软采样用解交织器和信道解码器处理,其中组合可操作以从软样本产生解码的数据比特帧。 重新编码器可以对解码的帧进行重新编码,以产生重新编码或至少部分重新编码的数据比特。 交织器然后处理至少部分重新编码的数据比特以产生和至少部分地重新编码突发。 第二均衡器处理分支使用至少部分重新编码的数据比特来训练第二均衡器处理分支内的线性均衡器。 缓冲器可以初始地存储所接收的RF突发,一旦训练了线性均衡器,其将被第二均衡器处理分支检索和均衡。 这导致交替的软样本或决定,这又可以转换为备用数据位。 用去交织器和信道解码器处理替代软样本,其中组合可操作以从备选软样本产生替代解码的数据比特帧。 这允许消除干扰信号并且发生接收的RF突发的更精确的处理。
    • 13. 发明申请
    • METHOD AND SYSTEM FOR DETECTING AND CORRECTING ERRORS WHILE ACCESSING MEMORY DEVICES IN MICROPROCESSOR SYSTEMS
    • 在微处理器系统中访问存储器件时检测和校正错误的方法和系统
    • US20080148124A1
    • 2008-06-19
    • US12026107
    • 2008-02-05
    • Yan ZhangPaul Yang LuYue Chen
    • Yan ZhangPaul Yang LuYue Chen
    • G06F11/10
    • G06F11/1008G06F11/1076
    • Systems and methods for ensuring data integrity in a data processing system are disclosed. The method may include monitoring when data for a specified device is available for error correction code generation. A new error correction code may be generated in hardware for the data, based on the indicated size of the data. Detected errors may be corrected in software, based on the generated new error correction code. A first indication of the specified device, a second indication of the data and a third indication of a size of the data may be received during the monitoring. The method may also include indicating when the generating of the new error correction code for a specified number of accesses for at least a portion of the data is complete, and enabling or disabling the error correction code generation. The enabling and/or the disabling may be accomplished via an enable signal.
    • 公开了一种用于确保数据处理系统中的数据完整性的系统和方法。 该方法可以包括监视指定装置的数据是否可用于产生纠错码。 可以基于所指示的数据大小在数据的硬件中生成新的纠错码。 基于生成的新的纠错码,可以在软件中校正检测到的错误。 可以在监视期间接收指定设备的第一指示,数据的第二指示和数据大小的第三指示。 该方法还可以包括指示何时完成对数据的至少一部分的指定数量的访问的新纠错码的生成,以及启用或禁用纠错码生成。 启用和/或禁用可以通过使能信号来实现。
    • 15. 发明申请
    • Automatic detection of hidden networks
    • 自动检测隐藏网络
    • US20080082543A1
    • 2008-04-03
    • US11540070
    • 2006-09-29
    • Abhishek AbhishekAmir ZohrenejadYue ChenAndrew BaronYi Lu
    • Abhishek AbhishekAmir ZohrenejadYue ChenAndrew BaronYi Lu
    • G06F17/30
    • H04W48/18H04W48/16H04W84/12
    • It is determined whether a mobile user device is within transmission range of one or hidden networks. A list of known networks may be accessed, the list including broadcast and hidden networks. For the hidden networks, the network connection component may instruct a network interface to actively probe for the hidden networks. If the response is received for a communication corresponding to a particular network, then it may be considered that the mobile user interface is within transmission range of the hidden network. If auto-connection logic is activated, a preference order may be applied to select which of the detected broadcasts and/or hidden networks to connect. A user interface displays broadcast and hidden networks determined to be within transmission range of the mobile user device. The user device also displays hidden networks for which it has not yet been attempted to determine whether the hidden networks are in range.
    • 确定移动用户设备是否在一个或隐藏网络的传输范围内。 可以访问已知网络的列表,该列表包括广播和隐藏网络。 对于隐藏网络,网络连接组件可以指示网络接口主动探测隐藏的网络。 如果对于与特定网络相对应的通信接收到响应,则认为移动用户接口在隐藏网络的传输范围内。 如果自动连接逻辑被激活,则可以应用偏好顺序来选择要连接的检测到的广播和/或隐藏网络。 用户界面显示确定为在移动用户设备的传输范围内的广播和隐藏网络。 用户设备还显示尚未尝试确定隐藏网络是否在范围内的隐藏网络。
    • 16. 发明申请
    • Wireless device having a hardware accelerator to support equalization processing
    • 具有用于支持均衡处理的硬件加速器的无线设备
    • US20060067394A1
    • 2006-03-30
    • US10951989
    • 2004-09-28
    • Yue Chen
    • Yue Chen
    • H03H7/30
    • H04L25/03178G06F9/3017H04L25/0212H04L25/0224H04L25/03203
    • The present invention provides an equalizer processing module within a wireless terminal having an equalizer interface that receives an incoming baseband signal from a baseband processor operably coupled to the equalizer processing module and outputs soft decisions. A processor or advanced reduced instruction set computer (RISC) machine (ARM) couples to the equalizer interface while an equalizer accelerator module operably couples to the processor or ARM. Processing of the incoming baseband signal to produce soft decisions is performed by the combination of the processor and equalizer accelerator module. A sample capture buffer and an equalizer output buffer which may or may not be within the equalizer processing module allow data to be sampled and serves as the input and output for the equalizer processing module. This equalizer accelerator may specifically perform compute intensive operations such as Trellis computations for MAP equalization or MLSE equalization.
    • 本发明提供了一种在具有均衡器接口的无线终端内的均衡器处理模块,该均衡器接口从可操作地耦合到均衡器处理模块的基带处理器接收输入基带信号并输出​​软判决。 处理器或高级精简指令集计算机(RISC)机器(ARM)耦合到均衡器接口,而均衡器加速器模块可操作地耦合到处理器或ARM。 通过处理器和均衡器加速器模块的组合来执行进入基带信号以产生软判决的处理。 可以或不在均衡器处理模块内的采样缓冲器和均衡器输出缓冲器允许对数据进行采样并用作均衡器处理模块的输入和输出。 该均衡器加速器可以具体执行计算密集型操作,例如用于MAP均衡或MLSE均衡的网格计算。