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11. 发明授权

US4866444A Analog-to-digital converter 失效
标题翻译：模数转换器
公开(公告)号：US4866444A
公开(公告)日：1989-09-12
申请号：US154086
申请日：1988-02-09
申请人： Yoshito Nejime , Masao Hotta , Kenji Maio , Koichi Ono
发明人： Yoshito Nejime , Masao Hotta , Kenji Maio , Koichi Ono
IPC分类号： H03M1/36 , H03M1/00 , H03M1/12
CPC分类号： H03M1/0809 , H03M1/365
摘要： A flash type AD converter includes a group of comparators divided into blocks each including 2.sup.N comparators (N=1, 2, ---), each comparing an input signal with one of a plurality of reference signals, each having individually different voltage levels. One of the comparators may correspond to a level change point where the voltage level of the input signal is higher than that of the reference signal of that comparator which then generates a specific output different from those of the remaining comparators. The converter generates a binary-coded output on the basis of the specific output generated from the level change point comparator. When any one of the plural comparators belonging to one of the blocks generates the specific output, the specific output is applied as an inhibit signal to inhibit appearance of an output from a block including comparators having reference voltage signals with corresponding levels lower than those of the comparators of the block to which the comparator generating the specific output belongs.
摘要翻译：闪光型AD转换器包括一组比较器，其被分成块，每个块包括2N个比较器（N = 1,2，...），每个比较器将输入信号与多个参考信号中的一个进行比较，每个参考信号具有单独不同的电压电平。一个比较器可以对应于电平变化点，其中输入信号的电压电平高于该比较器的参考信号的电平，然后产生与剩余的比较器不同的特定输出。转换器根据从电平变化点比较器产生的特定输出产生二进制编码输出。当属于其中一个块的多个比较器中的任何一个产生特定输出时，该特定输出被施加作为禁止信号，以抑制来自包括比较器的输出的出现，该比较器具有的参考电压信号的相应电平低于生成特定输出的比较器所属的块的比较器。

12. 发明授权

US4752767A DA converter 失效
标题翻译： DA转换器
公开(公告)号：US4752767A
公开(公告)日：1988-06-21
申请号：US752588
申请日：1985-07-08
申请人： Kenji Maio , Shinichi Hayashi , Masao Hotta
发明人： Kenji Maio , Shinichi Hayashi , Masao Hotta
IPC分类号： H03M1/68 , H03M1/00 , H03M1/08 , H03M1/66 , H03M1/74
CPC分类号： H03M1/662 , H03M1/0872 , H03M1/687 , H03M1/745 , H03M1/747
摘要： The present invention provides a DA converter of the type wherein a group of switch circuits are controlled in response to input digital signals and a plurality of constant current sources are driven in response to on and off of the switch circuits to convert the input digital signals into analogue signals, the DA converter comprising a plurality of lineages of digital input circuits for controlling the switch circuits, whereby digital signals inputted to the input circuits are changed over in order for each lineage to DA convert them.
摘要翻译：本发明提供了一种类型的DA转换器，其中响应于输入数字信号控制一组开关电路，并且响应于开关电路的导通和关断驱动多个恒流源，以将输入的数字信号转换成模拟信号，DA转换器包括用于控制开关电路的多个数字输入电路谱系，由此输入到输入电路的数字信号被改变，以便每个谱系进行DA转换。

13. 发明授权

US4752766A Analog to digital converter 失效
标题翻译：模数转换器
公开(公告)号：US4752766A
公开(公告)日：1988-06-21
申请号：US15017
申请日：1987-02-17
申请人： Toshihiko Shimizu , Masao Hotta , Kenji Maio
发明人： Toshihiko Shimizu , Masao Hotta , Kenji Maio
IPC分类号： H03M1/36 , H03M1/00 , H03M1/06
CPC分类号： H03M1/361
摘要： In an analog-to-digital converter of a parallel comparison type having a plurality of comparators for comparing an analog input voltage with different reference voltages and converting a comparison result into a digital output by means of an encoder, a plurality of comparators each having a different input dynamic range are used to widen the analog input voltage range up to the power source range of positive and negative voltages.
摘要翻译：在具有用于将模拟输入电压与不同参考电压进行比较的多个比较器并且通过编码器将比较结果转换成数字输出的并行比较类型的模拟 - 数字转换器中，每个具有不同的输入动态范围用于将模拟输入电压范围扩大到正，负电压的电源范围。

14. 发明授权

US4381495A Digital-to-analog converter with error compensation 失效
标题翻译：具有误差补偿的数模转换器
公开(公告)号：US4381495A
公开(公告)日：1983-04-26
申请号：US195137
申请日：1980-10-08
申请人： Masao Hotta , Kenji Maio , Norio Yokozawa , Hiromi Nagaishi
发明人： Masao Hotta , Kenji Maio , Norio Yokozawa , Hiromi Nagaishi
IPC分类号： H03M1/10 , H03M1/00 , H03K13/02
CPC分类号： H03M1/1071 , H03M1/74
摘要： A digital-to-analog conversion system includes a digital-to-analog converter, a source of at least one set of digital input signals and a signal for error compensation and a digital signal for error detection to the converter, a switch to selectively couple either the one set of digital input signals and the signal for error compensation or the signal for error detection to the converter, a clock to generate a switching signal having a predetermined period and duration which is coupled to control the switch, a distribution switch for selectively coupling the output of the digital-to-analog converter to two different terminals, receiving a control input from the clock, a sample and hold circuit to sample and hold the output of the digital-to-analog converter, a detector for detecting a linearity error in the digital-to-analog converter output signal when the digital signal for error detection is coupled as an input thereto, a memory for storing the output of the detector, a circuit to write the output of the detector into the memory, and a circuit to read the data from said memory and couple it as the signal for error compensation at the input to the digital-to-analog converter.
摘要翻译：数模转换系统包括数模转换器，至少一组数字输入信号的源和用于误差补偿的信号以及用于向转换器进行错误检测的数字信号，选择性地耦合一组数字输入信号和用于误差补偿的信号或用于向转换器进行错误检测的信号，产生具有预定周期的切换信号的时钟和耦合以控制开关的持续时间，用于选择性地分配将数模转换器的输出耦合到两个不同的端子，从时钟接收控制输入，采样和保持电路以采样和保持数模转换器的输出，用于检测线性度的检测器当用于错误检测的数字信号作为其输入耦合时，数模转换器输出信号中的误差，用于存储检测器的输出的存储器，用于w 将检测器的输出合并到存储器中，以及电路，用于从所述存储器读取数据，并将其作为用于在数模转换器的输入处的误差补偿信号。

15. 发明授权

US08994572B2 Analog-digital converter and method for converting analog signal into digital signal 有权
标题翻译：模拟数字转换器和将模拟信号转换为数字信号的方法
公开(公告)号：US08994572B2
公开(公告)日：2015-03-31
申请号：US14346260
申请日：2012-09-06
申请人： Hao San , Tsubasa Maruyama , Masao Hotta
发明人： Hao San , Tsubasa Maruyama , Masao Hotta
IPC分类号： H03M1/34 , H03M1/14 , H03M1/06 , H03M1/12 , H03M1/40
CPC分类号： H03M1/14 , H03M1/0609 , H03M1/0692 , H03M1/0695 , H03M1/1014 , H03M1/1205 , H03M1/40 , H03M1/403 , H03M1/442
摘要： The objective of the invention is to provide an A/D converter that exhibits fewer malfunctions due to variations in manufacturing. An A/D converter (1) of the invention, which is a cyclic type of analog/digital converter for converting an analog input signal to a digital signal having a predetermined resolution, comprises: a digital approximation unit (10) that includes a comparing unit (13) for comparing the magnitude of an input first analog signal with a threshold value to output a digital value indicating a result of the comparison and that also includes an MDAC unit (14) for amplifying the first analog signal to β-fold, where β is greater than one but smaller than two, and for executing a predetermined computation in accordance with the result of the comparison of the comparing unit to output a second analog signal; a multiplexer (20) that, if the MSB is to be computed, outputs the analog input signal and, otherwise, outputs the second analog signal as the first analog signal; a β estimating unit (30) that estimates the value of β; and a digital signal outputting unit (40) that sequentially takes in digital values outputted by the comparing unit and that outputs the taken-in digital values as the digital signal.
摘要翻译：本发明的目的是提供一种A / D转换器，其由于制造变化而表现出较少的故障。本发明的A / D转换器（1）是用于将模拟输入信号转换为具有预定分辨率的数字信号的循环型模拟/数字转换器，包括：数字近似单元（10），包括比较单元（13），用于将输入的第一模拟信号的幅度与阈值进行比较，以输出指示比较结果的数字值，并且还包括用于将第一模拟信号放大到＆bgr;折叠的MDAC单元（14），其中＆bgr 大于1但小于2，并且用于根据比较单元的比较结果执行预定的计算以输出第二模拟信号; 多路复用器（20），如果要计算MSB，则输出模拟输入信号，否则输出第二模拟信号作为第一模拟信号; 一个估计单位（30）估计值以及数字信号输出单元（40），其顺序地取入由比较单元输出的数字值，并将所接收的数字值作为数字信号输出。

16. 发明申请

US20140300500A1 ANALOG/DIGITAL CONVERTER AND METHOD FOR CONVERTING ANALOG SIGNALS TO DIGITAL SIGNALS 有权
标题翻译：用于将模拟信号转换为数字信号的模拟/数字转换器和方法
公开(公告)号：US20140300500A1
公开(公告)日：2014-10-09
申请号：US14346260
申请日：2012-09-06
申请人： Hao San , Tsubasa Maruyama , Masao Hotta
发明人： Hao San , Tsubasa Maruyama , Masao Hotta
IPC分类号： H03M1/14 , H03M1/12
CPC分类号： H03M1/14 , H03M1/0609 , H03M1/0692 , H03M1/0695 , H03M1/1014 , H03M1/1205 , H03M1/40 , H03M1/403 , H03M1/442
摘要： The objective of the invention is to provide an A/D converter that exhibits fewer malfunctions due to variations in manufacturing. An A/D converter (1) of the invention, which is a cyclic type of analog/digital converter for converting an analog input signal to a digital signal having a predetermined resolution, comprises: a digital approximation unit (10) that includes a comparing unit (13) for comparing the magnitude of an input first analog signal with a threshold value to output a digital value indicating a result of the comparison and that also includes an MDAC unit (14) for amplifying the first analog signal to β-fold, where β is greater than one but smaller than two, and for executing a predetermined computation in accordance with the result of the comparison of the comparing unit to output a second analog signal; a multiplexer (20) that, if the MSB is to be computed, outputs the analog input signal and, otherwise, outputs the second analog signal as the first analog signal; a β estimating unit (30) that estimates the value of β; and a digital signal outputting unit (40) that sequentially takes in digital values outputted by the comparing unit and that outputs the taken-in digital values as the digital signal.
摘要翻译：本发明的目的是提供一种A / D转换器，其由于制造变化而表现出较少的故障。本发明的A / D转换器（1）是用于将模拟输入信号转换为具有预定分辨率的数字信号的循环型模拟/数字转换器，包括：数字近似单元（10），包括比较单元（13），用于将输入的第一模拟信号的幅度与阈值进行比较，以输出指示比较结果的数字值，并且还包括用于将第一模拟信号放大到＆bgr;折叠的MDAC单元（14），其中＆bgr 大于1但小于2，并且用于根据比较单元的比较结果执行预定的计算以输出第二模拟信号; 多路复用器（20），如果要计算MSB，则输出模拟输入信号，否则输出第二模拟信号作为第一模拟信号; 一个估计单位（30）估计值以及数字信号输出单元（40），其顺序地取入由比较单元输出的数字值，并将所接收的数字值作为数字信号输出。

17. 发明授权

US08107912B2 Mobile communication apparatus 有权
标题翻译：移动通信装置
公开(公告)号：US08107912B2
公开(公告)日：2012-01-31
申请号：US12975488
申请日：2010-12-22
申请人： Satoshi Tanaka , Kazuo Watanabe , Masao Hotta , Toyohiko Hongo , Taizo Yamawaki , Masumi Kasahara , Kumiko Takikawa
发明人： Satoshi Tanaka , Kazuo Watanabe , Masao Hotta , Toyohiko Hongo , Taizo Yamawaki , Masumi Kasahara , Kumiko Takikawa
IPC分类号： H04B1/06 , H04B7/00 , H04B1/10
CPC分类号： H04B1/30 , H03D2200/0047 , H03K21/16
摘要： A transceiver suitable for larger scale of integration employs direct conversion reception for reducing the number of filters. Also, the number of VCOs is reduced by utilizing dividers to supply a receiver and a transmitter with locally oscillated signals at an RF band. Dividers each having a fixed division ratio are used for generating locally oscillated signals for the receiver, while a divider having a switchable division ratio are used for generating the locally oscillated signal for the transmitter. In addition, a variable gain amplifier for baseband signal is provided with a DC offset voltage detector and a DC offset canceling circuit for supporting high speed data communications to accomplish fast cancellation of a DC offset by eliminating intervention of a filter within a feedback loop for offset cancellation.
摘要翻译：适合较大规模集成的收发器采用直接转换接收，以减少滤波器的数量。此外，通过利用分频器来为RF频带提供具有本地振荡信号的接收机和发射机来减少VCO的数量。每个具有固定分频比的分频器用于产生用于接收机的局部振荡信号，而具有可切换分频比的分频器用于产生用于发射机的本地振荡信号。另外，用于基带信号的可变增益放大器设置有DC偏移电压检测器和DC偏移消除电路，用于支持高速数据通信以通过消除用于偏移的反馈回路内的滤波器的干涉来实现DC偏移的快速消除消除。

18. 发明申请

US20080182538A1 MOBILE COMMUNICATION APPARATUS 有权
标题翻译：手机通讯设备
公开(公告)号：US20080182538A1
公开(公告)日：2008-07-31
申请号：US12056576
申请日：2008-03-27
申请人： Satoshi TANAKA , Kazuo Watanabe , Masao Hotta , Toyohiko Hongo , Taizo Yamawaki , Masumi Kasahara , Kumiko Takikawa
发明人： Satoshi TANAKA , Kazuo Watanabe , Masao Hotta , Toyohiko Hongo , Taizo Yamawaki , Masumi Kasahara , Kumiko Takikawa
IPC分类号： H04B1/06 , H04B1/10
CPC分类号： H04B1/30 , H03D2200/0047 , H03K21/16
摘要： A transceiver suitable for larger scale of integration employs direct conversion reception for reducing the number of filters. Also, the number of VCOs is reduced by utilizing dividers to supply a receiver and a transmitter with locally oscillated signals at an RF band. Dividers each having a fixed division ratio are used for generating locally oscillated signals for the receiver, while a divider having a switchable division ratio are used for generating the locally oscillated signal for the transmitter. In addition, a variable gain amplifier for baseband signal is provided with a DC offset voltage detector and a DC offset canceling circuit for supporting high speed data communications to accomplish fast cancellation of a DC offset by eliminating intervention of a filter within a feedback loop for offset cancellation.
摘要翻译：适合较大规模集成的收发器采用直接转换接收，以减少滤波器的数量。此外，通过利用分频器来为RF频带提供具有本地振荡信号的接收机和发射机来减少VCO的数量。每个具有固定分频比的分频器用于产生用于接收机的局部振荡信号，而具有可切换分频比的分频器用于产生用于发射机的本地振荡信号。另外，用于基带信号的可变增益放大器设置有DC偏移电压检测器和DC偏移消除电路，用于支持高速数据通信以通过消除用于偏移的反馈回路内的滤波器的干涉来实现DC偏移的快速消除消除。

19. 发明授权

US06226605B1 Digital voice processing apparatus providing frequency characteristic processing and/or time scale expansion 失效
标题翻译：提供频率特性处理和/或时标扩展的数字语音处理装置
公开(公告)号：US06226605B1
公开(公告)日：2001-05-01
申请号：US09132214
申请日：1998-08-11
申请人： Yoshito Nejime , Hiroshi Ikeda , Masao Hotta
发明人： Yoshito Nejime , Hiroshi Ikeda , Masao Hotta
IPC分类号： G10L1104
CPC分类号： H04R25/505 , G10L21/0232 , G10L21/0364 , G10L21/04 , H04R1/005 , H04R5/04 , H04R25/70 , H04R2205/041 , H04R2225/43
摘要： Making use of a digital acoustic signal processing apparatus arranged by employing memory device for storing a digital acoustic signal, acoustic frequency feature enhancing device for enhancing an acoustic frequency feature, and low-speed sound reproducing device for changing a speed of the stored voice to reproduce this voice as a low speed into a hearing aid and an appliance with an acoustic output, a hearing function difficulty due to an age is aided in utilization of audio output appliances such as a hearing aid, television receiver, and a telephone receiver. After the voice has been stored in the memory device, a process for enhancing the frequency characteristic in order to fit the frequency characteristic to the individual hearing characteristic and the voice reproducing environment is carried out and thereafter represented to the user. The user can repeatedly listen the voice stored in the memory device with employment of control device for controlling the voice reproducing operation. Furthermore, since a process for expanding a time scale during a sound reproducing operation is carried out, the voice can be represented at the low speed. Since the voice whose frequency characteristic has been enhanced can be represented at the low speed in order that either an individual hearing ability, or an apparatus is fitted to a using environment, hearing articulation can be improved with respect to such a hearing, the frequency resolution and the time resolution are simultaneously deteriorated.
摘要翻译：利用通过采用用于存储数字声音信号的存储装置而布置的数字声信号处理装置，用于增强声频特征的声频特征增强装置和用于改变所存储的声音的速度以便再现的低速声音再现装置这种声音作为低速进入助听器和具有声学输出的器具，由于年龄而引起的听力功能困难有助于使用诸如助听器，电视接收机和电话接收器的音频输出设备。在语音已被存储在存储装置中之后，执行用于增强频率特性以便将频率特性适应于个人听觉特性和语音再现环境的过程，并且此后表示给用户。用户可以通过使用用于控制语音再现操作的控制装置来重复监听存储在存储设备中的语音。此外，由于执行在声音再现操作期间扩展时标的处理，所以可以以低速表示声音。由于频率特性已被增强的声音可以以低速表示，以便将单独的听觉能力或装置安装在使用环境中，可以相对于这种听觉改善听觉发音，频率分辨率并且时间分辨率同时恶化。

20. 发明授权

US5794201A Digital acoustic signal processing apparatus 失效
标题翻译：数字声信号处理装置
公开(公告)号：US5794201A
公开(公告)日：1998-08-11
申请号：US462268
申请日：1995-06-05
申请人： Yoshito Nejime , Hiroshi Ikeda , Masao Hotta
发明人： Yoshito Nejime , Hiroshi Ikeda , Masao Hotta
IPC分类号： G10L21/02 , G10L21/0232 , G10L21/04 , H04R1/00 , H04R5/04 , H04R25/00 , G10L3/00 , G10L3/02 , G10L9/00
CPC分类号： H04R25/505 , G10L21/0364 , G10L21/04 , H04R1/005 , H04R5/04 , G10L21/0232 , H04R2205/041 , H04R2225/43 , H04R25/70
摘要： Making use of a digital acoustic signal processing apparatus arranged by employing memory device for storing a digital acoustic signal, acoustic frequency feature enhancing device for enhancing an acoustic frequency feature, and low-speed sound reproducing device for changing a speed of the stored voice to reproduce this voice as a low speed into a hearing aid and an appliance with an acoustic output, a hearing function difficulty due to an age is aided in utilization of audio output appliances such as a hearing aid, television receiver, and a telephone receiver. After the voice has been stored in the memory device, a process for enhancing the frequency characteristic in order to fit the frequency characteristic to the individual hearing characteristic and the voice reproducing environment is carried out and thereafter represented to the user. The user can repeatedly listen the voice stored in the memory device with employment of control device for controlling the voice reproducing operation. Furthermore, since a process for expanding a time scale during a sound reproducing operation is carried out, the voice can be represented at the low speed. Since the voice whose frequency characteristic has been enhanced can be represented at the low speed in order that either an individual hearing ability, or an apparatus is fitted to a using environment, hearing articulation can be improved with respect to such a hearing, the frequency resolution and the time resolution are simultaneously deteriorated.
摘要翻译：利用通过采用用于存储数字声音信号的存储装置而布置的数字声信号处理装置，用于增强声频特征的声频特征增强装置和用于改变所存储的声音的速度以便再现的低速声音再现装置这种声音作为低速进入助听器和具有声学输出的器具，由于年龄而引起的听力功能困难有助于使用诸如助听器，电视接收机和电话接收器的音频输出设备。在语音已被存储在存储装置中之后，执行用于增强频率特性以便将频率特性适应于个人听觉特性和语音再现环境的过程，并且此后表示给用户。用户可以通过使用用于控制语音再现操作的控制装置来重复监听存储在存储设备中的语音。此外，由于执行在声音再现操作期间扩展时标的处理，所以可以以低速表示声音。由于频率特性已被增强的声音可以以低速表示，以便将单独的听觉能力或装置安装到使用环境中，可以相对于这种听觉改善听觉发音，频率分辨率并且时间分辨率同时恶化。

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