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    • 16. 发明申请
    • METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE
    • 制造半导体器件的方法
    • US20070155109A1
    • 2007-07-05
    • US11617145
    • 2006-12-28
    • Hyun Soo Shin
    • Hyun Soo Shin
    • H01L21/336
    • H01L21/324H01L21/28035H01L21/28247H01L29/1083
    • Embodiments relate to a method for fabricating a semiconductor device. In embodiments, the method may include forming a gate insulating layer and a gate on a semiconductor substrate, performing a rapid thermal process, in which a sidewall oxidation process and a gate conductance annealing process are combined as a single process, with respect to the semiconductor substrate, forming a pocket and a source/drain extension region in the semiconductor substrate, forming a spacer on both sides of the gate, and forming a deep source/drain region in the semiconductor substrate. Because the sidewall oxidation process and the gate conductance annealing process may be combined and performed as a single process, a number of the pre-cleaning processes may be reduced from two to one, and the loading/unloading time of the semiconductor substrate may also be reduced from two to one.
    • 实施例涉及一种用于制造半导体器件的方法。 在实施例中,该方法可以包括在半导体衬底上形成栅极绝缘层和栅极,执行快速热处理,其中侧壁氧化处理和栅极电导退火处理相对于半导体被组合为单个工艺 衬底,在半导体衬底中形成凹穴和源极/漏极延伸区域,在栅极的两侧形成间隔物,并在半导体衬底中形成深的源极/漏极区域。 由于侧壁氧化处理和栅极电导退火处理可以作为单个工艺组合和执行,因此可以将许多预清洁工艺从两个减少到一个,并且半导体衬底的加载/卸载时间也可以是 从两个减少到一个。
    • 17. 发明授权
    • Data output control circuit for semiconductor memory device
    • 半导体存储器件的数据输出控制电路
    • US5896323A
    • 1999-04-20
    • US900340
    • 1997-07-25
    • Yi Hwan ParkHyun Soo Shin
    • Yi Hwan ParkHyun Soo Shin
    • G11C11/41G11C7/10G11C11/407G11C11/409G11C11/413G11C16/04
    • G11C7/1057G11C7/1051G11C7/106
    • A data output control circuit for a semiconductor memory device sequentially transmits input data via a main amplifier controlled by an address transition detecting signal, a multiplex/latch unit, a data output buffer and an output operator. The data output control circuit prevents false data output, which also improves data processing speed by using a control signal. The data output control circuit includes an output control unit that converts an address transition detecting signal into a kill signal. The kill signal is applied to the data output buffer to cause the output operator to generate a zero level signal based on the address transition detecting signal. The data output control circuit enables the output operator to generate a zero level signal by applying the kill signal to the data output buffer when the transition of an address signal is detected. Accordingly, an interval for a data reversal or a full swing is prevented to enhance data processing speed and reduce current consumption.
    • 用于半导体存储器件的数据输出控制电路通过由地址转换检测信号控制的主放大器,多路复用/锁存单元,数据输出缓冲器和输出运算器顺序发送输入数据。 数据输出控制电路防止伪数据输出,这也通过使用控制信号来提高数据处理速度。 数据输出控制电路包括将地址转换检测信号转换为停止信号的输出控制单元。 杀死信号被施加到数据输出缓冲器,以使得输出操作者基于地址转换检测信号产生零电平信号。 当检测到地址信号的转换时,数据输出控制电路使得输出操作者能够通过将数据输出缓冲器应用到数据输出缓冲器来产生零电平信号。 因此,防止数据反转或全摆动的间隔以提高数据处理速度并减少电流消耗。
    • 19. 发明授权
    • Thin film transistor and method of manufacturing the same
    • 薄膜晶体管及其制造方法
    • US07868327B2
    • 2011-01-11
    • US11508530
    • 2006-08-22
    • Jae Kyeong JeongHyun Soo ShinSe Yeoul KwonYeon Gon Mo
    • Jae Kyeong JeongHyun Soo ShinSe Yeoul KwonYeon Gon Mo
    • H01L29/04
    • H01L29/78603H01L29/66757
    • A thin film transistor (TFT) and a method of manufacturing the same, and more particularly, a TFT for reducing leakage current and a method of manufacturing the same are provided. The TFT includes a flexible substrate, a diffusion preventing layer formed on the flexible substrate, a buffer layer formed of at least two insulated materials on the diffusion preventing layer, a semiconductor layer formed on a region of the buffer layer to include a channel layer and a source and drain region, a gate insulating layer formed on the buffer layer including the semiconductor layer, a gate electrode formed on the gate insulating layer in a region corresponding to the channel layer, an interlayer insulating layer formed on the gate insulating layer including the gate electrode, and source and drain electrodes formed in the interlayer insulating layer to include a predetermined contact hole that exposes at least a region of the source and drain region and to be connected to the source and drain region.
    • 提供一种薄膜晶体管(TFT)及其制造方法,更具体地说,提供了一种用于减小漏电流的TFT及其制造方法。 TFT包括柔性基板,形成在柔性基板上的扩散防止层,由扩散防止层上的至少两个绝缘材料形成的缓冲层,形成在缓冲层的包括沟道层的区域上的半导体层,以及 源极和漏极区域,形成在包括半导体层的缓冲层上的栅极绝缘层,形成在与沟道层对应的区域中的栅极绝缘层上的栅极电极,形成在栅极绝缘层上的层间绝缘层, 栅极电极和形成在层间绝缘层中的源电极和漏电极,以包括预定的接触孔,其暴露出源极和漏极区域的至少一部分并连接到源极和漏极区域。