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11. 发明申请

US20110084603A1 INORGANIC ELECTROLUMINESCENT DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：无机电致发光器件及其制造方法
公开(公告)号：US20110084603A1
公开(公告)日：2011-04-14
申请号：US12900323
申请日：2010-10-07
申请人： Lee Mi Do , Kun Silk Park , Dong Pyo Kim , Ji Man Park , Jin Yeong Kang , Kyu Ha Baek
发明人： Lee Mi Do , Kun Silk Park , Dong Pyo Kim , Ji Man Park , Jin Yeong Kang , Kyu Ha Baek
IPC分类号： H05B33/02 , H05B33/10
CPC分类号： H05B33/14 , H05B33/10
摘要： An inorganic electroluminescent device includes: patterned metal electrodes periodically disposed at pre-set intervals; and a phosphor layer positioned on the patterned metal electrodes, wherein as a first voltage and a second voltage are alternately applied to the patterned metal electrodes according to the order of their disposition, light emitted from the phosphor layer is discharged to the spaces between the patterned metal electrodes.
摘要翻译：无机电致发光器件包括：以预定间隔周期性地设置的图案化金属电极; 以及位于所述图案化金属电极上的荧光体层，其中，根据其配置的顺序将第一电压和第二电压交替地施加到所述图案化的金属电极，从所述荧光体层发射的光被排出到所述图案化的金属电极之间的空间金属电极。

12. 发明申请

US20090146238A1 CMOS-BASED PLANAR TYPE SILICON AVALANCHE PHOTO DIODE USING SILICON EPITAXIAL LAYER AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：使用硅外延层的基于CMOS的平面型硅氧化物照相二极管及其制造方法
公开(公告)号：US20090146238A1
公开(公告)日：2009-06-11
申请号：US12195166
申请日：2008-08-20
申请人： Yong Sun Yoon , Kun Sik Park , Jong Moon Park , Bo Woo Kim , Jin Yeong Kang
发明人： Yong Sun Yoon , Kun Sik Park , Jong Moon Park , Bo Woo Kim , Jin Yeong Kang
IPC分类号： H01L31/103 , H01L31/18
CPC分类号： H01L31/107
摘要： A complementary metal-oxide semiconductor (CMOS)-based planar type avalanche photo diode (APD) using a silicon epitaxial layer and a method of manufacturing the APD, the photo diode including: a substrate; a well layer of a first conductivity type formed in the substrate; an avalanche embedded junction formed in the well layer of the first conductivity type by low energy ion implantation; the silicon epitaxial layer formed in the avalanche embedded junction; a doping area of a second conductivity type opposite to the first conductive type, formed from a portion of a surface of the well layer of the first conductivity type in the avalanche embedded junction and forming a p-n junction; positive and negative electrodes formed on the doping area of the second conductivity type and the well layer of the first conductivity type separated from the doping area of the second conductivity type, respectively; and an oxide layer formed on an overall surface excluding a window where the positive and negative electrodes are formed.
摘要翻译：使用硅外延层的基于互补金属氧化物半导体（CMOS）的平面型雪崩光电二极管（APD）和制造该APD的方法，所述光电二极管包括：衬底; 在衬底中形成的第一导电类型的阱层; 通过低能离子注入形成在第一导电类型的阱层中的雪崩嵌入结; 形成在雪崩嵌入结的硅外延层; 由所述第一导电类型的阱层的表面的一部分形成在所述雪崩嵌入结中并形成p-n结的与所述第一导电类型相反的第二导电类型的掺杂区域; 分别形成在第二导电类型的掺杂区域上的正极和负极以及从第二导电类型的掺杂区域分离的第一导电类型的阱层; 以及形成在除了形成正极和负极的窗口之外的整个表面上的氧化物层。

13. 发明申请

US20080142843A1 NMOS device, PMOS device, and SiGe HBT device formed on soi substrate and method of fabricating the same 有权
标题翻译： NMOS器件，PMOS器件和SiGe HBT器件及其制造方法
公开(公告)号：US20080142843A1
公开(公告)日：2008-06-19
申请号：US12068161
申请日：2008-02-04
申请人： Jin Yeong Kang , Scung Yun Lee , Kyoung Ik Cho
发明人： Jin Yeong Kang , Scung Yun Lee , Kyoung Ik Cho
IPC分类号： H01L27/12 , H01L29/778 , H01L21/336 , H01L21/84
CPC分类号： H01L29/66242 , H01L21/84 , H01L27/1203
摘要： Provided are an NMOS device, a PMOS device and a SiGe HBT device which are implemented on an SOI substrate and a method of fabricating the same. In manufacturing a Si-based high speed device, a SiGe HBT and a CMOS are mounted on a single SOI substrate. In particular, a source and a drain of the CMOS are formed of SiGe and metal, and thus leakage current is prevented and low power consumption is achieved. Also, heat generation in a chip is suppressed, and a wide operation range may be obtained even at a low voltage.
摘要翻译：提供了在SOI衬底上实现的NMOS器件，PMOS器件和SiGe HBT器件及其制造方法。在制造Si基高速器件时，SiGe HBT和CMOS安装在单个SOI衬底上。特别地，CMOS的源极和漏极由SiGe和金属形成，因此防止漏电流并实现低功耗。此外，芯片中的发热被抑制，即使在低电压下也可以获得宽的工作范围。

14. 发明授权

US07375504B2 Reference current generator 有权
标题翻译：参考电流发生器
公开(公告)号：US07375504B2
公开(公告)日：2008-05-20
申请号：US11299188
申请日：2005-12-09
申请人： Bong Ki Mheen , Min Hyung Cho , Chong Ki Kwon , Jin Yeong Kang
发明人： Bong Ki Mheen , Min Hyung Cho , Chong Ki Kwon , Jin Yeong Kang
IPC分类号： G05F3/16
CPC分类号： G05F3/30 , G05F3/262
摘要： Provided is a low-reference-current generator that includes a circuit employing two feedback loops enabling it to operate even at a low voltage, has a high power supply rejection ratio (PSRR) to control power supply noise, and simply forms a voltage without a voltage-to-current converter used in a conventional general reference current generator. The reference current generator includes: a first voltage generator receiving a predetermined current and generating a first voltage that decreases as temperature increases; a second voltage generator generating a second voltage that increases as temperature increases; a first current generator generating a first current corresponding to the first voltage; a second current generator generating a second current corresponding to the second voltage; and a reference current generator receiving the first current and the second current and generating a reference current that is the sum of the first current and the second current.
摘要翻译：提供了一种低参考电流发生器，其包括使用两个反馈回路的电路，使得其能够在低电压下操作，具有高电源抑制比（PSRR）以控制电源噪声，并且简单地形成不具有用于常规通用参考电流发生器的电压 - 电流转换器。参考电流发生器包括：接收预定电流并产生随温度升高而降低的第一电压的第一电压发生器; 产生随着温度升高而增加的第二电压的第二电压发生器; 产生对应于第一电压的第一电流的第一电流发生器; 产生对应于第二电压的第二电流的第二电流发生器; 以及参考电流发生器，接收第一电流和第二电流，并产生作为第一电流和第二电流之和的参考电流。

15. 发明授权

US07994553B2 CMOS-based planar type silicon avalanche photo diode using silicon epitaxial layer and method of manufacturing the same 有权
标题翻译：使用硅外延层的CMOS基平面型硅雪崩光电二极管及其制造方法
公开(公告)号：US07994553B2
公开(公告)日：2011-08-09
申请号：US12195166
申请日：2008-08-20
申请人： Yong Sun Yoon , Kun Sik Park , Jong Moon Park , Bo Woo Kim , Jin Yeong Kang
发明人： Yong Sun Yoon , Kun Sik Park , Jong Moon Park , Bo Woo Kim , Jin Yeong Kang
IPC分类号： H01L31/062
CPC分类号： H01L31/107
摘要： A complementary metal-oxide semiconductor (CMOS)-based planar type avalanche photo diode (APD) using a silicon epitaxial layer and a method of manufacturing the APD, the photo diode including: a substrate; a well layer of a first conductivity type formed in the substrate; an avalanche embedded junction formed in the well layer of the first conductivity type by low energy ion implantation; the silicon epitaxial layer formed in the avalanche embedded junction; a doping area of a second conductivity type opposite to the first conductive type, formed from a portion of a surface of the well layer of the first conductivity type in the avalanche embedded junction and forming a p-n junction; positive and negative electrodes formed on the doping area of the second conductivity type and the well layer of the first conductivity type separated from the doping area of the second conductivity type, respectively; and an oxide layer formed on an overall surface excluding a window where the positive and negative electrodes are formed.
摘要翻译：使用硅外延层的基于互补金属氧化物半导体（CMOS）的平面型雪崩光电二极管（APD）和制造该APD的方法，所述光电二极管包括：衬底; 在衬底中形成的第一导电类型的阱层; 通过低能离子注入形成在第一导电类型的阱层中的雪崩嵌入结; 形成在雪崩嵌入结的硅外延层; 由所述第一导电类型的阱层的表面的一部分形成在所述雪崩嵌入结中并形成p-n结的与所述第一导电类型相反的第二导电类型的掺杂区域; 分别形成在第二导电类型的掺杂区域上的正极和负极以及从第二导电类型的掺杂区域分离的第一导电类型的阱层; 以及形成在除了形成正极和负极的窗口之外的整个表面上的氧化物层。

16. 发明授权

US07902577B2 Image sensor having heterojunction bipolar transistor and method of fabricating the same 有权
标题翻译：具有异质结双极晶体管的图像传感器及其制造方法
公开(公告)号：US07902577B2
公开(公告)日：2011-03-08
申请号：US11872308
申请日：2007-10-15
申请人： Jin Yeong Kang , Sang Heung Lee , Jin Gun Koo
发明人： Jin Yeong Kang , Sang Heung Lee , Jin Gun Koo
IPC分类号： H01L31/11
CPC分类号： H01L27/14689 , H01L27/14609 , H01L27/14681
摘要： Provided is an image sensor having a heterojunction bipolar transistor (HBT) and a method of fabricating the same. The image sensor is fabricated by SiGe BiCMOS technology. In the image sensor, a PD employs a floating-base-type SiGe HBT. A floating base of the SiGe HBT produces a positive voltage with respect to a collector during an exposure process, and the HBT performs a reverse bipolar operation due to the positive voltage so that the collector and an emitter exchange functions. The SiGe HBT can sense an optical current signal and also amplify the optical current signal. The image sensor requires only three transistors in a pixel so that the degree of integration can increase. The image sensor has an improved sensitivity of signals in the short wavelength region and a sensing signal has excellent linearity such that both a sensing mechanism and control circuit are very simple.
摘要翻译：提供了具有异质结双极晶体管（HBT）的图像传感器及其制造方法。图像传感器由SiGe BiCMOS技术制造。在图像传感器中，PD采用浮动型SiGe HBT。 SiGe HBT的浮动基极在曝光过程中产生相对于集电极的正电压，HBT由于正电压而执行反向双极性操作，从而集电极和发射极交换功能起作用。 SiGe HBT可以感测光电流信号，并且还可以放大光电流信号。图像传感器在像素中仅需要三个晶体管，使得集成度可以增加。图像传感器在短波长区域具有改善的信号灵敏度，并且感测信号具有优异的线性度，使得感测机构和控制电路都非常简单。

17. 发明授权

US07534680B2 Bipolar transistor, BiCMOS device, and method for fabricating thereof 有权
标题翻译：双极晶体管，BiCMOS器件及其制造方法
公开(公告)号：US07534680B2
公开(公告)日：2009-05-19
申请号：US11797071
申请日：2007-04-30
申请人： Jin Yeong Kang , Seung Yun Lee , Kyoung Ik Cho
发明人： Jin Yeong Kang , Seung Yun Lee , Kyoung Ik Cho
IPC分类号： H01L21/8238
CPC分类号： H01L21/84 , H01L21/8249 , H01L27/0623 , H01L27/1203 , H01L29/7371 , H01L29/78
摘要： Provided are bipolar transistor, BiCMOS device and method of fabricating thereof, in which an existing sub-collector disposed beneath a collector of a SiGe HBT is removed and a collector plug disposed at a lateral side of the collector is approached to a base when fabricating a Si-based very high-speed device, whereby it is possible to fabricate the SiGe HBT and an SOI CMOS on a single substrate, reduce the size of the device and the number of masks to be used, and implement the device of high density, low power consumption, and wideband performance.
摘要翻译：提供了双极晶体管，BiCMOS器件及其制造方法，其中去除了设置在SiGe HBT的集电极下方的现有子集电极，并且设置在集电极的横向侧的集电极端子在制造时基于Si的非常高速的器件，由此可以在单个衬底上制造SiGe HBT和SOI CMOS，减少器件的尺寸和使用的掩模的数量，并实现高密度的器件，低功耗，宽带性能。

18. 发明授权

US07170355B2 Voltage-controlled oscillator using current feedback network 有权
标题翻译：使用电流反馈网络的压控振荡器
公开(公告)号：US07170355B2
公开(公告)日：2007-01-30
申请号：US10957749
申请日：2004-10-05
申请人： Ja Yol Lee , Sang Heung Lee , Jin Yeong Kang , Seung Hyeub Oh
发明人： Ja Yol Lee , Sang Heung Lee , Jin Yeong Kang , Seung Hyeub Oh
IPC分类号： H03B1/00
CPC分类号： H03B5/1231 , H03B5/1215 , H03B5/1221 , H03B5/1243
摘要： Provided is a voltage-controlled oscillator (VCO) using a current feedback network for use in a wireless communication terminal. The voltage-controlled oscillator has high input impedance and low output impedance, so that a degree of isolation from the external load is excellent, thereby preventing degradation of the Q-factor by the load in overall oscillation circuit. In the voltage-controlled oscillator of the present invention, an LC resonator is provided to generate positive feedback, and negative resistance may be obtained at a wider frequency range by tuning a varactor of the LC resonator. And a boosting inductor is inserted into the positive feedback loop to have a greater negative resistance, therefore it is possible to prevent a problem in which the oscillation does not occur due to the parasitic resistance components generated during circuit fabrication.
摘要翻译：提供了一种使用电流反馈网络在无线通信终端中使用的压控振荡器（VCO）。压控振荡器具有高输入阻抗和低输出阻抗，使得与外部负载的隔离度优异，从而防止整个振荡电路中的负载对Q因子的劣化。在本发明的压控振荡器中，设置LC谐振器以产生正反馈，并且通过调谐LC谐振器的变容二极管可以在更宽的频率范围内获得负电阻。并且将增压电感器插入到正反馈回路中以具有更大的负电阻，因此可以防止由于在电路制造期间产生的寄生电阻分量而不发生振荡的问题。

19. 发明授权

US06791105B2 Optoelectronic device having dual-structural nano dot and method for manufacturing the same 有权
标题翻译：具有双结构纳米点的光电器件及其制造方法
公开(公告)号：US06791105B2
公开(公告)日：2004-09-14
申请号：US10329269
申请日：2002-12-24
申请人： Kyu Hwan Shim , Young Joo Song , Sang Hoon Kim , Jin Yeong Kang
发明人： Kyu Hwan Shim , Young Joo Song , Sang Hoon Kim , Jin Yeong Kang
IPC分类号： H01L2906
CPC分类号： H01L29/127 , B82Y10/00 , B82Y20/00 , H01L31/102 , H01L33/08 , H01L33/18
摘要： An optoelectronic device and a method of manufacturing the same which the optoelectronic effect such as light emission or light reception can be increased by forming a dual-structural nano dot to enhance the confinement density of electrons and holes are provided. The optoelectronic device comprises an electron injection layer, a nano dot, and a hole injection layer. The nano dot has a dual structure composed of an external nano dot and an internal dot. The method of manufacturing the optoelectronic device comprises the steps of forming an electron injection layer on a semiconductor substrate; growing nano dot layer on the electron injection layer by an epi-growth method; heating the nano dot layer so that the nano dot has a dual structure composed of an external nano dot and an internal nano dot; and forming a hole injection layer on the overall structure.
摘要翻译：提供了通过形成双结构纳米点以增强电子和空穴的限制密度来提高光发射或光接收等光电效应的光电子器件及其制造方法。光电子器件包括电子注入层，纳米点和空穴注入层。纳米点具有由外部纳米点和内部点组成的双重结构。制造光电器件的方法包括以下步骤：在半导体衬底上形成电子注入层; 通过外延生长法在电子注入层上生长纳米点层; 加热纳米点层，使得纳米点具有由外部纳米点和内部纳米点组成的双重结构; 并在整个结构上形成空穴注入层。

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