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1. 发明授权

US07375504B2 Reference current generator 有权
标题翻译：参考电流发生器
公开(公告)号：US07375504B2
公开(公告)日：2008-05-20
申请号：US11299188
申请日：2005-12-09
申请人： Bong Ki Mheen , Min Hyung Cho , Chong Ki Kwon , Jin Yeong Kang
发明人： Bong Ki Mheen , Min Hyung Cho , Chong Ki Kwon , Jin Yeong Kang
IPC分类号： G05F3/16
CPC分类号： G05F3/30 , G05F3/262
摘要： Provided is a low-reference-current generator that includes a circuit employing two feedback loops enabling it to operate even at a low voltage, has a high power supply rejection ratio (PSRR) to control power supply noise, and simply forms a voltage without a voltage-to-current converter used in a conventional general reference current generator. The reference current generator includes: a first voltage generator receiving a predetermined current and generating a first voltage that decreases as temperature increases; a second voltage generator generating a second voltage that increases as temperature increases; a first current generator generating a first current corresponding to the first voltage; a second current generator generating a second current corresponding to the second voltage; and a reference current generator receiving the first current and the second current and generating a reference current that is the sum of the first current and the second current.
摘要翻译：提供了一种低参考电流发生器，其包括使用两个反馈回路的电路，使得其能够在低电压下操作，具有高电源抑制比（PSRR）以控制电源噪声，并且简单地形成不具有用于常规通用参考电流发生器的电压 - 电流转换器。参考电流发生器包括：接收预定电流并产生随温度升高而降低的第一电压的第一电压发生器; 产生随着温度升高而增加的第二电压的第二电压发生器; 产生对应于第一电压的第一电流的第一电流发生器; 产生对应于第二电压的第二电流的第二电流发生器; 以及参考电流发生器，接收第一电流和第二电流，并产生作为第一电流和第二电流之和的参考电流。

2. 发明授权

US07554074B2 Image sensor for low-noise voltage operation 有权
标题翻译：用于低噪声电压操作的图像传感器
公开(公告)号：US07554074B2
公开(公告)日：2009-06-30
申请号：US11866698
申请日：2007-10-03
申请人： Bong Ki Mheen , Min Hyung Cho , Mi Jin Kim , Young Joo Song
发明人： Bong Ki Mheen , Min Hyung Cho , Mi Jin Kim , Young Joo Song
IPC分类号： H03F3/08 , H01L27/00 , H04N3/14
CPC分类号： H04N5/3745 , H01L27/14603 , H01L27/14609 , H04N5/361
摘要： An image sensor operated in a pseudo pinch-off condition capable of reducing a reset voltage of a photodiode and reducing a dark current and fixed pattern noise generated due to discordance of characteristics between pixels is presented. The image sensor has a photosensitive pixel, a driving circuit and an intermediary circuit. The photosensitive pixel can have a photodiode generating a photoelectrons, a transfer transistor transferring the photoelectrons to a diffusion node, and a reset transistor resetting the diffusion node. The driving circuit generates a driving switching signal with respect to the transfer and resist transistors. The intermediary circuit changes characteristics of the signal to drive the photosensitive pixel in a pseudo pinch-off mode.
摘要翻译：提供了一种以能够减少光电二极管的复位电压并且减少由于像素之间的特性不一致而产生的暗电流和固定图案噪声的伪夹断条件操作的图像传感器。图像传感器具有光敏像素，驱动电路和中间电路。感光像素可以具有产生光电子的光电二极管，将光电子传输到扩散节点的转移晶体管以及复位扩散节点的复位晶体管。驱动电路相对于转移和抗蚀剂晶体管产生驱动切换信号。中间电路改变信号的特性以在伪夹断模式下驱动光敏像素。

3. 发明申请

US20080093534A1 Image sensor for low-noise voltage operation 有权
标题翻译：用于低噪声电压操作的图像传感器
公开(公告)号：US20080093534A1
公开(公告)日：2008-04-24
申请号：US11866698
申请日：2007-10-03
申请人： Bong Ki Mheen , Min Hyung Cho , Mi Jin Kim , Young Joo Song
发明人： Bong Ki Mheen , Min Hyung Cho , Mi Jin Kim , Young Joo Song
IPC分类号： G01J1/44
CPC分类号： H04N5/3745 , H01L27/14603 , H01L27/14609 , H04N5/361
摘要： Provided are an image sensor and a driving circuit of a transfer transistor for charge transfer in a light receiving unit realized in the image sensor, in which a pixel is insufficiently reset to be always operated in a pseudo pinch-off condition, unlike a conventional reset method in which a pixel structure of a 4-transistor CMOS image sensor or its analogue has to be depleted, thereby reducing a reset voltage of a photodiode and reducing a dark current and fixed pattern noise generated due to discordance of characteristics between pixels.The image sensor includes a conversion module for lowering a turn-on voltage of a signal or changing its waveform, a module for providing a negative voltage if necessary, and at least one module for limiting the slope of an output signal, and the characteristics of the image sensor are improved by operating the transfer transistor in the pseudo pinch-off mode.
摘要翻译：提供了一种在图像传感器中实现的光接收单元中的用于电荷转移的转移晶体管的图像传感器和驱动电路，其中像素不充分复位以始终以伪夹断状态操作，与常规复位不同必须耗尽4晶体管CMOS图像传感器或其类似物的像素结构的方法，从而减少光电二极管的复位电压并减少由于像素之间的特性不一致而产生的暗电流和固定图案噪声。图像传感器包括用于降低信号的导通电压或改变其波形的转换模块，如果需要的用于提供负电压的模块，以及用于限制输出信号的斜率的至少一个模块，以及通过在伪夹断模式中操作传输晶体管来改善图像传感器。

4. 发明申请

US20070126615A1 Multi-bit sigma-delta modulator and digital-to-analog converter with one digital-to-analog capacitor 有权
标题翻译：多位Σ-Δ调制器和具有一个数模转换器的数/模转换器
公开(公告)号：US20070126615A1
公开(公告)日：2007-06-07
申请号：US11588455
申请日：2006-10-27
申请人： Yi Gyeong Kim , Chong Ki Kwon , Jong Dae Kim , Min Hyung Cho , Seung Chul Lee , Gyu Hyun Kim
发明人： Yi Gyeong Kim , Chong Ki Kwon , Jong Dae Kim , Min Hyung Cho , Seung Chul Lee , Gyu Hyun Kim
IPC分类号： H03M1/66
CPC分类号： H03M3/352 , H03M3/424 , H03M3/464
摘要： A digital-to-analog converter (DAC) for a sigma-delta modulator is provided. The DAC has a switched capacitor structure using an operational amplifier (OP amp) and performs a function exceeding 3-level using a switching method employing only one capacitor in single ended form. Thus, DAC non-linearity caused by capacitor mismatching does not occur, and the number of output levels of the DAC is increased. Also, the DAC capacitor may be applied to a general DAC to increase the ratio of DAC output levels to capacitors.
摘要翻译：提供了一种用于Σ-Δ调制器的数模转换器（DAC）。 DAC具有使用运算放大器（OP放大器）的开关电容器结构，并且使用仅采用单端形式的一个电容器的开关方法来执行超过3电平的功能。因此，不会发生由电容器失配引起的DAC非线性，并且DAC的输出电平的数量增加。此外，DAC电容器可以被施加到通用DAC以增加DAC输出电平与电容器的比率。

5. 发明授权

US07719455B2 Dynamic element-matching method, multi-bit DAC using the method, and delta-sigma modulator and delta-sigma DAC including the multi-bit DAC 有权
标题翻译：动态元件匹配方法，使用该方法的多位DAC，以及包括多位DAC的Δ-Σ调制器和Δ-ΣDAC
公开(公告)号：US07719455B2
公开(公告)日：2010-05-18
申请号：US12195232
申请日：2008-08-20
申请人： Yi Gyeong Kim , Min Hyung Cho , Chong Ki Kwon
发明人： Yi Gyeong Kim , Min Hyung Cho , Chong Ki Kwon
IPC分类号： H03M1/66
CPC分类号： H03M1/0665 , H03M1/74 , H03M3/464 , H03M3/502
摘要： Provided are a dynamic element-matching method, a multi-bit Digital-to-Analog Converter (DAC), and a delta-sigma modulator with the multi-bit DAC and delta-sigma DAC with the multi-bit DAC. The dynamic element-matching method relates to preventing periodic signal components (in-band tones) from being generated from a delta-sigma modulator of a delta-sigma Analog-to-Digital Converter (ADC) and a multi-bit DAC used in a delta-sigma DAC. Unit elements are selected in a new sequence according to a simple algorithm every time that each of unit elements is selected once, and thus the unit elements are not periodically used. Consequently, it is possible to prevent in-band tones caused by a conventional Data Weighted Averaging (DWA) algorithm.
摘要翻译：提供了动态元件匹配方法，多位数模转换器（DAC）和具有多位DAC的多位DAC和Δ-ΣDAC的Δ-Σ调制器。动态元件匹配方法涉及防止从Δ-Σ模数转换器（ADC）的delta-sigma调制器和用于在A-Sigma模数转换器（ADC）中使用的多位DAC的周期性信号分量（带内音调） Δ-ΣDAC。每次选择一个单位元素一次时，根据简单算法以新的顺序选择单位元素，因此单位元素不被周期性地使用。因此，可以防止由传统的数据加权平均（DWA）算法引起的带内音调。

6. 发明申请

US20070126616A1 Dynamically linearized digital-to-analog converter 审中-公开
标题翻译：动态线性化数模转换器
公开(公告)号：US20070126616A1
公开(公告)日：2007-06-07
申请号：US11591740
申请日：2006-11-02
申请人： Min Hyung Cho , Chong Ki Kwon , Jong Dae Kim , Kwi Dong Kim
发明人： Min Hyung Cho , Chong Ki Kwon , Jong Dae Kim , Kwi Dong Kim
IPC分类号： H03M1/66
CPC分类号： H03M1/0673 , H03M1/742
摘要： Provided is a digital-to-analog converter converting a digital signal into an analog signal. The digital-to-analog converter includes a decoder for selecting a current source from digital inputs, a current switch driver for driving a current switch of the current source, and a random selection switch disposed between the decoder and the current switch driver, and randomly resetting a connection relationship between outputs of the decoder and inputs of the current switch driver every clock. According to the present invention, the linearity of the digital-to-analog converter may be enhanced by changing the current source selected every clock signal to compensate for non-linearity of the digital-to-analog converter according to the spatial arrangement of the current sources.
摘要翻译：提供了将数字信号转换为模拟信号的数模转换器。数模转换器包括用于从数字输入端选择电流源的解码器，用于驱动电流源的电流开关的电流开关驱动器，以及设置在解码器和电流开关驱动器之间的随机选择开关，以及随机在每个时钟复位解码器的输出和当前开关驱动器的输入之间的连接关系。根据本发明，可以通过改变每个时钟信号选择的电流源来增强数模转换器的线性度，以根据电流的空间布置补偿数模转换器的非线性来源。

7. 发明授权

US07663403B2 High-speed asynchronous digital signal level conversion circuit 失效
标题翻译：高速异步数字信号电平转换电路
公开(公告)号：US07663403B2
公开(公告)日：2010-02-16
申请号：US11943031
申请日：2007-11-20
申请人： Min Hyung Cho , Kwi Dong Kim , Chong Ki Kwon
发明人： Min Hyung Cho , Kwi Dong Kim , Chong Ki Kwon
IPC分类号： H03K19/0175
CPC分类号： H03K19/018528 , H03K19/0948
摘要： Provided is a high-speed asynchronous digital signal level conversion circuit converting an input signal of a first voltage level into a signal of a second voltage level. The conversion circuit is able to operate at high speed by connecting first and second nodes, at which the input signal of the first voltage level is converted to the signal of the second voltage level, to a second power source voltage of the second voltage level for fast voltage level conversion when the voltage level of the input signal is changed.
摘要翻译：提供了将第一电压电平的输入信号转换为第二电压电平的信号的高速异步数字信号电平转换电路。转换电路能够通过将第一和第二节点（第一电压电平的输入信号被转换为第二电压电平的信号）连接到第二电压电平的第二电源电压，当输入信号的电压电平改变时，进行快速电压电平转换。

8. 发明申请

US20090121909A1 DYNAMIC ELEMENT-MATCHING METHOD, MULTI-BIT DAC USING THE METHOD, AND DELTA-SIGMA MODULATOR AND DELTA-SIGMA DAC INCLUDING THE MULTI-BIT DAC 有权
标题翻译：使用该方法的动态元件匹配方法，多位DAC，以及包括多位DAC的DELTA-SIGMA调制器和DELTA-SIGMA DAC
公开(公告)号：US20090121909A1
公开(公告)日：2009-05-14
申请号：US12195232
申请日：2008-08-20
申请人： Yi Gyeong KIM , Min Hyung Cho , Chong Ki Kwon
发明人： Yi Gyeong KIM , Min Hyung Cho , Chong Ki Kwon
IPC分类号： H03M3/00 , H03M1/66 , H03M1/80
CPC分类号： H03M1/0665 , H03M1/74 , H03M3/464 , H03M3/502
摘要： Provided are a dynamic element-matching method, a multi-bit Digital-to-Analog Converter (DAC), and a delta-sigma modulator with the multi-bit DAC and delta-sigma DAC with the multi-bit DAC. The dynamic element-matching method relates to preventing periodic signal components (in-band tones) from being generated from a delta-sigma modulator of a delta-sigma Analog-to-Digital Converter (ADC) and a multi-bit DAC used in a delta-sigma DAC. Unit elements are selected in a new sequence according to a simple algorithm every time that each of unit elements is selected once, and thus the unit elements are not periodically used. Consequently, it is possible to prevent in-band tones caused by a conventional Data Weighted Averaging (DWA) algorithm.
摘要翻译：提供了动态元件匹配方法，多位数模转换器（DAC）和具有多位DAC的多位DAC和Δ-ΣDAC的Δ-Σ调制器。动态元件匹配方法涉及防止从Δ-Σ模数转换器（ADC）的delta-sigma调制器和用于在A-Sigma模数转换器（ADC）中使用的多位DAC的周期性信号分量（带内音调） Δ-ΣDAC。每次选择一个单位元素一次时，根据简单算法以新的顺序选择单位元素，因此单位元素不被周期性地使用。因此，可以防止由传统的数据加权平均（DWA）算法引起的带内音调。

9. 发明授权

US07388533B2 Multi-bit sigma-delta modulator and digital-to-analog converter with one digital-to-analog capacitor 有权
标题翻译：多位Σ-Δ调制器和具有一个数模转换器的数/模转换器
公开(公告)号：US07388533B2
公开(公告)日：2008-06-17
申请号：US11588455
申请日：2006-10-27
申请人： Yi Gyeong Kim , Chong Ki Kwon , Jong Dae Kim , Min Hyung Cho , Seung Chul Lee , Gyu Hyun Kim
发明人： Yi Gyeong Kim , Chong Ki Kwon , Jong Dae Kim , Min Hyung Cho , Seung Chul Lee , Gyu Hyun Kim
IPC分类号： H03M1/82 , H03M3/00
CPC分类号： H03M3/352 , H03M3/424 , H03M3/464
摘要： A digital-to-analog converter (DAC) for a sigma-delta modulator is provided. The DAC has a switched capacitor structure using an operational amplifier (OP amp) and performs a function exceeding 3-level using a switching method employing only one capacitor in single ended form. Thus, DAC non-linearity caused by capacitor mismatching does not occur, and the number of output levels of the DAC is increased. Also, the DAC capacitor may be applied to a general DAC to increase the ratio of DAC output levels to capacitors.
摘要翻译：提供了一种用于Σ-Δ调制器的数模转换器（DAC）。 DAC具有使用运算放大器（OP放大器）的开关电容器结构，并且使用仅采用单端形式的一个电容器的开关方法来执行超过3电平的功能。因此，不会发生由电容器失配引起的DAC非线性，并且DAC的输出电平的数量增加。此外，DAC电容器可以被施加到通用DAC以增加DAC输出电平与电容器的比率。

10. 发明申请

US20100156686A1 PULSE GENERATOR AND CONTINUOUS-TIME SIGMA-DELTA MODULATOR 有权
标题翻译：脉冲发生器和连续时间信号调制器
公开(公告)号：US20100156686A1
公开(公告)日：2010-06-24
申请号：US12509152
申请日：2009-07-24
申请人： Yi Gyeong KIM , Min Hyung Cho , Jong Kee Kwon
发明人： Yi Gyeong KIM , Min Hyung Cho , Jong Kee Kwon
IPC分类号： H03M3/02
CPC分类号： H03M3/372 , H03K3/3565 , H03M3/43 , H03M3/454
摘要： Provided is a clock generator employed in a continuous-time sigma-delta modulator. The clock generator includes an oscillator configured to generate pulses in response to an enable signal, a counter configured to count the number of pulses generated by the oscillator and output the total pulse count, and an output circuit configured to output an inactivated output signal if the pulse count of the counter is equal to a pulse-width control bit. The oscillator includes an astable multi-vibrator. Since the astable multi-vibrator capable of generating a low-jitter pulse from a jittered clock is used as the oscillator, a signal-to-noise ratio is improved. A simple configuration using only digital circuits makes it easier to design a circuit and adjust pulse width. Moreover, according to the structure of the astable multi-vibrator, it is possible to design a circuit to optimally modulate pulse width in connection with process variations of resistors and capacitors used in the continuous-time sigma-delta modulator.
摘要翻译：提供了一种在连续时间Σ-Δ调制器中使用的时钟发生器。所述时钟发生器包括被配置为响应于使能信号产生脉冲的振荡器，被配置为对所述振荡器产生的脉冲数进行计数并输出所述总脉冲计数的计数器;以及输出电路，其配置为：如果计数器的脉冲计数等于脉冲宽度控制位。该振荡器包括一个不稳定的多重振动器。由于能够从抖动时钟产生低抖动脉冲的不稳定的多重振动器被用作振荡器，所以提高了信噪比。仅使用数字电路的简单配置使得更容易设计电路并调整脉冲宽度。此外，根据不稳定的多振子的结构，可以设计电路，以便在连续时间Σ-Δ调制器中使用的电阻器和电容器的工艺变化方面最佳地调制脉冲宽度。

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