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11. 发明申请

US20090076778A1 SYSTEM AND METHOD FOR DESIGNING A VOLTAGE REGULATOR MODULE 有权
标题翻译：用于设计电压调节器模块的系统和方法
公开(公告)号：US20090076778A1
公开(公告)日：2009-03-19
申请号：US12172258
申请日：2008-07-13
申请人： SHOU-KUO HSU , YING-TSO LAI , DUEN-YI HO
发明人： SHOU-KUO HSU , YING-TSO LAI , DUEN-YI HO
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： A computer-implemented method for designing a voltage regulator module (VRM) is disclosed. The method includes receiving design parameters and a component data for each component and storing the design parameters and the component data for each component into a component selection table, calculating a work efficiency of the VRM, and storing the work efficiency into a power computation table. The method further includes simulating a derating of each component according to a corresponding rated stress of each component if the work efficiency is greater than or equal to a predetermined work efficiency, calculating a stress ratio of each component, and storing the stress ratio into a component derating table. The component selection table, the power computation table and the component derating table are stored to form a desired VRM model if the stress ratio of each component meets a corresponding derating specification.
摘要翻译：公开了一种用于设计电压调节器模块（VRM）的计算机实现的方法。该方法包括接收每个组件的设计参数和组件数据，并将每个组件的设计参数和组件数据存储到组件选择表中，计算VRM的工作效率，并将工作效率存储在功率计算表中。该方法还包括如果工作效率大于或等于预定工作效率，则计算每个部件的应力比，并将应力比存储到部件中，根据每个部件的相应的额定应力来模拟每个部件的降额降额表。存储组件选择表，功率计算表和组件降额表，以形成所需的VRM模型，如果每个组件的应力比满足相应的降额规范。

12. 发明申请

US20090046418A1 MOTHERBOARD FOR SUPPORTING DIFFERENT TYPES OF MEMORIES 失效
标题翻译：支持不同类型的记忆的主板
公开(公告)号：US20090046418A1
公开(公告)日：2009-02-19
申请号：US11952139
申请日：2007-12-07
申请人： CHUN-SHENG CHEN , SHOU-KUO HSU , CHENG-SHIEN LI , DUEN-YI HO , YU-CHANG PAI
发明人： CHUN-SHENG CHEN , SHOU-KUO HSU , CHENG-SHIEN LI , DUEN-YI HO , YU-CHANG PAI
IPC分类号： G06F1/16 , H05K1/18
CPC分类号： H05K1/0295 , H05K1/0262 , H05K1/14 , H05K2201/044 , H05K2201/09954 , H05K2201/10159
摘要： An exemplary motherboard includes a first slot arranged for mounting a first type of memory, a second slot arranged for mounting a second type of memory, and a voltage regulator electronically connected to the first slot and the second slot. The first memory and the second memory are alternatively mounted on the motherboard, the voltage regulator detects which type memory is currently mounted on the motherboard and outputs voltages suitable for the type of the memory mounted on the motherboard accordingly.
摘要翻译：示例性母板包括布置用于安装第一类型存储器的第一槽，布置用于安装第二类型存储器的第二槽和电连接到第一槽和第二槽的电压调节器。第一存储器和第二存储器替代地安装在母板上，电压调节器检测当前安装在母板上的哪种类型的存储器，并相应地输出适合安装在母板上的存储器类型的电压。

13. 发明申请

US20080259553A1 MOTHERBOARD 有权
标题翻译：母板
公开(公告)号：US20080259553A1
公开(公告)日：2008-10-23
申请号：US11766105
申请日：2007-06-21
申请人： SHOU-KUO HSU , DUEN-YI HO , CHENG-SHIEN LI
发明人： SHOU-KUO HSU , DUEN-YI HO , CHENG-SHIEN LI
IPC分类号： H05K7/00
CPC分类号： G06F1/26
摘要： An exemplary motherboard includes a first slot arranged for mounting a first type of memory, a second slot arranged for mounting a second type of memory, a voltage regulator electronically connected to the first slot and the second slot, and a serial presence detect (SPD) unit connected to the voltage regulator. The first memory and the second memory alternatively mounted on the motherboard, the SPD detects which type of memory is mounted on the motherboard, and the voltage regulator outputs voltages suitable for the type of the memory mounted on the motherboard according to a detection result of the SPD.
摘要翻译：示例性主板包括布置用于安装第一类型存储器的第一槽，布置用于安装第二类型存储器的第二槽，电连接到第一槽和第二槽的电压调节器，以及串联存在检测（SPD）单元连接到电压调节器。第一存储器和第二存储器交替地安装在母板上，SPD检测在主板上安装哪种类型的存储器，并且电压调节器根据检测结果输出适合安装在母板上的存储器类型的电压 SPD。

14. 发明申请

US20130016466A1 MOTHERBOARD CAPABLE OF REDUCING ELECTROMAGNETIC INTERFERENCE 失效
标题翻译：能减少电磁干扰的主轴
公开(公告)号：US20130016466A1
公开(公告)日：2013-01-17
申请号：US13275329
申请日：2011-10-18
申请人： SHIN-TING YEN , YUNG-CHIEH CHEN , DUEN-YI HO
发明人： SHIN-TING YEN , YUNG-CHIEH CHEN , DUEN-YI HO
IPC分类号： G06F1/16
CPC分类号： H05K1/0216 , H05K1/0296 , H05K1/113 , H05K2201/10159 , H05K2201/10189 , H05K2201/10522
摘要： A motherboard includes a printed circuit board (PCB), a central processing unit (CPU), a regulator, a first memory adaptor, and a second memory adaptor. The PCB includes a top surface, a bottom surface, a plurality of first soldering pads and first leads arranged on the top surface, and a plurality of second leads arranged between the top surface and the bottom surface. The PCB defines a plurality of first vias, second vias, and power vias. The CPU is connected to the first vias. The voltage regulator is connected to the power vias. The first memory adaptor neighbors to the regulator and is surface-mount soldered to the first soldering pads. The first soldering pads are connected to the first vias by first leads. The second memory adaptor is soldered to the second vias. The second vias are connected to the first vias by the second leads.
摘要翻译：主板包括印刷电路板（PCB），中央处理单元（CPU），调节器，第一存储器适配器和第二存储器适配器。 PCB包括顶表面，底表面，多个第一焊盘和布置在顶表面上的第一引线，以及布置在顶表面和底表面之间的多个第二引线。 PCB限定多个第一通孔，第二通孔和电源通孔。 CPU连接到第一个通孔。电压调节器连接到电源通孔。第一个存储器适配器与调节器相邻，并且表面安装焊接到第一个焊盘。第一焊盘通过第一引线连接到第一通孔。第二个存储器适配器焊接到第二个通孔。第二通孔通过第二引线连接到第一通孔。

15. 发明申请

US20120268086A1 POWER SUPPLY DEVICE 失效
标题翻译：电源设备
公开(公告)号：US20120268086A1
公开(公告)日：2012-10-25
申请号：US13340707
申请日：2011-12-30
申请人： WEI-CHIEH CHOU , DUEN-YI HO , CHUN-JEN CHEN , TSUNG-SHENG HUANG
发明人： WEI-CHIEH CHOU , DUEN-YI HO , CHUN-JEN CHEN , TSUNG-SHENG HUANG
IPC分类号： G05F1/12 , H03F3/45
CPC分类号： H02M3/33523 , H02M2001/0003
摘要： A power supply device includes a power supply unit and a feedback control unit. The power supply unit is configured for generating an electric potential to be provided to a load. The feedback control unit detects the electric potential and adjusts relevant parameters of the electrical potential to achieve predetermined values. The feedback control unit includes a first feedback circuit and a second feedback circuit electrically connected in series.
摘要翻译：电源装置包括电源单元和反馈控制单元。电源单元被配置为产生要提供给负载的电位。反馈控制单元检测电位并调整电位的相关参数以实现预定值。反馈控制单元包括串联电连接的第一反馈电路和第二反馈电路。

16. 发明申请

US20110238233A1 SYSTEM AND METHOD FOR OPTIMIZING CURRENT OVERLOAD PROTECTION CIRCUIT 失效
标题翻译：用于优化电流过载保护电路的系统和方法
公开(公告)号：US20110238233A1
公开(公告)日：2011-09-29
申请号：US12774685
申请日：2010-05-05
申请人： TSUNG-SHENG HUANG , CHUN-JEN CHEN , DUEN-YI HO , WEI-CHIEH CHOU
发明人： TSUNG-SHENG HUANG , CHUN-JEN CHEN , DUEN-YI HO , WEI-CHIEH CHOU
IPC分类号： G06F19/00
CPC分类号： G06F17/5063
摘要： A system for optimizing a current overload protection circuit includes an input device, a data storage device, a central processing device, and a display. The central processing device includes a storage module, a control module, and a calculation module. The storage module stores a VI application therein. The control module receives instructions from the input device and selects virtual electronic components of the current overload protection circuit from the data storage device and connection of the selected electronic components. The current overload protection circuit is completed and run in the VI application; electronic components significantly affecting the maximum protection current are labeled. The calculation module calculates normal distribution samples of the current overload protection circuit based on the labeled electronic components. The display shows whether the current overload protection circuit meets a process capability standard.
摘要翻译：用于优化电流过载保护电路的系统包括输入装置，数据存储装置，中央处理装置和显示器。中央处理装置包括存储模块，控制模块和计算模块。存储模块在其中存储VI应用。控制模块从输入设备接收指令，并从数据存储设备中选择电流过载保护电路的虚拟电子部件，并选择电子部件的连接。电流过载保护电路在VI应用中完成并运行; 显着影响最大保护电流的电子元件被标记。计算模块基于标记的电子元件计算电流过载保护电路的正态分布样本。显示屏显示电流过载保护电路是否符合过程能力标准。

17. 发明申请

US20120140426A1 PRINTED CIRCUIT BOARD 审中-公开
标题翻译：印刷电路板
公开(公告)号：US20120140426A1
公开(公告)日：2012-06-07
申请号：US12978599
申请日：2010-12-26
申请人： DUEN-YI HO , YUNG-CHIEH CHEN
发明人： DUEN-YI HO , YUNG-CHIEH CHEN
IPC分类号： H05K7/06
CPC分类号： H05K1/0243 , G06K19/077 , G11C5/025 , G11C5/04 , G11C5/063 , H05K1/181 , H05K2201/09227 , H05K2201/10159
摘要： A printed circuit board includes a top layer. A memory controller, a first dual-channel architecture, and a second dual-channel architecture are located on the top layer. A distance between the memory modules of the first dual-channel architecture and the memory controller is equal to a distance between the memory modules of the second dual-channel architecture and the memory controller.
摘要翻译：印刷电路板包括顶层。存储器控制器，第一双通道架构和第二双通道架构位于顶层上。第一双通道架构的存储器模块与存储器控制器之间的距离等于第二双通道架构的存储器模块与存储器控制器之间的距离。

18. 发明申请

US20130284508A1 PRINTED CIRCUIT BOARD 审中-公开
标题翻译：印刷电路板
公开(公告)号：US20130284508A1
公开(公告)日：2013-10-31
申请号：US13563856
申请日：2012-08-01
申请人： WEI-CHIEH CHOU , CHUN-JEN CHEN , DUEN-YI HO , TSUNG-SHENG HUANG , PO-CHUAN HSIEH , CHUN-NENG LIAO
发明人： WEI-CHIEH CHOU , CHUN-JEN CHEN , DUEN-YI HO , TSUNG-SHENG HUANG , PO-CHUAN HSIEH , CHUN-NENG LIAO
IPC分类号： H05K1/11
CPC分类号： H05K1/0216 , H05K2201/09618
摘要： A printed circuit board (PCB) includes a power layer and a signal layer. A signal line is arranged on the signal layer. A power via extends through the power layer and the signal layer, and is electrically connected to the power layer and the signal layer. A number of through holes is defined in the PCB, through the power layer and the signal layer, and arranged between the signal line and the power via. The through holes are insulated from the power via. The inside wall of the power via is made of conductive material.
摘要翻译：印刷电路板（PCB）包括功率层和信号层。信号线布置在信号层上。功率通孔延伸通过功率层和信号层，并且电连接到功率层和信号层。在PCB中通过功率层和信号层定义了多个通孔，并布置在信号线和电源通孔之间。通孔与电源通孔绝缘。电源通孔的内壁由导电材料制成。

19. 发明申请

US20120261175A1 PRINTED CIRCUIT BOARD 审中-公开
标题翻译：印刷电路板
公开(公告)号：US20120261175A1
公开(公告)日：2012-10-18
申请号：US13156348
申请日：2011-06-09
申请人： TSUNG-SHENG HUANG , CHUN-JEN CHEN , DUEN-YI HO , WEI-CHIEH CHOU
发明人： TSUNG-SHENG HUANG , CHUN-JEN CHEN , DUEN-YI HO , WEI-CHIEH CHOU
IPC分类号： H05K1/11
CPC分类号： H05K1/0265 , H05K1/117 , H05K2201/0784 , H05K2201/09972
摘要： A printed circuit board includes a first circuit area, a second circuit area, a plurality of connectors, and a connecting terminal. The first circuit area is electrically connected to the second circuit area via the connectors. The connecting terminal is placed on one side of the first circuit area for electrically connecting with a load. An imaginary center line of the connecting terminal is perpendicular to the one side of the printed circuit board. The less a horizontal distance between the center line of connecting terminal and one of the connectors, the larger a vertical distance between the side of the printed circuit board and the one of the connector.
摘要翻译：印刷电路板包括第一电路区域，第二电路区域，多个连接器以及连接端子。第一电路区域经由连接器电连接到第二电路区域。连接端子位于第一电路区域的一侧，用于与负载电连接。连接端子的假想中心线垂直于印刷电路板的一侧。连接端子的中心线与其中一个连接器之间的水平距离越小，印刷电路板的侧面和连接器中的一个之间的垂直距离越大。

20. 发明申请

US20120243194A1 PRINTED CIRCUIT BOARD 失效
标题翻译：印刷电路板
公开(公告)号：US20120243194A1
公开(公告)日：2012-09-27
申请号：US13087488
申请日：2011-04-15
申请人： TSUNG-SHENG HUANG , CHUN-JEN CHEN , DUEN-YI HO , WEI-CHIEH CHOU
发明人： TSUNG-SHENG HUANG , CHUN-JEN CHEN , DUEN-YI HO , WEI-CHIEH CHOU
IPC分类号： H05K1/18
CPC分类号： H05K7/00 , H05K1/0201 , H05K1/0265 , H05K2201/093 , H05K2201/09309 , H05K2201/0979
摘要： A printed circuit board includes a top layer and a bottom layer. A power supply and an electronic component are located on the top layer. The power supply is connected to the top layer and the bottom layer through a first via. A number of second vias extends through the top layer and the bottom layer, and is electrically connected to the top layer and the bottom layer. A right-angled triangular void area without vias defined therein is formed on the printed circuit board, between the second vias and the electronic component. The second vias are arranged on a hypotenuse of the void area.
摘要翻译：印刷电路板包括顶层和底层。电源和电子元件位于顶层。电源通过第一通孔连接到顶层和底层。多个第二通孔延伸穿过顶层和底层，并且电连接到顶层和底层。在印刷电路板上，在第二通孔和电子部件之间形成没有限定在其中的通孔的直角三角形空隙区域。第二个通孔布置在空隙区域的斜边上。

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