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    • 11. 发明授权
    • Reconfigurable processor for executing successive function sequences in
a processor operation
    • 可重构处理器,用于在处理器操作中执行连续的功能序列
    • US6067615A
    • 2000-05-23
    • US556438
    • 1995-11-09
    • Eric L. Upton
    • Eric L. Upton
    • G06F15/78G06F15/00
    • G06F15/7867Y02B60/1207Y02B60/1225
    • A digital processor with reconfigurable architecture includes a processor input and a processor output. A library stores a plurality of related function sequences for executing a processor operation. Memory stores data as required by the function sequences. A configurable device is connected to the library and the memory and between the processor input and the processor output. The configurable device sequentially stores the function sequences from the library in a plurality of programmable gate arrays configurable by the function sequences. The configurable device reconfigures the programmable gate arrays with another of the function sequences to complete the processor operation.
    • 具有可重构架构的数字处理器包括处理器输入和处理器输出。 库存储用于执行处理器操作的多个相关功能序列。 内存根据功能序列的要求存储数据。 可配置的设备连接到库和存储器以及处理器输入和处理器输出之间。 可配置设备顺序地将来自库的功能序列存储在可由功能序列配置的多个可编程门阵列中。 可配置设备用另一个功能序列重新配置可编程门阵列,以完成处理器的操作。
    • 12. 发明授权
    • Geolocation method and apparatus for satellite based telecommunications
system
    • 用于卫星电信系统的地理位置方法和装置
    • US6020847A
    • 2000-02-01
    • US638066
    • 1996-04-25
    • Eric L. UptonScott A. Stephens
    • Eric L. UptonScott A. Stephens
    • G01S5/12G01S19/00G01S19/25H04B7/185H04Q7/34G01S5/02
    • G01S19/00G01S5/12H04B7/1855
    • A method for determining the geolocation of a user terminal within a telecommunications system having a constellation of satellites which relay communications signals between earth stations and user terminals over preassigned channels. The method performs synchronization upon the telecommunications signals to calculate timing and frequency update information for the user terminals. The timing and frequency update information is also used within the earth station to calculate the geoposition of the user terminal. To do so, the earth station calculates a distance between the satellite and a user terminal based on the corresponding propagation time therebetween which is obtained from the timing information. Once the satellite to user terminal distance is obtained, a range solution line may be calculated therefrom. In addition, the frequency update information is used to calculate a Doppler solution line upon which the user terminal is positioned. Thereafter, the range and Doppler solution lines are combined to obtain points of intersection therebetween. These points of intersection represent potential geolocations of the user terminal. The earth station discriminates between these intersection points in one of several manners, such as the coverage beam spot or geographic cell assigned to the user terminal. Upon obtaining a single intersection point, the longitude and latitude of this point or output is the geolocation of the user terminal.
    • 一种用于确定具有卫星星座的电信系统中的用户终端的地理定位的方法,其通过预先指派的信道来中继地球站和用户终端之间的通信信号。 该方法对电信信号执行同步,以计算用户终端的定时和频率更新信息。 定时和频率更新信息也在地球站内使用,以计算用户终端的地理位置。 为了这样做,地球站基于从定时信息获得的相应的传播时间来计算卫星和用户终端之间的距离。 一旦获得卫星到用户终端距离,可以从其计算范围解决线。 此外,频率更新信息用于计算用户终端所在的多普勒解决线。 此后,组合范围和多普勒溶液线以获得它们之间的交点。 这些交叉点代表用户终端的潜在地理位置。 地球站以几种方式之一区分这些交点,例如分配给用户终端的覆盖波束点或地理小区。 在获得单个交叉点时,该点或输出的经度和纬度是用户终端的地理位置。
    • 13. 发明授权
    • Adaptive equalizer matched filter error metric concept and apparatus
    • 自适应均衡器匹配滤波器误差度量概念和装置
    • US07283586B2
    • 2007-10-16
    • US10430766
    • 2003-05-06
    • Eric L. Upton
    • Eric L. Upton
    • H03H7/30H03H7/40H03K5/159
    • H04L25/03019H04L2025/03617
    • A correlative error detection system (60) for a signal equalizer (10) that corrects a distorted communications signal. The detection system (60) correlates a sequence of bits in a signal from an FFE and/or a DFE processor (12, 14) with a predetermined sequence of correlation values. The detection system (60) includes a summing network (66) that sums the correlated signals. If the sequence of signal bits matches the sequence of correlation values, then the summed correlated signal will include a signal maxima. A peak detector (76) detects and holds the signal maxima so that a slow speed weight computer (40) can process the signal values to set weight values in the processors (12, 14). By knowing how often the sequence of bits that match the correlative values should occur in a random bit stream for an undistorted signal, the weight computer (40) can set the weight values to provide that magnitude of the bit sequence.
    • 一种用于校正失真通信信号的信号均衡器(10)的相关误差检测系统(60)。 检测系统(60)将来自FFE和/或DFE处理器(12,14)的信号中的比特序列与预定的相关值序列相关联。 检测系统(60)包括对相关信号求和的求和网络(66)。 如果信号比特序列与相关值序列匹配,则相加的相关信号将包括信号最大值。 峰值检测器(76)检测和保持信号最大值,使得慢速权重计算机(40)可以处理信号值以设置处理器(12,14)中的权重值。 通过知道匹配相关值的比特序列应该在用于未失真信号的随机比特流中出现,权重计算机(40)可以设置加权值以提供比特序列的大小。
    • 14. 发明授权
    • Multiple degree of freedom bimorph positioner and controller
    • 多自由度双压电晶片定位器和控制器
    • US06748177B1
    • 2004-06-08
    • US09849179
    • 2001-05-04
    • Eric L. Upton
    • Eric L. Upton
    • H04B1000
    • H04B10/112H01L41/0953H01L41/0966
    • An apparatus for positioning an end effector and associated position controller. The apparatus comprises a plurality of bimorph members, generally elongated in shape, that are coupled end-to-end. In one embodiment, each bimorph member includes a pair of elongated piezoelectric bimorph elements that cause a localized deformation in the bimorph member when driven with an input voltage. Accordingly, each bimorph member can be caused to bend in opposite directions, as well as twist, depending on its drive voltages. In one configuration, four bimorph members are connected end-to-end, with the last bimorph member operatively coupled to the end effector, providing a five-degree of freedom positioner. A multi-channel position controller that provides a pair of correlative feedback loops for each channel is used to generate appropriate drive voltages based on a global feedback signal and a local feedback signal corresponding to a measured position of each channel's corresponding piezoelectric bimorph element.
    • 一种用于定位末端执行器和相关位置控制器的装置。 该装置包括端对端地连接的多个通常为细长形状的双压电体部件。 在一个实施例中,每个双压电晶片构件包括一对细长的压电双晶片元件,其在用输入电压驱动时引起双压电晶片构件中的局部变形。 因此,根据其驱动电压,可以使各双压电元件在相反方向上弯曲以及扭转。 在一种配置中,四个双压电体构件端对端连接,最后的双压电体构件可操作地联接到末端执行器,提供五自由度定位器。 用于为每个通道提供一对相关反馈回路的多通道位置控制器用于基于对应于每个通道对应的压电双晶片元件的测量位置的全局反馈信号和局部反馈信号来产生适当的驱动电压。
    • 17. 发明授权
    • Fingerprint detector using ridge resistance sensor
    • 指纹检测仪采用棱纹电阻传感器
    • US5864296A
    • 1999-01-26
    • US858836
    • 1997-05-19
    • Eric L. Upton
    • Eric L. Upton
    • A61B5/117G06K9/00G06T1/00G06T7/00G07C9/00H04Q1/00
    • G06K9/00026G06K9/0002G07C9/00087G07C2009/00095
    • A technique for detecting and verifying a fingerprint includes a skin resistance sensing array for translating the skin resistance of a fingertip into an electrical signal. The fingertip is moved relative to the skin resistance sensing array in a first linear direction for producing a reference trajectory signal which is stored into a memory. The fingertip is again moved relative to the skin resistance sensing array in a second linear direction for producing a sample trajectory signal. The second linear direction of movement is offset from the first linear direction of movement by a predetermined angle. A processor is provided for performing a set of functions on the reference trajectory signal and the sample trajectory signal. The sample trajectory signal is correlated with the reference trajectory signal for producing a verification signal related to the probability that the fingertip generated both the sample trajectory signal and the reference trajectory signal.
    • 用于检测和验证指纹的技术包括用于将指尖的皮肤电阻转换为电信号的皮肤电阻感测阵列。 指尖相对于皮肤电阻感测阵列沿第一线性方向移动,用于产生存储在存储器中的参考轨迹信号。 指尖在第二线性方向上相对于皮肤电阻感测阵列再次移动,以产生样本轨迹信号。 第二线性移动方向与第一线性移动方向偏移预定角度。 提供处理器,用于对参考轨迹信号和样本轨迹信号执行一组功能。 样本轨迹信号与参考轨迹信号相关,用于产生与指尖产生样本轨迹信号和参考轨迹信号的概率相关的验证信号。
    • 19. 发明授权
    • Modular high-capacity solid-state mass data storage device including
controller/memory modules arranged in parallel channels
    • 模块化大容量固体大容量数据存储装置,其包括以并行通道排列的控制器/存储器模块
    • US5471603A
    • 1995-11-28
    • US963192
    • 1992-10-19
    • Timothy A. YokoteEric L. UptonArthur G. EnyedyGrant J. StocktonDirk K. Brandis
    • Timothy A. YokoteEric L. UptonArthur G. EnyedyGrant J. StocktonDirk K. Brandis
    • B64D47/00G06F11/00G06F11/10G06F11/16G06F11/20G06F12/16G06F13/00G06F13/12
    • G11C5/02G11C5/04
    • A modular solid-state mass data storage device providing high-density, high-capacity storage of data employs a modular pipeline architecture in which a distributed array of controller/memory modules is arranged in parallel controller/memory channels on one or more controller/memory cards, each controller/memory channel having first and last controller/memory modules. The modular storage device also includes a data format module, and first and second busses connecting outputs of the data format module to inputs of each of the first and last controller/memory modules. The first bus also connects outputs of the last controller/memory module in each channel back to an input of the data format modules. The modular pipeline architecture allows the number of controller/memory modules in each channel to be easily configured to accommodate any required storage size, while the number of controller/memory channels can be configured to accommodate any required storage size and transfer rate, without increasing latency time. The modular pipeline architecture also greatly simplifies the complexity of the memory controllers, and high-density packaging of the controller/memory modules provides compact storage for large amounts of data. The mass data storage device may be used as a random access memory (RAM) disk or for any other application requiring high-density, high-capacity mass data storage devices.
    • 提供高密度,大容量数据存储的模块化固态大容量数据存储设备采用模块化流水线架构,其中控制器/存储器模块的分布式阵列被布置在一个或多个控制器/存储器上的并行控制器/存储器通道中 卡,每个控制器/存储器通道具有第一和最后一个控制器/存储器模块。 模块化存储设备还包括数据格式模块,以及将数据格式模块的输出连接到第一和最后一个控制器/存储器模块中的每一个的输入的第一和第二总线。 第一个总线还将每个通道中的最后一个控制器/存储器模块的输出连接回数据格式模块的输入。 模块化流水线架构允许每个通道中的控制器/内存模块的数量容易配置,以适应任何所需的存储大小,而控制器/内存通道的数量可以配置为适应任何所需的存储大小和传输速率,而不会增加延迟 时间。 模块化管道架构还大大简化了存储器控制器的复杂性,并且控制器/存储器模块的高密度封装为大量数据提供了紧凑的存储。 大容量数据存储设备可以用作随机存取存储器(RAM)盘或用于需要高密度,大容量大容量数据存储设备的任何其它应用。