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11. 发明授权

US10032878B2 Semiconductor device with a semiconductor via and laterally connected electrode 有权
公开(公告)号：US10032878B2
公开(公告)日：2018-07-24
申请号：US13241771
申请日：2011-09-23
申请人： Andreas Peter Meiser , Markus Zundel
发明人： Andreas Peter Meiser , Markus Zundel
IPC分类号： H01L29/66 , H01L29/423 , H01L23/48 , H01L21/768 , H01L21/74 , H01L29/739 , H01L29/78 , H01L29/40
摘要： A semiconductor device includes a semiconductor body having a first surface and a second surface, at least one electrode arranged in at least one trench extending from the first surface into the semiconductor body, and a semiconductor via extending in a vertical direction of the semiconductor body within the semiconductor body to the second surface. The semiconductor via is electrically insulated from the semiconductor body by a via insulation layer. The at least one electrode extends in a first lateral direction of the semiconductor body through the via insulation layer and is electrically connected to the semiconductor via.

12. 发明申请

US20130099308A1 Semiconductor Device Having a Through Contact and a Manufacturing Method Therefor 有权
标题翻译：具有直接接触的半导体器件及其制造方法
公开(公告)号：US20130099308A1
公开(公告)日：2013-04-25
申请号：US13279846
申请日：2011-10-24
申请人： Hermann Gruber , Thomas Gross , Andreas Peter Meiser , Markus Zundel
发明人： Hermann Gruber , Thomas Gross , Andreas Peter Meiser , Markus Zundel
IPC分类号： H01L29/78 , H01L21/50 , H01L21/78
CPC分类号： H01L23/481 , H01L21/6835 , H01L21/76224 , H01L21/76898 , H01L2221/68327 , H01L2221/6834 , H01L2924/0002 , H01L2924/00
摘要： According to an embodiment, a method of forming a semiconductor device includes: providing a wafer having a semiconductor substrate with a first side a second side opposite the first side, and a dielectric region arranged on the first side; mounting the wafer with the first side on a carrier system; etching a deep vertical trench from the second side through the semiconductor substrate to the dielectric region, thereby insulating a mesa region from the remaining semiconductor substrate; and filling the deep vertical trench with a dielectric material.
摘要翻译：根据实施例，一种形成半导体器件的方法包括：提供具有半导体衬底的晶片，第一侧具有与第一侧相对的第二侧和布置在第一侧的电介质区域; 将具有第一侧的晶片安装在载体系统上; 蚀刻从第二侧通过半导体衬底到电介质区域的深垂直沟槽，从而将台面区域与剩余的半导体衬底绝缘; 并用介电材料填充深垂直沟槽。

13. 发明申请

US20130075814A1 SEMICONDUCTOR DEVICE WITH A SEMICONDUCTOR VIA 审中-公开
标题翻译：具有半导体的半导体器件
公开(公告)号：US20130075814A1
公开(公告)日：2013-03-28
申请号：US13241771
申请日：2011-09-23
申请人： Andreas Peter Meiser , Markus Zundel
发明人： Andreas Peter Meiser , Markus Zundel
IPC分类号： H01L27/088 , H01L21/336
CPC分类号： H01L29/4238 , H01L21/743 , H01L21/76898 , H01L23/481 , H01L29/407 , H01L29/4236 , H01L29/42368 , H01L29/66348 , H01L29/66734 , H01L29/7397 , H01L29/7811 , H01L29/7813 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a semiconductor body having a first surface and a second surface, at least one electrode arranged in at least one trench extending from the first surface into the semiconductor body, and a semiconductor via extending in a vertical direction of the semiconductor body within the semiconductor body to the second surface. The semiconductor via is electrically insulated from the semiconductor body by a via insulation layer. The at least one electrode extends in a first lateral direction of the semiconductor body through the via insulation layer and is electrically connected to the semiconductor via.
摘要翻译：半导体器件包括具有第一表面和第二表面的半导体本体，至少一个电极，设置在从第一表面延伸到半导体本体的至少一个沟槽中，以及半导体通孔，其在半导体本体的垂直方向上延伸半导体主体到第二表面。半导体通孔通过通孔绝缘层与半导体本体电绝缘。所述至少一个电极通过所述通孔绝缘层在所述半导体主体的第一横向方向上延伸并且电连接到所述半导体通孔。

14. 发明申请

US20120146130A1 SEMICONDUCTOR COMPONENT WITH A SEMICONDUCTOR VIA 有权
标题翻译：具有半导体的半导体元件
公开(公告)号：US20120146130A1
公开(公告)日：2012-06-14
申请号：US12964865
申请日：2010-12-10
申请人： Franz Hirler , Andreas Peter Meiser
发明人： Franz Hirler , Andreas Peter Meiser
IPC分类号： H01L29/78 , H01L21/336 , H01L21/76
CPC分类号： H01L29/4175 , H01L21/76898 , H01L21/823481 , H01L23/481 , H01L24/05 , H01L27/088 , H01L29/04 , H01L29/0649 , H01L29/0653 , H01L29/42372 , H01L29/511 , H01L29/66734 , H01L29/7397 , H01L29/7802 , H01L29/7811 , H01L29/7813 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/10329 , H01L2924/13055 , H01L2924/13091 , H01L2924/00
摘要： A method for producing a semiconductor component includes providing a semiconductor body with a first surface and a second surface opposite the first surface, forming an insulation trench which extends into the semiconductor body from the first surface and which in a horizontal plane of the semiconductor body has a geometry such that the insulation trench defines a via region of the semiconductor body, forming a first insulation layer on one or more sidewalls of the insulation trench, removing semiconductor material of the semiconductor body from the second surface to expose at least parts of the first insulation layer, to remove at least parts of the first insulation layer, or to leave at least partially a semiconductor layer with a thickness of less than 1 μm between the first insulation layer and the second surface, and forming first and second contact electrodes on the via region.
摘要翻译：一种半导体元件的制造方法，其特征在于，具备：第一表面和与所述第一表面相对的第二表面的半导体本体，形成从所述第一表面延伸到所述半导体本体中并且在所述半导体主体的水平面中具有的绝缘沟槽几何形状使得绝缘沟槽限定半导体本体的通孔区域，在绝缘沟槽的一个或多个侧壁上形成第一绝缘层，从第二表面去除半导体本体的半导体材料，以暴露出第一绝缘层，以去除第一绝缘层的至少一部分，或者至少部分地在第一绝缘层和第二表面之间留下厚度小于1μm的半导体层，以及在第一绝缘层和第二绝缘层之间形成第一和第二接触电极通过区域。

15. 发明授权

US09396997B2 Method for producing a semiconductor component with insulated semiconductor mesas 有权
标题翻译：用绝缘半导体台面制造半导体部件的方法
公开(公告)号：US09396997B2
公开(公告)日：2016-07-19
申请号：US13288271
申请日：2011-11-03
申请人： Franz Hirler , Anton Mauder , Hermann Gruber , Hubert Rothleitner , Andreas Peter Meiser
发明人： Franz Hirler , Anton Mauder , Hermann Gruber , Hubert Rothleitner , Andreas Peter Meiser
IPC分类号： H01L21/76 , H01L21/768 , H01L23/48 , H01L29/06 , H01L29/423 , H01L29/739 , H01L29/78 , H01L21/762 , H01L21/8234 , H01L23/00 , H01L27/088 , H01L29/40 , H01L29/417 , H01L29/45 , H01L29/66
CPC分类号： H01L29/407 , H01L21/76224 , H01L21/76898 , H01L21/823481 , H01L23/481 , H01L24/16 , H01L27/088 , H01L29/0653 , H01L29/401 , H01L29/402 , H01L29/408 , H01L29/41741 , H01L29/42372 , H01L29/4238 , H01L29/456 , H01L29/66734 , H01L29/7397 , H01L29/7803 , H01L29/7804 , H01L29/7808 , H01L29/7811 , H01L29/7813 , H01L2224/16245 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01068 , H01L2924/01074 , H01L2924/12035 , H01L2924/12036 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/00
摘要： A method for producing a semiconductor component is provided. The method includes providing a semiconductor body with a first surface and a second surface opposite to the first surface, etching an insulation trench from the first surface partially into the semiconductor body, forming a first insulation layer on one or more sidewalls of the insulation trench, processing the second surface by at least one of grinding, polishing and a CMP-process to expose the first insulation layer, and depositing on the processed second surface a second insulation layer which extends to the first insulation layer.
摘要翻译：提供一种半导体元件的制造方法。该方法包括：提供具有与第一表面相对的第一表面和第二表面的半导体本体，将绝缘沟槽从第一表面部分地蚀刻到半导体本体中，在绝缘沟槽的一个或多个侧壁上形成第一绝缘层，通过研磨，抛光和CMP工艺中的至少一个来处理第二表面以暴露第一绝缘层，以及在经处理的第二表面上沉积延伸到第一绝缘层的第二绝缘层。

16. 发明授权

US09087829B2 Semiconductor arrangement 有权
标题翻译：半导体安排
公开(公告)号：US09087829B2
公开(公告)日：2015-07-21
申请号：US13204347
申请日：2011-08-05
申请人： Stefan Macheiner , Andreas Peter Meiser , Steffen Thiele
发明人： Stefan Macheiner , Andreas Peter Meiser , Steffen Thiele
IPC分类号： H01L29/66 , H01L23/495 , H01L23/00 , H01L25/07 , H01L23/31
CPC分类号： H01L23/49575 , H01L23/3107 , H01L23/49524 , H01L23/49562 , H01L24/48 , H01L24/49 , H01L25/072 , H01L2224/05554 , H01L2224/0603 , H01L2224/48137 , H01L2224/48145 , H01L2224/48247 , H01L2224/4903 , H01L2224/49171 , H01L2924/00014 , H01L2924/12036 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/30107 , H01L2924/00 , H01L2224/45099 , H01L2224/05599 , H01L2924/00012
摘要： A semiconductor arrangement includes a first and second controllable vertical n-channel semiconductor chip. Each of the controllable vertical n-channel semiconductor chips has a front side, a rear side opposite the front side, a front side main contact arranged on the front side, a rear side main contact arranged on the rear side, and a gate contact arranged on the front side for controlling an electric current between the front side main contact and the rear side main contact. The rear side contacts of the first and second semiconductor chips are electrically connected to one another.
摘要翻译：半导体装置包括第一和第二可控垂直的n沟道半导体芯片。可控制的垂直n沟道半导体芯片中的每一个具有前侧，与前侧相反的后侧，布置在前侧的前侧主触头，布置在后侧的后侧主触头和布置在栅极触点在前侧用于控制前侧主触点和后侧主触点之间的电流。第一和第二半导体芯片的后侧触点彼此电连接。

17. 发明申请

US20120319740A1 Method and Circuit for Driving an Electronic Switch 有权
标题翻译：用于驱动电子开关的方法和电路
公开(公告)号：US20120319740A1
公开(公告)日：2012-12-20
申请号：US13160809
申请日：2011-06-15
申请人： Steffen Thiele , Andreas Peter Meiser , Franz Hirler
发明人： Steffen Thiele , Andreas Peter Meiser , Franz Hirler
IPC分类号： H03K3/00
CPC分类号： H03K17/0822 , H03K17/14
摘要： Disclosed is an electronic circuit. The electronic circuit includes a transistor having a control terminal to receive a drive signal, and a load path between a first and a second load terminal. A voltage protection circuit is coupled to the transistor, has a control input, is configured to assume one of an activated state and a deactivated state as an operation state dependent on a control signal received at the control input, and is configured to limit a voltage between the load terminals or between one of the load terminals and the control terminal. A control circuit is coupled to the control input of the voltage protection circuit and is configured to deactivate the voltage protection circuit dependent on at least one operation parameter of the transistor and when a voltage across the load path or a load current through the load path is other than zero.
摘要翻译：公开了一种电子电路。电子电路包括具有用于接收驱动信号的控制端子和第一和第二负载端子之间的负载路径的晶体管。电压保护电路耦合到晶体管，具有控制输入，被配置为取决于在控制输入端接收到的控制信号而将激活状态和去激活状态中的一个作为操作状态，并且被配置为限制电压在负载端子之间或负载端子之一和控制端子之间。控制电路耦合到电压保护电路的控制输入，并且被配置为取决于晶体管的至少一个操作参数取消激活电压保护电路，并且当负载路径上的电压或通过负载路径的负载电流为除了零。

18. 发明申请

US20120264259A1 Method for Forming a Semiconductor Device and a Semiconductor Device 有权
标题翻译：用于形成半导体器件和半导体器件的方法
公开(公告)号：US20120264259A1
公开(公告)日：2012-10-18
申请号：US13088555
申请日：2011-04-18
申请人： Franz Hirler , Andreas Peter Meiser
发明人： Franz Hirler , Andreas Peter Meiser
IPC分类号： H01L21/50 , H01L21/28 , H01L21/768 , H01L21/18
CPC分类号： H01L29/7827 , H01L21/76898 , H01L21/823487 , H01L29/0649 , H01L29/0653 , H01L29/0878 , H01L29/42304 , H01L29/42372 , H01L29/66295 , H01L29/66348 , H01L29/66734 , H01L29/732 , H01L29/7397 , H01L29/781 , H01L29/7811 , H01L29/7813 , H01L2924/0002 , H01L2924/00
摘要： A method for forming a semiconductor device is provided. The method includes providing a semiconductor substrate having a main horizontal surface, an opposite surface and a completely embedded dielectric region. A deep vertical trench is etched from the main horizontal surface into the semiconductor substrate using the dielectric region as an etch stop. A vertical transistor structure is formed in the semiconductor substrate. A first metallization in ohmic contact with the transistor structure is formed on the main horizontal surface. The semiconductor substrate is thinned at the opposite surface at least close to the dielectric region. Further, a semiconductor device is provided.
摘要翻译：提供一种形成半导体器件的方法。该方法包括提供具有主水平表面，相对表面和完全嵌入的电介质区域的半导体衬底。使用电介质区域作为蚀刻停止层，从主水平表面蚀刻深的垂直沟槽进入半导体衬底。在半导体衬底中形成垂直晶体管结构。在主水平表面上形成与晶体管结构欧姆接触的第一金属化。半导体衬底在至少接近电介质区域的相对表面处变薄。此外，提供了一种半导体器件。

19. 发明授权

US09142665B2 Semiconductor component with a semiconductor via 有权
标题翻译：具有半导体通孔的半导体元件
公开(公告)号：US09142665B2
公开(公告)日：2015-09-22
申请号：US12964865
申请日：2010-12-10
申请人： Franz Hirler , Andreas Peter Meiser
发明人： Franz Hirler , Andreas Peter Meiser
IPC分类号： H01L29/66 , H01L29/78 , H01L21/768 , H01L21/8234 , H01L23/48 , H01L23/00 , H01L27/088 , H01L29/06 , H01L29/423 , H01L29/739
CPC分类号： H01L29/4175 , H01L21/76898 , H01L21/823481 , H01L23/481 , H01L24/05 , H01L27/088 , H01L29/04 , H01L29/0649 , H01L29/0653 , H01L29/42372 , H01L29/511 , H01L29/66734 , H01L29/7397 , H01L29/7802 , H01L29/7811 , H01L29/7813 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/10329 , H01L2924/13055 , H01L2924/13091 , H01L2924/00
摘要： A method for producing a semiconductor component includes providing a semiconductor body with a first surface and a second surface opposite the first surface, forming an insulation trench which extends into the semiconductor body from the first surface and which in a horizontal plane of the semiconductor body has a geometry such that the insulation trench defines a via region of the semiconductor body, forming a first insulation layer on one or more sidewalls of the insulation trench, removing semiconductor material of the semiconductor body from the second surface to expose at least parts of the first insulation layer, to remove at least parts of the first insulation layer, or to leave at least partially a semiconductor layer with a thickness of less than 1 μm between the first insulation layer and the second surface, and forming first and second contact electrodes on the via region.
摘要翻译：一种半导体元件的制造方法，其特征在于，具备：第一表面和与所述第一表面相对的第二表面的半导体本体，形成从所述第一表面延伸到所述半导体本体中并且在所述半导体主体的水平面中具有的绝缘沟槽几何形状使得绝缘沟槽限定半导体本体的通孔区域，在绝缘沟槽的一个或多个侧壁上形成第一绝缘层，从第二表面去除半导体本体的半导体材料，以暴露出第一绝缘层，以去除第一绝缘层的至少一部分，或者至少部分地在第一绝缘层和第二表面之间留下厚度小于1μm的半导体层，以及在第一绝缘层和第二绝缘层之间形成第一和第二接触电极通过区域。

20. 发明授权

US08735262B2 Semiconductor device having a through contact and a manufacturing method therefor 有权
标题翻译：具有通孔的半导体器件及其制造方法
公开(公告)号：US08735262B2
公开(公告)日：2014-05-27
申请号：US13279846
申请日：2011-10-24
申请人： Hermann Gruber , Thomas Gross , Andreas Peter Meiser , Markus Zundel
发明人： Hermann Gruber , Thomas Gross , Andreas Peter Meiser , Markus Zundel
IPC分类号： H01L21/301 , H01L21/00
CPC分类号： H01L23/481 , H01L21/6835 , H01L21/76224 , H01L21/76898 , H01L2221/68327 , H01L2221/6834 , H01L2924/0002 , H01L2924/00
摘要： According to an embodiment, a method of forming a semiconductor device includes: providing a wafer having a semiconductor substrate with a first side a second side opposite the first side, and a dielectric region arranged on the first side; mounting the wafer with the first side on a carrier system; etching a deep vertical trench from the second side through the semiconductor substrate to the dielectric region, thereby insulating a mesa region from the remaining semiconductor substrate; and filling the deep vertical trench with a dielectric material.
摘要翻译：根据实施例，一种形成半导体器件的方法包括：提供具有半导体衬底的晶片，第一侧具有与第一侧相对的第二侧和布置在第一侧的电介质区域; 将具有第一侧的晶片安装在载体系统上; 蚀刻从第二侧通过半导体衬底到电介质区域的深垂直沟槽，从而将台面区域与剩余的半导体衬底绝缘; 并用介电材料填充深垂直沟槽。

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