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11. 发明授权

US08101495B2 MIM capacitors in semiconductor components 有权
公开(公告)号：US08101495B2
公开(公告)日：2012-01-24
申请号：US12048060
申请日：2008-03-13
申请人： Philipp Riess , Armin Fischer
发明人： Philipp Riess , Armin Fischer
IPC分类号： H01L21/8242
CPC分类号： H01L23/5223 , H01L2924/0002 , Y10T29/43 , H01L2924/00
摘要： Structures and methods of forming an ideal MIM capacitor are disclosed. The single capacitor includes a first and a second metal structure overlying a substrate, a first dielectric material disposed between a first portion of the first metal structure and a first portion of the second metal structure. A second dielectric material is disposed between a second portion of the first metal structure and a second portion of the second metal structure. No first dielectric material is disposed between the second portion of the first and second metal structures, and no second dielectric material is disposed between the first portion of the first and second metal structures. The first and second dielectric material layers include materials with opposite coefficient of capacitance.

12. 发明申请

US20090230507A1 MIM Capacitors in Semiconductor Components 有权
标题翻译： MIM电容器在半导体组件
公开(公告)号：US20090230507A1
公开(公告)日：2009-09-17
申请号：US12048060
申请日：2008-03-13
申请人： Philipp Riess , Armin Fischer
发明人： Philipp Riess , Armin Fischer
IPC分类号： H01L29/92 , H01G4/018 , H01L21/02
CPC分类号： H01L23/5223 , H01L2924/0002 , Y10T29/43 , H01L2924/00
摘要： Structures and methods of forming an ideal MIM capacitor are disclosed. The single capacitor includes a first and a second metal structure overlying a substrate, a first dielectric material disposed between a first portion of the first metal structure and a first portion of the second metal structure. A second dielectric material is disposed between a second portion of the first metal structure and a second portion of the second metal structure. No first dielectric material is disposed between the second portion of the first and second metal structures, and no second dielectric material is disposed between the first portion of the first and second metal structures. The first and second dielectric material layers include materials with opposite coefficient of capacitance.
摘要翻译：公开了形成理想MIM电容器的结构和方法。单个电容器包括覆盖衬底的第一和第二金属结构，设置在第一金属结构的第一部分和第二金属结构的第一部分之间的第一介电材料。第二介电材料设置在第一金属结构的第二部分和第二金属结构的第二部分之间。在第一和第二金属结构的第二部分之间没有设置第一介电材料，并且在第一和第二金属结构的第一部分之间没有设置第二介电材料。第一和第二介电材料层包括具有相反的电容系数的材料。

13. 发明申请

US20090146242A1 METAL ION TRANSISTOR AND RELATED METHODS 有权
标题翻译：金属离子晶体管及相关方法
公开(公告)号：US20090146242A1
公开(公告)日：2009-06-11
申请号：US11951579
申请日：2007-12-06
申请人： Fen Chen , Armin Fischer
发明人： Fen Chen , Armin Fischer
IPC分类号： H01L29/00 , H01L21/425
CPC分类号： H01L45/00
摘要： A metal ion transistor and related methods are disclosed. In one embodiment, the metal ion transistor includes a cell positioned in at least one isolation layer, the cell including a metal ion doped low dielectric constant (low-k) dielectric material sealed from each adjacent isolation layer; a first electrode contacting the cell on a first side; a second electrode contacting the cell on a second side; and a third electrode contacting the cell on a third side, wherein each electrode is isolated from each other electrode.
摘要翻译：公开了一种金属离子晶体管及相关方法。在一个实施例中，金属离子晶体管包括位于至少一个隔离层中的电池，该电池包括从每个相邻隔离层密封的金属离子掺杂低介电常数（低k）电介质材料; 在第一侧上与第一电极接触的第一电极; 在第二侧接触所述电池的第二电极; 以及在第三侧与第一电极接触的第三电极，其中每个电极彼此隔离。

14. 发明授权

US07327152B2 Integrated test circuit arrangement and test method 有权
标题翻译：集成测试电路布置和测试方法
公开(公告)号：US07327152B2
公开(公告)日：2008-02-05
申请号：US10529340
申请日：2003-09-19
申请人： Armin Fischer , Alexander von Glasow
发明人： Armin Fischer , Alexander von Glasow
IPC分类号： G01R31/02
CPC分类号： G01R31/2877 , G01R31/2648 , G01R31/2856 , G01R31/2879 , H01L22/34 , H01L23/345 , H01L2924/0002 , H01L2924/00
摘要： An integrated test circuit arrangement is provided that contains integrated test structures, at least one integrated heating element, an integrated detection unit, an integrated supply unit, and a control unit. The integrated detection unit detects at least one physical property for each of the test structures. The integrated supply unit supplies each of the test structures with a current or a voltage in switchable fashion independently of one another. The control unit is connected to outputs of the detection unit on an input side and controls the supply unit dependent on the detection results.
摘要翻译：提供一种集成的测试电路装置，其包含集成测试结构，至少一个集成加热元件，集成检测单元，集成供应单元和控制单元。集成检测单元检测每个测试结构的至少一个物理属性。集成供应单元彼此独立地以可切换的方式向每个测试结构提供电流或电压。控制单元连接到输入侧的检测单元的输出，并根据检测结果来控制供给单元。

15. 发明授权

US07315998B2 Integrated circuit arrangement with intermediate materials and associated components 有权
标题翻译：集成电路布置与中间材料和相关组件
公开(公告)号：US07315998B2
公开(公告)日：2008-01-01
申请号：US10526881
申请日：2003-08-14
申请人： Armin Fischer , Alexander Von Glasow
发明人： Armin Fischer , Alexander Von Glasow
IPC分类号： G06F17/50
CPC分类号： H01L23/5226 , G06F17/5068 , H01L21/76841 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit arrangement having a metallization layer, an interconnect dielectric, electrically conductive interconnect intermediate material, electrically conductive connecting sections, connecting section dielectric between the connecting sections, and connecting section intermediate material. The metallization layer contains electrically conductive interconnects between which the interconnect dielectric is disposed. The electrically conductive interconnect intermediate material is arranged between a side area of an interconnect and the interconnect dielectric. The electrically conductive connecting sections in each case form a section of an electrically conductive connection to or from an interconnect and the connecting section dielectric is between the connecting sections. The connecting section intermediate material is arranged in each case between a connecting section and the connecting section dielectric and/or between a connecting section and an interconnect. The interconnect intermediate material and the connecting section intermediate material make contact with one another at at least one connection.
摘要翻译：具有金属化层，互连电介质，导电互连中间材料，导电连接部分，连接部分之间的连接部分电介质和连接部分中间材料的集成电路装置。金属化层包含布置有互连电介质的导电互连。导电互连中间材料布置在互连的侧面区域和互连电介质之间。导电连接部分在每种情况下都形成与互连件相互导电连接的部分，并且连接部分电介质位于连接部分之间。连接部分中间材料分别布置在连接部分和连接部分电介质之间和/或连接部分和互连件之间。互连中间材料和连接部分中间材料在至少一个连接处彼此接触。

16. 发明授权

US08487453B2 Integrated circuit with pads connected by an under-bump metallization and method for production thereof 有权
标题翻译：具有通过凸块下金属化连接的焊盘的集成电路及其制造方法
公开(公告)号：US08487453B2
公开(公告)日：2013-07-16
申请号：US13032248
申请日：2011-02-22
申请人： Armin Fischer , Alexander Von Glasow
发明人： Armin Fischer , Alexander Von Glasow
IPC分类号： H01L23/48 , H01L23/02 , H01L29/40
CPC分类号： H01L23/525 , H01L24/02 , H01L24/10 , H01L2224/0401 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01032 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/14
摘要： A semiconductor device includes a semiconductor chip. External connection pads and further pads are disposed over a surface of the semiconductor chip. Selected ones of the further pads are electrically connected to one another so as to activate selected functions within the semiconductor chip.
摘要翻译：半导体器件包括半导体芯片。外部连接焊盘和另外的焊盘设置在半导体芯片的表面上。所选择的另外的焊盘彼此电连接，以激活半导体芯片内的所选功能。

17. 发明申请

US20120191889A1 Method to differentiate identical devices on a two-wire interface 失效
标题翻译：在两线接口上区分相同设备的方法
公开(公告)号：US20120191889A1
公开(公告)日：2012-07-26
申请号：US12931063
申请日：2011-01-24
申请人： Armin Fischer , Joachim Riexinger , Frank Kronmueller
发明人： Armin Fischer , Joachim Riexinger , Frank Kronmueller
IPC分类号： G06F13/14
CPC分类号： G06F13/4291
摘要： Systems and methods for providing a differentiation of two identical slave devices on a same I2C bus without any hardware (e.g. additional ID pins) or software overhead are disclosed. Each identical slave device is connected to the SDA/SCL lanes by interchanging its SDA/SCL ports. It is up to the slave device to detect its signal connectivity to the SDA/SCL lanes of the I2C bus. The slave devices detect the signal connectivity by interpreting the I2C transfer in normal and interchanged connectivity.
摘要翻译：公开了用于在相同的I2C总线上提供两个相同的从设备的区分的系统和方法，而没有任何硬件（例如附加的ID引脚）或软件开销。每个相同的从器件通过交换其SDA / SCL端口连接到SDA / SCL通道。由从设备检测到与I2C总线的SDA / SCL通道的信号连接。从设备通过在正常和互换的连接中解释I2C传输来检测信号连接。

18. 发明申请

US20110097826A1 DEVICE AND METHOD FOR DETECTING STRESS MIGRATION PROPERTIES 有权
标题翻译：用于检测应力迁移特性的装置和方法
公开(公告)号：US20110097826A1
公开(公告)日：2011-04-28
申请号：US12980829
申请日：2010-12-29
申请人： Armin Fischer , Alexander Von Glasow , Jochen von Hagen
发明人： Armin Fischer , Alexander Von Glasow , Jochen von Hagen
IPC分类号： H01L21/66
CPC分类号： H01L22/34 , H01L2924/0002 , H01L2924/00
摘要： A device and method are provided for detecting stress migration properties of a semiconductor module mounted in a housing. A stress migration test (SMT) structure is formed in the semiconductor module. An integrated heating (IH) device is formed within or in direct proximity to the SMT structure. The SMT structure includes a first interconnect region in a first interconnect layer, a second interconnect region in a second interconnect layer, and a connecting region electrically connecting the interconnect regions through a first insulating layer. The IH device includes a heating interconnect region through which a heating current flows. The heating interconnect region is within or outside the first or second interconnect region or connecting region. When the heating current is applied, a measurement voltage is applied to the SMT structure, and a current through the SMT structure is measured to detect stress migration properties of the semiconductor module.
摘要翻译：提供了一种用于检测安装在壳体中的半导体模块的应力迁移特性的装置和方法。在半导体模块中形成应力迁移试验（SMT）结构。集成加热（IH）装置形成在SMT结构内或者直接靠近SMT结构。 SMT结构包括第一互连层中的第一互连区域，第二互连层中的第二互连区域和通过第一绝缘层电连接互连区域的连接区域。 IH装置包括加热互连区域，加热电流流过该区域。加热互连区域在第一或第二互连区域或连接区域的内部或外部。当施加加热电流时，向SMT结构施加测量电压，并且测量通过SMT结构的电流以检测半导体模块的应力迁移特性。

19. 发明申请

US20100184280A1 METHOD OF FORMING METAL ION TRANSISTOR 失效
标题翻译：形成金属离子晶体管的方法
公开(公告)号：US20100184280A1
公开(公告)日：2010-07-22
申请号：US12725817
申请日：2010-03-17
申请人： Fen Chen , Armin Fischer
发明人： Fen Chen , Armin Fischer
IPC分类号： H01L21/335
CPC分类号： H01L45/00
摘要： A method of forming a metal ion transistor comprises forming a first electrode in a first isolation layer; forming a second isolation layer over the first isolation layer; forming a first cell region of a low dielectric constant (low-k) dielectric over the first electrode in the second isolation layer, the first cell region isolated from the second isolation layer; forming a cap layer over the second isolation layer and the first cell region, at least thinning the cap layer over the first cell region; depositing a layer of the low-k dielectric over the second isolation layer and the first cell region; forming metal ions in the low-k dielectric layer; patterning the low-k dielectric layer to form a second cell region; sealing the second cell region using a liner; and forming a second electrode contacting the second cell region and a third electrode contacting the second cell region.
摘要翻译：一种形成金属离子晶体管的方法包括在第一隔离层中形成第一电极; 在所述第一隔离层上形成第二隔离层; 在所述第二隔离层中的所述第一电极上形成低介电常数（低k）电介质的第一电池区，所述第一电池区与所述第二隔离层隔离; 在所述第二隔离层和所述第一单元区域上形成盖层，至少使所述盖层在所述第一单元区域上变薄; 在所述第二隔离层和所述第一单元区域上沉积所述低k电介质层; 在低k电介质层中形成金属离子; 图案化低k电介质层以形成第二电池区; 使用衬垫密封第二电池区域; 以及形成与第二单元区域接触的第二电极和与第二单元区域接触的第三电极。

20. 发明授权

US07482288B2 Method for producing a grid cap with a locally increased dielectric constant 有权
标题翻译：具有局部增加的介电常数的网格盖的制造方法
公开(公告)号：US07482288B2
公开(公告)日：2009-01-27
申请号：US11454468
申请日：2006-06-16
申请人： Sabine Penka , Armin Fischer
发明人： Sabine Penka , Armin Fischer
IPC分类号： H01L21/00
CPC分类号： H01L28/40 , H01L21/3105 , H01L21/31058 , H01L21/76826 , H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： A method for producing a semiconductor product. Semiconductor product components are formed in a semiconductor product region of the substrate. A layer made of low-k material is subsequently formed on the substrate. Electrically conductive interconnects are formed in and/or on the layer made of low-k material. The layer of low-k material is provided in a wiring plane of the semiconductor product region for the electrical insulation of the interconnects from one another. A grid cap region of the substrate is subjected to a spacially delimited treatment such that the value of the dielectric constant is increased in the crossover region. Accordingly, an interconnect to interconnect capacitance is formed as grid cap capacitance from the interconnects arranged in the crossover region and the material and increased value of dielectric constant. Further, the dielectric constant of the low-k material remains unchanged in the semiconductor product region.
摘要翻译：一种半导体产品的制造方法。半导体产品部件形成在基板的半导体产品区域中。随后在衬底上形成由低k材料制成的层。导电互连形成在由低k材料制成的层中和/或之上。低k材料层设置在用于互连的电绝缘的半导体产品区域的布线平面中。对基板的栅极盖区域进行空间界定处理，使得在交叉区域中介电常数的值增加。因此，互连互连电容被形成为来自布置在交叉区域中的互连的栅格电容和材料以及增加的介电常数值。此外，低k材料的介电常数在半导体产品区域中保持不变。

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