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11. 发明授权

US06174739B1 Method of monitoring via and trench profiles during manufacture 失效
标题翻译：在制造期间监测通孔和沟槽轮廓的方法
公开(公告)号：US06174739B1
公开(公告)日：2001-01-16
申请号：US09345156
申请日：1999-06-30
申请人： Paul J. Steffan
发明人： Paul J. Steffan
IPC分类号： H01L2100
CPC分类号： H01L21/76877 , H01L21/76802 , H01L21/76804 , H01L22/12 , H01L22/26 , H01L2924/0002 , H01L2924/00
摘要： A method of nondestructively monitoring filled or unfilled via and trench profiles during the manufacture of semiconductor devices. A selected filled or unfilled via or trench is scanned with overlapped excitation pulses that form a temporally varying excitation radiation field causing a time-dependent ripple to be generated that is irradiated by a probe pulse that diffracts into at least two signal beams. One of the diffracted signal beams is detected and digitized to produce a digitized waveform signal that is analyzed in a CPU to obtain a frequency of the digitized waveform signal and is compared to characterization waveforms stored in a database to determine the profile of the selected filled or unfilled via or trench.
摘要翻译：一种在半导体器件制造期间非破坏性地监测填充或未填充的通孔和沟槽轮廓的方法。用重叠的激励脉冲扫描所选择的填充或未填充的通孔或沟槽，所述重叠激励脉冲形成时间上变化的激发辐射场，从而产生由衍射成至少两个信号光束的探针脉冲照射的时间相关的纹波。衍射信号光束中的一个被检测和数字化以产生在CPU中分析以获得数字化波形信号的频率并与存储在数据库中的表征波形进行比较的数字化波形信号，以确定所选择的填充或未填充通孔或沟槽。

12. 发明授权

US06171874B2 Non-defect image and data transfer and storage methodology 有权
标题翻译：非缺陷图像和数据传输和存储方法
公开(公告)号：US06171874B2
公开(公告)日：2001-01-09
申请号：US09247242
申请日：1999-02-09
申请人： Paul J. Steffan , Allen S. Yu
发明人： Paul J. Steffan , Allen S. Yu
IPC分类号： G01R3126
CPC分类号： H01L22/20 , G01R31/302
摘要： A method of manufacturing semiconductor devices wherein images of non-defect anomalies are captured and stored with image data and linkage data in a database. The non-defect anomaly data is stored in database for later retrieval.
摘要翻译：一种制造半导体器件的方法，其中捕获并存储图像数据和链接数据在数据库中的非缺陷异常的图像。非缺陷异常数据存储在数据库中供以后检索。

13. 发明授权

US6165805A Scan tool recipe server 有权
标题翻译：扫描工具配方服务器
公开(公告)号：US6165805A
公开(公告)日：2000-12-26
申请号：US182942
申请日：1998-10-29
申请人： Paul J. Steffan , Allen S. Yu
发明人： Paul J. Steffan , Allen S. Yu
IPC分类号： H01L21/66 , G01R31/26
CPC分类号： H01L22/20
摘要： A method of manufacturing a semiconductor wafer wherein each layer to be scanned is scanned in a scan tool after determination of whether the current recipe is contained in the scan tool. The recipe in the scan tool is compared to the current recipe stored in a server. If the recipe in the scan tool is not the current recipe the current recipe is loaded into the scan tool from the server. The recipes in the server are updated from associated scan tools.
摘要翻译：一种制造半导体晶片的方法，其中在确定当前配方是否包含在扫描工具中之后，每个扫描层被扫描在扫描工具中。将扫描工具中的配方与存储在服务器中的当前配方进行比较。如果扫描工具中的配方不是当前配方，则当前配方将从服务器加载到扫描工具中。从相关的扫描工具更新服务器中的配方。

14. 发明授权

US6107204A Method to manufacture multiple damascene by utilizing etch selectivity 有权
标题翻译：通过利用蚀刻选择性制造多镶嵌的方法
公开(公告)号：US6107204A
公开(公告)日：2000-08-22
申请号：US165783
申请日：1998-10-02
申请人： Allen S. Yu , Paul J. Steffan , Thomas C. Scholer
发明人： Allen S. Yu , Paul J. Steffan , Thomas C. Scholer
IPC分类号： H01L21/311 , H01L21/314 , H01L21/316 , H01L21/318 , H01L21/768
CPC分类号： H01L21/76807 , H01L21/31116 , H01L21/3145 , H01L21/31612 , H01L21/3185
摘要： A method of manufacturing a semiconductor device having multiple layers of interconnects that are filled in a single conductive material filling step. Two layers of interlayer dielectric separated by an etch stop layer are formed over a layer including metal structures in contact with electrodes of active devices formed in and on a semiconductor substrate. A layer of photoresist is formed on a second etch stop layer formed on the upper layer of interlayer dielectric. The layer of photoresist is patterned and etched. Masking and etching processes form openings in the first and second layers of interlayer dielectric including openings to the metal structures. The openings are filled in a single conductive material filling step.
摘要翻译：一种制造具有填充在单个导电材料填充步骤中的多层互连的半导体器件的方法。在包括与在半导体衬底中形成的有源器件的电极接触的金属结构的层上形成由蚀刻停止层分隔的两层层间电介质。在形成在层间电介质的上层上的第二蚀刻停止层上形成一层光致抗蚀剂。对光致抗蚀剂层进行图案化和蚀刻。掩模和蚀刻工艺在第一层和第二层的层间电介质中形成开口，其包括到金属结构的开口。开口填充在单个导电材料填充步骤中。

15. 发明授权

US6093647A Method to selectively electroplate conductive material into trenches 有权
标题翻译：选择性地将导电材料电镀到沟槽中的方法
公开(公告)号：US6093647A
公开(公告)日：2000-07-25
申请号：US186053
申请日：1998-11-03
申请人： Allen S. Yu , Paul J. Steffan
发明人： Allen S. Yu , Paul J. Steffan
IPC分类号： H01L21/768 , H01L21/44
CPC分类号： H01L21/76879
摘要： A method of filling trenches in a semiconductor wafer with a conductive material is disclosed by selectively electroplating the semiconductor wafer. The trenches are lined with a barrier layer and a seed layer and the semiconductor wafer is submerged in a solution having ions of the selected conductive material. An electrical potential is applied to the electroplating solution and the semiconductor wafer. The seed layer in the trench causes the conductive material ions to be plated in the trench.
摘要翻译：通过选择性地电镀半导体晶片来公开一种用导电材料填充半导体晶片中的沟槽的方法。沟槽衬有阻挡层和种子层，并且将半导体晶片浸没在具有所选择的导电材料的离子的溶液中。对电镀液和半导体晶片施加电位。沟槽中的晶种层使得导电材料离子被电镀在沟槽中。

16. 发明授权

US6025272A Method of planarize and improve the effectiveness of the stop layer 失效
标题翻译：平面化方法，提高停止层的有效性
公开(公告)号：US6025272A
公开(公告)日：2000-02-15
申请号：US161879
申请日：1998-09-28
申请人： Allen S. Yu , Thomas C. Scholer , Paul J. Steffan
发明人： Allen S. Yu , Thomas C. Scholer , Paul J. Steffan
IPC分类号： H01L21/768 , H01L21/00
CPC分类号： H01L21/76802 , H01L21/76832 , H01L21/76834
摘要： A method of manufacturing a semiconductor device including a step of filling crevices or non-level regions formed during the manufacture of the semiconductor device with a spin-on dielectric material. The spin-on dielectric material prevents conductive material from filling the crevices and causing the device to fail.
摘要翻译：一种制造半导体器件的方法，包括在旋转电介质材料制造半导体器件期间形成的缝隙或非电平区域的步骤。旋涂电介质材料防止导电材料填充缝隙并导致器件失效。

17. 发明授权

US6011619A Semiconductor wafer optical scanning system and method using swath-area defect limitation 失效
标题翻译：半导体晶圆光学扫描系统和方法使用区域缺陷限制
公开(公告)号：US6011619A
公开(公告)日：2000-01-04
申请号：US987736
申请日：1997-12-09
申请人： Paul J. Steffan , Bryan Tracy , Ming Chun Chen
发明人： Paul J. Steffan , Bryan Tracy , Ming Chun Chen
IPC分类号： G01N21/956 , G01N21/88
CPC分类号： G01N21/95607
摘要： A semiconductor wafer optical scanning system and method for determining defects on a semiconductor wafer is disclosed. The method for determining wafer defects is based on maximum allowable defects on a swath basis, rather than maximum allowable defects on a wafer basis. The method step include determining the scanned area of an individual swath that is based on a recipe set-up, consistent with the capability of the optical scanning equipment being used and the particular semiconductor wafer being tested for defects. The predetermined swath area is supplied and stored in the optical scanning system along with the maximum allowable defect density determined by the user. By using the predetermined maximum allowable defects for a swath as a limit, defect analysis may be performed on the entire wafer. The optical scanning system would stop acquiring defects for the current swath being analyzed whenever the defect limit is reached, or until the swath defect analysis has been completed. The optical scanning would proceed to the next swath determining its defect and continuing in such a manner until the wafer is completely scanned.
摘要翻译：公开了一种用于确定半导体晶片上的缺陷的半导体晶片光学扫描系统和方法。用于确定晶片缺陷的方法基于条带上的最大允许缺陷，而不是基于晶片的最大允许缺陷。方法步骤包括根据正在使用的光学扫描设备的能力和正在测试缺陷的特定半导体晶片的能力，确定基于配方设置的单个条带的扫描区域。预定的条带区域与由用户确定的最大允许缺陷密度一起提供并存储在光学扫描系统中。通过将条纹的预定最大允许缺陷用作极限，可以在整个晶片上进行缺陷分析。光学扫描系统将停止获取当达到缺陷限制时所分析的当前条带的缺陷，或直到条带缺陷分析完成。光学扫描将进行到下一个条纹以确定其缺陷并以这种方式继续，直到晶片被完全扫描。

18. 发明授权

US5776811A Simplified process for fabricating flash eeprom cells 失效
标题翻译：制造闪光电池的简化过程
公开(公告)号：US5776811A
公开(公告)日：1998-07-07
申请号：US582720
申请日：1996-01-04
申请人： Hsingya Arthur Wang , Jian Chen , Paul J. Steffan
发明人： Hsingya Arthur Wang , Jian Chen , Paul J. Steffan
IPC分类号： H01L21/336 , H01L29/788 , H01L21/8247
CPC分类号： H01L29/66825 , H01L29/7885
摘要： A simplified fabrication procedure for making flash EEPROM memory cells is disclosed. The method comprises performing a double-diffuse (deep) junction implant after the shallow source/drain of the memory cell have been implanted and formed. A high energy double-diffuse implant is used to replace separate, individual implant and diffusion steps which results in a memory cell having, less damage to its substrate.
摘要翻译：公开了一种用于制造快速EEPROM存储单元的简化制造程序。该方法包括在已经注入和形成存储单元的浅源极/漏极之后执行双扩散（深）结注入。高能双漫射植入物被用于代替单独的个体注入和扩散步骤，导致记忆单元对其底物的损伤较小。

19. 发明授权

US07263451B1 Method and apparatus for correlating semiconductor process data with known prior process data 有权
标题翻译：将半导体工艺数据与已知的先前工艺数据相关联的方法和装置
公开(公告)号：US07263451B1
公开(公告)日：2007-08-28
申请号：US10973181
申请日：2004-10-25
申请人： Jeffrey P. Erhardt , Shivananda S. Shetty , Paul J. Steffan
发明人： Jeffrey P. Erhardt , Shivananda S. Shetty , Paul J. Steffan
IPC分类号： G01N37/00 , G06K9/00
CPC分类号： G06T7/001 , G06T2207/30148
摘要： A method for correlating semiconductor process data analyzes a semiconductor device that has been treated by a process, to produce process data related to the process. The data is converted into an image pattern, and automatic image retrieval is used to identify other devices having similar images. The process data is then correlated with prior process data of the other devices having the similar images.
摘要翻译：一种使半导体工艺数据相关的方法分析已经被处理过的半导体器件，以产生与该工艺有关的工艺数据。数据被转换为图像图案，并且使用自动图像检索来识别具有相似图像的其他设备。然后将过程数据与具有相似图像的其他设备的先前处理数据相关。

20. 发明授权

US06424881B1 Computer generated recipe selector utilizing defect file information 有权
标题翻译：计算机生成的配方选择器利用缺陷文件信息
公开(公告)号：US06424881B1
公开(公告)日：2002-07-23
申请号：US09404081
申请日：1999-09-23
申请人： Paul J. Steffan , Allen S. Yu
发明人： Paul J. Steffan , Allen S. Yu
IPC分类号： G06F1900
CPC分类号： H01L22/20
摘要： A method of manufacturing semiconductor devices wherein a computer generated list of appropriate review recipes for each layer is available to be used by a review station to review defects on each layer. The most appropriate review recipe is used by the review station unless a review station operator selects an alternate review recipe.
摘要翻译：一种制造半导体器件的方法，其中计算机产生的每个层的适当的审查配方的列表可被审查站用于审查每个层上的缺陷。审查站使用最合适的审查方法，除非审查站操作员选择备用审查配方。

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