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121. 发明授权

US07173648B1 System and method for visually monitoring a semiconductor processing system 失效
标题翻译：用于视觉监测半导体处理系统的系统和方法
公开(公告)号：US07173648B1
公开(公告)日：2007-02-06
申请号：US09553841
申请日：2000-04-21
申请人： Khoi Phan , Bharath Rangarajan , Bhanwar Singh , Bryan Choo
发明人： Khoi Phan , Bharath Rangarajan , Bhanwar Singh , Bryan Choo
IPC分类号： H04N7/18 , G01N21/00
CPC分类号： G01N21/9501 , G01N21/8803 , G01N2021/889
摘要： The present invention relates to visually monitoring an interior portion of a processing chamber in a semiconductor processing system. An image collector collects images of the interior of the chamber and provides an image signal indicative of a visual representation of the interior of the chamber. A viewing station receives the image signal and displays a visual representation of the interior of the chamber.
摘要翻译：本发明涉及在半导体处理系统中视觉监测处理室的内部部分。图像收集器收集室内部的图像，并提供指示室内部的视觉表示的图像信号。观察台接收图像信号并显示室内部的视觉表示。

122. 发明授权

US07069155B1 Real time analytical monitor for soft defects on reticle during reticle inspection 有权
标题翻译：光罩检测时光罩上的软缺陷的实时分析监视器
公开(公告)号：US07069155B1
公开(公告)日：2006-06-27
申请号：US10676455
申请日：2003-10-01
申请人： Khoi Phan , Bhanwar Singh , Bharath Rangarajan
发明人： Khoi Phan , Bhanwar Singh , Bharath Rangarajan
IPC分类号： G01B5/28 , G06K9/00 , H01L26/00
CPC分类号： G06T7/0004 , G01N21/3563 , G01N21/95692 , G01N2021/3595 , G01N2021/95676 , G03F1/62 , G03F1/82 , G03F1/84 , G06T2207/30148 , H01J2237/304 , H01J2237/31744
摘要： The present invention generally relates to semiconductor processing, and in particular to methods and systems for analyzing photolithographic reticle defects that include detecting soft defects on a reticle and analyzing the material composition of the defects for a particular chemical signature. Specifically, the present invention scans and images a soft defect via an optical inspection scan of a reticle, mills the defect using a Focused Ion Beam, and analyzes the defect for signatures using Electron Spectroscopy for Chemical Analysis and/or Fourier Transform Infrared Spectroscopy. The present invention thus provides for real-time analysis of the chemical composition of a soft defect on a reticle without the need for a defect identification navigation system. According to an aspect of the present invention, reticle defects can be monitored without removal of a pellicle, thus facilitating increased throughput and decreased cost in reticle repair and/or cleaning. According to another aspect of the invention, signatures occurring in trace amounts can be removed via employing a Focused Ion Beam in a non-reactive gas environment.
摘要翻译：本发明一般涉及半导体处理，特别涉及用于分析光刻掩模版缺陷的方法和系统，包括检测掩模版上的软缺陷并分析特定化学特征的缺陷的材料成分。具体地说，本发明通过光掩膜的光学检查扫描来扫描和成像软缺陷，使用聚焦离子束研磨缺陷，并使用化学分析和/或傅立叶变换红外光谱法的电子光谱分析签名缺陷。因此，本发明提供了对掩模版上的软缺陷的化学成分的实时分析，而不需要缺陷识别导航系统。根据本发明的一个方面，可以在不去除防护薄膜的情况下监视掩模版缺陷，从而有助于增加掩模版修复和/或清洁中的生产量和降低成本。根据本发明的另一方面，可以通过在非反应性气体环境中使用聚焦离子束来移除痕量发生的痕迹。

123. 发明授权

US06774989B1 Interlayer dielectric void detection 失效
标题翻译：层间电介质空隙检测
公开(公告)号：US06774989B1
公开(公告)日：2004-08-10
申请号：US10050453
申请日：2002-01-16
申请人： Bharath Rangarajan , Michael K. Templeton , Arvind Halliyal , Bhanwar Singh
发明人： Bharath Rangarajan , Michael K. Templeton , Arvind Halliyal , Bhanwar Singh
IPC分类号： G01N2100
CPC分类号： G01N21/956 , G01N21/47
摘要： A system for detecting voids in an ILD layer is provided. The system includes one or more light sources, each light source directing light to respective portions of the ILD layer. Light reflected from the respective portions is collected by a measuring system that processes the collected light. The collected light is indicative of the presence of voids in the respective portions of the ILD layer. The measuring system provides ILD layer void related data to a processor that determines whether voids exist in the respective portions of the ILD layer. The processor selectively marks the ILD layer portions to facilitate further processing and/or destruction of the IC with the ILD layer voids.
摘要翻译：提供一种用于检测ILD层中的空隙的系统。该系统包括一个或多个光源，每个光源将光引导到ILD层的相应部分。通过处理收集的光的测量系统收集从各个部分反射的光。收集的光指示在ILD层的各个部分中存在空隙。测量系统向处理器提供ILD层空隙相关数据，该处理器确定在ILD层的相应部分中是否存在空隙。处理器选择性地标记ILD层部分以促进具有ILD层空隙的IC的进一步处理和/或破坏。

124. 发明授权

US06649426B2 System and method for active control of spacer deposition 有权
标题翻译：用于主动控制间隔物沉积的系统和方法
公开(公告)号：US06649426B2
公开(公告)日：2003-11-18
申请号：US09893824
申请日：2001-06-28
申请人： Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh
发明人： Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh
IPC分类号： G01R3126
CPC分类号： H01L22/26 , H01L22/12
摘要： The present invention relates to systems and methods to regulate spacer deposition. The present invention employs a spacer deposition controller to control a spacer deposition component that deposits a spacer on a portion of a wafer. During and/or after spacer deposition, light can be directed at the spacer, wherein light reflected from the spacer is measured to determine parameters associated with the spacer deposition process. A processor operatively coupled to a measurement system and the spacer deposition controller utilizes the parameters to determine if the spacer process is proceeding in a suitable manner via comparing the measured parameters with stored acceptable parameters. If it is determined that the spacer deposition process is not proceeding as desired, then the measured parameters can be employed by the spacer deposition controller to adjust the spacer deposition process on the portion of the wafer and on subsequent portions of wafers.
摘要翻译：本发明涉及调节间隔物沉积的系统和方法。本发明使用间隔物沉积控制器来控制将间隔物沉积在晶片的一部分上的间隔物沉积组分。在间隔物沉积期间和/或之后，可以将光引向间隔物，其中测量从间隔物反射的光以确定与间隔物沉积过程相关的参数。可操作地耦合到测量系统的处理器和间隔物沉积控制器利用参数来确定间隔物过程是否以适当的方式通过将测量的参数与存储的可接受参数进行比较来进行。如果确定间隔物沉积过程没有按需要进行，则可以通过间隔物沉积控制器来采用测量的参数来调整晶片部分和晶片的后续部分上的间隔物沉积过程。

125. 发明授权

US06545273B1 Use of multiple tips on AFM to deconvolve tip effects 有权
标题翻译：在AFM上使用多个提示来解压缩尖端效应
公开(公告)号：US06545273B1
公开(公告)日：2003-04-08
申请号：US09729292
申请日：2000-12-04
申请人： Bhanwar Singh , Bharath Rangarajan , Sanjay K. Yedur
发明人： Bhanwar Singh , Bharath Rangarajan , Sanjay K. Yedur
IPC分类号： G01N2300
CPC分类号： G01Q40/00 , Y10S977/874
摘要： The present invention comprises a system for deconvolving tip effects associated with scanning tips in scanning probe microscopes and other scanning systems. The system comprises a scanning system operable to scan a feature or artifact with multiple, different type scanning tips and generate scan data associated therewith and a processor operably coupled to the scanning system. The processor is adapted to determine characteristics associated with the multiple, different type scanning tips using the scan data associated therewith. The present invention also comprises a method of determining scanning probe microscope tip effects. The method comprises the steps of scanning a feature or artifact with a plurality of different type scanning tips, resulting in a plurality of scan data sets associated with the different type scanning tips. The tip effects associated with the different type scanning tips are then deconvolved using the plurality of scan data sets.
摘要翻译：本发明包括一种用于在扫描探针显微镜和其它扫描系统中与扫描尖端相关联的尖端效应的去卷积的系统。该系统包括扫描系统，其可操作以用多个不同类型的扫描尖端扫描特征或伪像，并且生成与其相关联的扫描数据和可操作地耦合到扫描系统的处理器。处理器适于使用与其相关联的扫描数据来确定与多个不同类型扫描尖端相关联的特性。本发明还包括确定扫描探针显微镜尖端效应的方法。该方法包括以多个不同类型扫描尖端扫描特征或伪影的步骤，导致与不同类型的扫描尖端相关联的多个扫描数据集。然后使用多个扫描数据集对与不同类型的扫描尖端相关联的尖端效应进行去卷积。

126. 发明授权

US06416933B1 Method to produce small space pattern using plasma polymerization layer 失效
标题翻译：使用等离子体聚合层产生小空间图案的方法
公开(公告)号：US06416933B1
公开(公告)日：2002-07-09
申请号：US09283889
申请日：1999-04-01
申请人： Bhanwar Singh , Bharath Rangarajan , Wenge Yang
发明人： Bhanwar Singh , Bharath Rangarajan , Wenge Yang
IPC分类号： G03C500
CPC分类号： H01L21/32139 , H01L21/0276 , H01L21/0337 , H01L21/0338 , H01L21/31138 , H01L21/31144 , H01L21/312
摘要： The present invention relates to a method for forming an etch mask. A photoresist layer is patterned, wherein d1 is a smallest space dimension of an exposed area of a layer underlying the photoresist layer. A polymer layer is formed to be conformal to the patterned photoresist layer and exposed portions of the underlayer. The polymer layer is etched to form polymer sidewalls, the polymer sidewalls reducing the smallest space dimension of the exposed underlayer area to d2, wherein d2
摘要翻译：本发明涉及一种形成蚀刻掩模的方法。图案化光致抗蚀剂层，其中d1是光致抗蚀剂层下面的层的暴露区域的最小空间尺寸。聚合物层被形成为与图案化的光致抗蚀剂层和底层的暴露部分共形。蚀刻聚合物层以形成聚合物侧壁，聚合物侧壁将暴露的底层区域的最小空间尺寸减小到d2，其中d2

127. 发明授权

US06376013B1 Multiple nozzles for dispensing resist 有权
标题翻译：用于分配抗蚀剂的多个喷嘴
公开(公告)号：US06376013B1
公开(公告)日：2002-04-23
申请号：US09413143
申请日：1999-10-06
申请人： Bharath Rangarajan , Bhanwar Singh , Sanjay K. Yedur , Michael K. Templeton
发明人： Bharath Rangarajan , Bhanwar Singh , Sanjay K. Yedur , Michael K. Templeton
IPC分类号： B05D100
CPC分类号： H01L21/6715 , B05B7/0408 , B05C11/02 , B05C11/08 , G03F7/162
摘要： A system and method is provided that facilitates the application of a uniform layer of photoresist material spincoated onto a semiconductor substrate (e.g wafer). The present invention accomplishes this end by utilizing a measurement system that measures the thickness uniformity of the photoresist material applied on a test wafer by a nozzle, and then adjusting the viscosity of the photoresist material by varying the ratio in a solvent/resist mixture, and/or adjusting the temperature of the mixture. A system and method that employs a plurality of nozzles is also provided that disperses resist at different annular regions on a wafer to facilitate the application of a uniform layer of photoresist material spincoated onto the wafer. The system and method utilize a measurement system that measures the thickness and thickness uniformity of each layer of photoresist material applied at each annular region of the wafer. The measured thickness uniformity and overall thickness for each annular region is then used to adjust the volume and viscosity of a solvent/resist mixture applied through each nozzle.
摘要翻译：提供了一种系统和方法，其有利于将均匀的光致抗蚀剂材料层涂覆在半导体衬底（例如晶片）上。本发明通过利用测量系统来实现这一目的，测量系统通过喷嘴测量施加在测试晶片上的光致抗蚀剂材料的厚度均匀性，然后通过改变溶剂/抗蚀剂混合物中的比例来调节光致抗蚀剂材料的粘度，以及 /或调整混合物的温度。还提供了使用多个喷嘴的系统和方法，其将抗蚀剂分散在晶片上的不同环形区域，以便于将均匀的光致抗蚀剂材料层涂覆在晶片上。该系统和方法利用测量系统，其测量在晶片的每个环形区域施加的每层光致抗蚀剂材料的厚度和厚度均匀性。然后使用测量的每个环形区域的厚度均匀性和总厚度来调节通过每个喷嘴施加的溶剂/抗蚀剂混合物的体积和粘度。

128. 发明授权

US06277544B1 Reverse lithographic process for semiconductor spaces 有权
标题翻译：半导体空间反向光刻工艺
公开(公告)号：US06277544B1
公开(公告)日：2001-08-21
申请号：US09329153
申请日：1999-06-09
申请人： Bhanwar Singh , Bharath Rangarajan , Ursula Q. Quinto
发明人： Bhanwar Singh , Bharath Rangarajan , Ursula Q. Quinto
IPC分类号： G03C500
CPC分类号： G03F7/0035 , G03F7/40 , H01L21/76838
摘要： A reverse lithographic process is provided for more densely packing semiconductors onto a semiconductor wafer. A semiconductor wafer having deposited a number of layers of semiconductor materials has a photoresist deposited which is patterned with the spaces as lines, and then developed and trimmed. A polymer is deposited over the space photoresist structures and, when hardened, is subject to planarizing to expose the photoresist. The photoresist is removed leaving a reverse image polymer which is then used as a mask to anisotropically etch the spaces to form the closely spaced devices.
摘要翻译：提供反向光刻工艺用于在半导体晶片上更密集地堆叠半导体。已经沉积了多层半导体材料的半导体晶片具有沉积的光致抗蚀剂，其以空间为线图案化，然后显影和修整。聚合物沉积在空间光致抗蚀剂结构上，并且当硬化时，进行平面化以暴露光致抗蚀剂。去除光致抗蚀剂留下反向图像聚合物，然后将其用作掩模以各向异性地蚀刻空间以形成紧密间隔的装置。

129. 发明授权

US06191046B1 Deposition of an oxide layer to facilitate photoresist rework on polygate layer 有权
标题翻译：沉积氧化物层以促进多晶硅层上的光致抗蚀剂返修
公开(公告)号：US06191046B1
公开(公告)日：2001-02-20
申请号：US09266362
申请日：1999-03-11
申请人： Bhanwar Singh , Sanjay K. Yedur , Bharath Rangarajan
发明人： Bhanwar Singh , Sanjay K. Yedur , Bharath Rangarajan
IPC分类号： H01L21302
CPC分类号： H01L21/31133 , H01L21/0276 , H01L21/0332 , H01L21/0337
摘要： A method of reworking a photoresist used to pattern a semiconductor structure is provided. A dielectric layer is formed over an anti-reflective coating, the anti-reflective coating covering a first underlayer, the first underlayer covering a second underlayer. A first photoresist layer is formed and patterened over the dielectric layer to yield a desired photoresist pattern. An undesired feature in the patterned first photoresist layer is determined. The patterned first photoresist layer is removed. A second photoresist layer is formed and patterned over the dielectric layer. Exposed portions of the dielectric layer, the anti-reflective coating and the first underlayer are etched. A thin photoresist layer is formed over exposed portions of the second underlayer. A CMP process is performed to remove the dielectric layer. The thin photoresist layer is stripped.
摘要翻译：提供了对用于图案化半导体结构的光致抗蚀剂进行返工的方法。在抗反射涂层上形成电介质层，抗反射涂层覆盖第一底层，第一底层覆盖第二底层。形成第一光致抗蚀剂层，并在电介质层上涂覆以产生所需的光致抗蚀剂图案。确定图案化的第一光致抗蚀剂层中的不期望的特征。去除图案化的第一光致抗蚀剂层。在介电层上形成并图案化第二光致抗蚀剂层。蚀刻介电层，抗反射涂层和第一底层的露出部分。在第二底层的暴露部分上形成薄的光致抗蚀剂层。执行CMP处理以去除电介质层。剥去薄的光致抗蚀剂层。

130. 发明授权

US6034771A System for uniformly heating photoresist 有权
标题翻译：光刻胶均匀加热系统
公开(公告)号：US6034771A
公开(公告)日：2000-03-07
申请号：US185981
申请日：1998-11-04
申请人： Bharath Rangarajan , Bhanwar Singh , Sanjay K. Yedur , Michael K. Templeton
发明人： Bharath Rangarajan , Bhanwar Singh , Sanjay K. Yedur , Michael K. Templeton
IPC分类号： G03F7/16 , G03F7/38 , G03F7/40 , G01B9/02
CPC分类号： G03F7/38 , G03F7/168 , G03F7/40
摘要： A system for regulating heating temperature of a material is provided. The material may be a photoresist, a top or bottom anti-reflective coating, a low K dielectric material, SOG or other spin-on material, for example. The system includes a plurality of optical fibers, each optical fiber directing radiation to respective portions of the material. Radiation reflected from the respective portions are collected by a measuring system which processes the collected radiation. The reflected radiation are indicative of the temperature of the respective portions of the material. The measuring system provides material temperature related data to a processor which determines the temperature of the respective portions of the material. The system also includes a plurality of heating devices; each heating device corresponds to a respective portion of the material and provides for the heating thereof. The processor selectively controls the heating devices so as to regulate temperature of the respective portions of the material.
摘要翻译：提供了用于调节材料的加热温度的系统。该材料可以是例如光致抗蚀剂，顶部或底部抗反射涂层，低K电介质材料，SOG或其它旋涂材料。该系统包括多个光纤，每个光纤将辐射引导到材料的相应部分。从相应部分反射的辐射由处理收集的辐射的测量系统收集。反射的辐射表示材料各部分的温度。测量系统将材料温度相关数据提供给确定材料各部分的温度的处理器。该系统还包括多个加热装置; 每个加热装置对应于材料的相应部分并提供其加热。处理器选择性地控制加热装置以便调节材料的各个部分的温度。

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