专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

121. 发明授权

US5589404A Monolithically integrated VLSI optoelectronic circuits and a method of fabricating the same 失效
标题翻译：单片集成VLSI光电子电路及其制造方法
公开(公告)号：US5589404A
公开(公告)日：1996-12-31
申请号：US284026
申请日：1994-08-01
申请人： John E. Cunningham , Keith W. Goossen , William Y. Jan , Rajiv N. Pathak , James A. Walker
发明人： John E. Cunningham , Keith W. Goossen , William Y. Jan , Rajiv N. Pathak , James A. Walker
IPC分类号： G02F1/015 , H01L27/144 , H01L27/15 , H03K19/0952 , H01L31/18
CPC分类号： H01L27/15 , H01L27/1443 , Y10S438/974
摘要： A monolithically integrated, optoelectronic VLSI circuit is fabricated by growing optical devices on the compound semiconductor surface of a VLSI chip or wafer having pre-existing electronic devices formed thereon. In accordance with an illustrative embodiment of the present invention, a large array of surface normal optical modulating devices such as multiple quantum well modulators is grown on an impurity free surface of a VLSI chip having an array of FETs already provided thereon. The growth of such devices takes place at temperatures below 430.degree. C. on a compound semiconductor surface which has a highly ordered atomic structure. An optoelectronic switch constructed in this manner is capable of addressing electronic chips in systems handling 10,000 or more input/output optical beams.
摘要翻译：通过在其上形成有预先存在的电子器件的VLSI芯片或晶片的化合物半导体表面上生长光学器件来制造单片集成的光电VLSI电路。根据本发明的说明性实施例，在具有已经提供在其上的FET阵列的VLSI芯片的无杂质表面上生长诸如多量子阱调制器的大量表面法向光调制器件阵列。在具有高度有序原子结构的化合物半导体表面上，这种器件的生长发生在低于430℃的温度下。以这种方式构造的光电开关能够在处理10,000个或更多个输入/输出光束的系统中寻址电子芯片。

122. 发明授权

US4980892A Optical system including wavelength-tunable semiconductor laser 失效
标题翻译：光学系统包括波长可调半导体激光器
公开(公告)号：US4980892A
公开(公告)日：1990-12-25
申请号：US358972
申请日：1989-05-30
申请人： John E. Cunningham , Timothy D. Harris , Erdmann F. Schubert , Jan P. van der Ziel
发明人： John E. Cunningham , Timothy D. Harris , Erdmann F. Schubert , Jan P. van der Ziel
IPC分类号： G02B6/00 , H01S5/00 , H01S5/0625 , H01S5/30 , H01S5/34 , H04B10/00
CPC分类号： B82Y20/00 , H01S5/06255 , H01S5/34 , H01S5/3086 , H01S5/309 , H01S5/3408
摘要： Optical systems which include a particular type of wavelength-tunable semiconductor laser are disclosed. Significantly, the active layer of the laser includes a doping superlattice layer. Even more significantly, wavelength-tunability is achieved by nonuniformly, optically and/or electrically pumping the laser.

123. 发明授权

US4974044A Devices having asymmetric delta-doping 失效
标题翻译：具有不对称δ-掺杂的器件
公开(公告)号：US4974044A
公开(公告)日：1990-11-27
申请号：US341501
申请日：1989-04-21
申请人： John E. Cunningham , Alastair M. Glass , Erdmann F. Schubert
发明人： John E. Cunningham , Alastair M. Glass , Erdmann F. Schubert
IPC分类号： H01L29/201 , G02F1/015 , H01L21/20 , H01L29/15 , H01L31/0352 , H01L31/10 , H01L33/06 , H01S5/00 , H01S5/30 , H01S5/34
CPC分类号： H01L33/06 , B82Y20/00 , H01L29/157 , H01L31/035263 , H01S5/34 , H01S5/305 , H01S5/3408
摘要： The use of alternating n and p type regions asymmetrically spaced in a semiconductor material yields extremely advantageous properties. In particular, by controlling the doping level and the spatial configuration of the doped region both the device response and its optical properties are controllable. Therefore, in applications such as those involving optical switches LEDs, lasers and long wavelength detectors, both the speed of device and its optical properties are controllable. As a result, greater fabrication flexibility than previously available is possible.

124. 发明授权

US08796811B2 Hybrid substrateless device with enhanced tuning efficiency 有权
标题翻译：具有增强调谐效率的混合无基底器件
公开(公告)号：US08796811B2
公开(公告)日：2014-08-05
申请号：US13205745
申请日：2011-08-09
申请人： Ivan Shubin , Ashok V. Krishnamoorthy , John E. Cunningham
发明人： Ivan Shubin , Ashok V. Krishnamoorthy , John E. Cunningham
IPC分类号： H01L27/12 , H01L21/50 , G02B6/10 , H01L27/146 , H01L27/148
CPC分类号： H01L27/1465 , H01L21/187 , H01L27/14661 , H01L27/1467 , H01L27/14881 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2924/00
摘要： In a hybrid integrated module, a semiconductor die is mechanically coupled face-to-face to an integrated device in which the substrate has been removed. For example, the integrated circuit may include an optical device fabricated on a silicon-on-insulator (SOI) wafer in which the backside silicon handler has been completely removed, thereby facilitating improved device performance and highly efficient thermal tuning of the operating wavelength of the optical device. Moreover, the semiconductor die may be a VLSI chip that provides power, and serves as a mechanical handler and/or an electrical driver. The thermal tuning efficiency of the substrateless optical device may be enhanced by over 100× relative to an optical device with an intact substrate, and by 5× relative to an optical device in which the substrate has only been removed in proximity to the optical device.
摘要翻译：在混合集成模块中，将半导体管芯面对面地机械耦合到已经去除衬底的集成器件。例如，集成电路可以包括制造在绝缘体上硅（SOI）晶片上的光学器件，其中背面硅处理器已经被完全去除，从而有助于改进器件性能和高效率地调谐工作波长光学装置。此外，半导体管芯可以是提供电力并用作机械处理器和/或电驱动器的VLSI芯片。相对于具有完整衬底的光学器件，无基底光学器件的热调谐效率可以提高超过100倍，并且相对于其中衬底仅在光学器件附近被去除的光学器件可以提高5倍。

125. 发明授权

US08742576B2 Maintaining alignment in a multi-chip module using a compressible structure 有权
标题翻译：使用可压缩结构在多芯片模块中保持对准
公开(公告)号：US08742576B2
公开(公告)日：2014-06-03
申请号：US13397593
申请日：2012-02-15
申请人： Hiren D. Thacker , Hyung Suk Yang , Ivan Shubin , John E. Cunningham
发明人： Hiren D. Thacker , Hyung Suk Yang , Ivan Shubin , John E. Cunningham
IPC分类号： H01L23/48 , H01L23/498 , H01L21/50
CPC分类号： H01L25/0652 , H01L23/48 , H01L24/16 , H01L24/72 , H01L24/73 , H01L24/90 , H01L24/91 , H01L25/50 , H01L2224/131 , H01L2224/16227 , H01L2224/73201 , H01L2224/73251 , H01L2224/81138 , H01L2224/81815 , H01L2224/9211 , H01L2225/06517 , H01L2225/06527 , H01L2225/06531 , H01L2225/06562 , H01L2225/06593 , H01L2924/15153 , H01L2924/157 , H01L2924/15787 , H01L2924/15788 , H01L2924/1579 , H01L2924/3511 , H01L2924/37001 , H01L2924/00 , H01L2924/014 , H01L2224/16 , H01L2224/72 , H01L2224/81 , H01L2224/90 , H01L2924/00014 , H01L2924/00012
摘要： An MCM includes a two-dimensional array of facing chips, including island chips and bridge chips that communicate with each other using overlapping connectors. In order to maintain the relative vertical spacing of these connectors, compressible structures are in cavities in a substrate, which house the bridge chips, provide a compressive force on back surfaces of the bridge chips. These compressible structures include a compliant material with shape and volume compression. In this way, the MCM may ensure that facing surfaces of the island chips and the bridge chips, as well as connectors on these surfaces, are approximately coplanar without bending the bridge chips.
摘要翻译： MCM包括面向芯片的二维阵列，包括使用重叠连接器彼此通信的岛芯片和桥芯片。为了保持这些连接器的相对垂直间隔，可压缩结构位于衬底中的空腔中，其容纳桥芯片，在桥芯片的后表面上提供压缩力。这些可压缩结构包括具有形状和体积压缩的柔性材料。以这种方式，MCM可以确保岛芯片和桥芯片的面对表面以及这些表面上的连接器在不弯曲桥接芯片的情况下大致共面。

126. 发明授权

US08600201B2 Optical device with enhanced mechanical strength 有权
标题翻译：具有增强机械强度的光学装置
公开(公告)号：US08600201B2
公开(公告)日：2013-12-03
申请号：US13032561
申请日：2011-02-22
申请人： Hiren D. Thacker , Ivan Shubin , John E. Cunningham
发明人： Hiren D. Thacker , Ivan Shubin , John E. Cunningham
IPC分类号： G02B6/12
CPC分类号： G02B6/12007
摘要： An optical device implemented on a substrate (such as silicon) is described. This optical device includes a wavelength-sensitive optical component with a high thermal resistance to a surrounding external environment and a low thermal resistance to a localized thermal-tuning mechanism (such as a heater), which modifies a temperature of the wavelength-sensitive optical component, thereby specifying an operating wavelength of the wavelength-sensitive optical component. In particular, the thermal resistance associated with a thermal dissipation path from the thermal-tuning mechanism to the external environment via the substrate is increased by removing a portion of the substrate to create a gap that is proximate to the thermal-tuning mechanism and the wavelength-sensitive optical component. Furthermore, the optical device includes a binder material mechanically coupled to the substrate and proximate to the gap, thereby maintaining a mechanical strength of the optical device.
摘要翻译：描述了在衬底（例如硅）上实现的光学器件。该光学器件包括对周围的外部环境具有高热阻的波长敏感的光学部件和对局部的热调谐机构（例如加热器）的低热阻，其改变了波长敏感光学部件的温度从而指定波长敏感光学部件的工作波长。特别地，通过去除衬底的一部分以产生靠近热调谐机构的间隙和波长的距离，与通过衬底从热调谐机构到外部环境的散热路径相关联的热阻增加敏感光学部件。此外，光学装置包括机械耦合到基板并且靠近间隙的粘合剂材料，从而保持光学装置的机械强度。

127. 发明申请

US20130156366A1 EFFICIENT INTER-CHIP OPTICAL COUPLING 有权
标题翻译：有效的芯片间光耦合
公开(公告)号：US20130156366A1
公开(公告)日：2013-06-20
申请号：US13331782
申请日：2011-12-20
申请人： Kannan Raj , John E. Cunningham , Hiren D. Thacker
发明人： Kannan Raj , John E. Cunningham , Hiren D. Thacker
IPC分类号： G02B6/12
CPC分类号： G02B6/1228 , G02B6/12004
摘要： In an MCM, an optical signal is conveyed by an optical waveguide disposed on a surface of a first substrate to a first optical coupler. This first optical coupler redirects the optical signal out of the plane of the optical waveguide. Then, an optical interposer guides the optical signal between the first optical coupler and a second optical coupler on a surface of a second substrate, thereby reducing spatial expansion of the optical signal between the optical couplers. Moreover, the second optical coupler redirects the optical signal into a plane of an optical waveguide disposed on a surface of the second substrate, which then conveys the optical signal.
摘要翻译：在MCM中，光信号由设置在第一基板的表面上的光波导传送到第一光耦合器。该第一光耦合器将光信号重定向到光波导的平面外。然后，光学插入器在第二基板的表面上引导第一光耦合器和第二光耦合器之间的光信号，由此减小光耦合器之间的光信号的空间扩展。此外，第二光耦合器将光信号重定向到设置在第二基板的表面上的光波导的平面中，然后传输光信号。

128. 发明申请

US20130015578A1 INTERCONNECTION AND ASSEMBLY OF THREE-DIMENSIONAL CHIP PACKAGES 有权
标题翻译：三维芯片包装的互连和组装
公开(公告)号：US20130015578A1
公开(公告)日：2013-01-17
申请号：US13182220
申请日：2011-07-13
申请人： Hiren D. Thacker , John E. Cunningham , Ivan Shubin , Ashok V. Krishnamoorthy
发明人： Hiren D. Thacker , John E. Cunningham , Ivan Shubin , Ashok V. Krishnamoorthy
IPC分类号： H01L23/498 , H01L21/50 , H01L23/48
CPC分类号： H01L25/0657 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/81 , H01L25/18 , H01L25/50 , H01L2224/13005 , H01L2224/13017 , H01L2224/13027 , H01L2224/13109 , H01L2224/13111 , H01L2224/13147 , H01L2224/14181 , H01L2224/14183 , H01L2224/16105 , H01L2224/16108 , H01L2224/16111 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/481 , H01L2224/48227 , H01L2224/73103 , H01L2224/81138 , H01L2224/81899 , H01L2225/06551 , H01L2225/06555 , H01L2225/06593 , H01L2924/01327 , H01L2924/07802 , H01L2924/12042 , H01L2924/01082 , H01L2924/00014 , H01L2924/01047 , H01L2924/01029 , H01L2924/00012 , H01L2924/00
摘要： In a chip package, semiconductor dies in a vertical stack of semiconductor dies or chips (which is referred to as a ‘plank stack’) are aligned by positive features that are mechanically coupled to negative features recessed below the surfaces of adjacent semiconductor dies. Moreover, the chip package includes an interposer plate at approximately a right angle to the plank stack, which is electrically coupled to the semiconductor dies along an edge of the plank stack. In particular, electrical pads proximate to a surface of the interposer plate (which are along a stacking direction of the plank stack) are electrically coupled to pads that are proximate to edges of the semiconductor dies by an intervening conductive material, such as solder balls or spring connectors. Note that the chip package may facilitate high-bandwidth communication of signals between the semiconductor dies and the interposer plate.
摘要翻译：在芯片封装中，半导体管芯或芯片（被称为板堆叠）的垂直堆叠中的半导体管芯通过机械耦合到相邻半导体管芯的表面下方的负特性的正特性对准。此外，芯片封装包括与板堆叠大致成直角的插入板，其沿着板堆的边缘电耦合到半导体管芯。特别地，靠近插入板的表面（沿着板堆叠的堆叠方向）的电焊盘通过中间导电材料（例如焊料球）电耦合到靠近半导体管芯的边缘的焊盘，弹簧连接器。注意，芯片封装可以促进半导体管芯和插入板之间的信号的高带宽通信。

129. 发明申请

US20130003310A1 CHIP PACKAGE TO SUPPORT HIGH-FREQUENCY PROCESSORS 有权
标题翻译：芯片包支持高频处理器
公开(公告)号：US20130003310A1
公开(公告)日：2013-01-03
申请号：US13171072
申请日：2011-06-28
申请人： Kannan Raj , Ivan Shubin , John E. Cunningham
发明人： Kannan Raj , Ivan Shubin , John E. Cunningham
IPC分类号： H05K7/00 , H05K7/20
CPC分类号： H05K7/1092 , H01L23/5384 , H01L25/18 , H01L2224/16225 , H01L2224/73253 , H01L2924/10253 , H01L2924/15311 , H01L2924/00
摘要： A chip package includes a processor, an interposer chip and a voltage regulator module (VRM). The interposer chip is electrically coupled to the processor by first electrical connectors proximate to a surface of the interposer chip. Moreover, the interposer chip includes second electrical connectors proximate to another surface of the interposer chip, which are electrically coupled to the first electrical connectors by through-substrate vias (TSVs) in the interposer chip. Note that the second electrical connectors can electrically couple the interposer chip to a circuit board. Furthermore, the VRM is electrically coupled to the processor by the interposer chip, and is proximate to the processor in the chip package, thereby reducing voltage droop. For example, the VRM may be electrically coupled to the surface of the interposer chip, and may be adjacent to the processor. Alternatively, the VRM may be electrically coupled to the other surface of the interposer chip.
摘要翻译：芯片封装包括处理器，插入器芯片和电压调节器模块（VRM）。插入器芯片通过靠近插入器芯片的表面的第一电连接器电耦合到处理器。此外，插入器芯片包括靠近插入器芯片的另一表面的第二电连接器，其通过插入器芯片中的贯穿衬底通孔（TSV）电耦合到第一电连接器。注意，第二电连接器可以将插入器芯片电连接到电路板。此外，VRM通过插入器芯片电耦合到处理器，并且靠近芯片封装中的处理器，从而降低电压下降。例如，VRM可以电耦合到插入器芯片的表面，并且可以与处理器相邻。或者，VRM可以电耦合到插入器芯片的另一表面。

130. 发明申请

US20120326322A1 CHIP PACKAGE WITH REINFORCED POSITIVE ALIGNMENT FEATURES 有权
标题翻译：具有加强的正向对准功能的芯片包
公开(公告)号：US20120326322A1
公开(公告)日：2012-12-27
申请号：US13165599
申请日：2011-06-21
申请人： Ashok V. Krishnamoorthy , Craig A. Stephen , John E. Cunningham , James G. Mitchell
发明人： Ashok V. Krishnamoorthy , Craig A. Stephen , John E. Cunningham , James G. Mitchell
IPC分类号： H01L23/48 , B32B3/00
CPC分类号： H01L24/13 , H01L23/48 , H01L24/16 , H01L24/81 , H01L2224/10126 , H01L2224/131 , H01L2224/1319 , H01L2224/1357 , H01L2224/13609 , H01L2224/13611 , H01L2224/13655 , H01L2224/13671 , H01L2224/16105 , H01L2224/16145 , H01L2224/81097 , H01L2224/81141 , H01L2224/81193 , H01L2224/81194 , H01L2224/81815 , H01L2224/81855 , Y10T428/24479 , H01L2924/00014 , H01L2924/014 , H01L2924/00012 , H01L2924/01079 , H01L2924/01029 , H01L2924/01028 , H01L2924/01082 , H01L2924/0105
摘要： A chip package includes a substrate having a positive feature, which is defined on a surface of the substrate and which protrudes above a region on the surface proximate to the positive feature. Furthermore, the chip package includes a mechanical reinforcement mechanism defined on the substrate proximate to the positive feature that increases a lateral shear strength of the positive feature relative to the substrate. In this way, the chip package may facilitate increased reliability of a multi-chip module (MCM) that includes the chip package.
摘要翻译：芯片封装包括具有正特征的衬底，其被限定在衬底的表面上并且突出在接近正特征的表面上的区域上方。此外，芯片封装包括限定在靠近正特征的基板上的机械加强机构，其增加正特征相对于基板的横向剪切强度。以这种方式，芯片封装可以促进包括芯片封装的多芯片模块（MCM）的增加的可靠性。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式