A chip package includes a processor, an interposer chip and a voltage regulator module (VRM). The interposer chip is electrically coupled to the processor by first electrical connectors proximate to a surface of the interposer chip. Moreover, the interposer chip includes second electrical connectors proximate to another surface of the interposer chip, which are electrically coupled to the first electrical connectors by through-substrate vias (TSVs) in the interposer chip. Note that the second electrical connectors can electrically couple the interposer chip to a circuit board. Furthermore, the VRM is electrically coupled to the processor by the interposer chip, and is proximate to the processor in the chip package, thereby reducing voltage droop. For example, the VRM may be electrically coupled to the surface of the interposer chip, and may be adjacent to the processor. Alternatively, the VRM may be electrically coupled to the other surface of the interposer chip.