专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

111. 发明申请

US20170084262A1 PREAMPLIFICATION SYSTEM FOR AN ACOUSTIC GUITAR OR OTHER MUSIC INSTRUMENT WITH VIBRATING PARTS 审中-公开
公开(公告)号：US20170084262A1
公开(公告)日：2017-03-23
申请号：US15310895
申请日：2015-05-12
申请人： HEART SOUND ITALY S.R.L.
发明人： Antonio SELMO
IPC分类号： G10H3/18 , H03F3/183 , H03G3/20 , H03F3/45 , G10H3/14 , H03F3/70
CPC分类号： G10H3/182 , G10H3/143 , G10H3/185 , G10H3/186 , G10H2220/395 , G10H2220/471 , G10H2220/531 , G10H2220/565 , H03F3/183 , H03F3/45475 , H03F3/70 , H03G3/20
摘要： A sound detection system of a musical instrument with vibrating parts includes at least a pair of sensors and a preamplification unit for processing the signal output from the two sensors along respective channels. At least one of the pair of sensors is a piezoelectric transducer and the other one of the pair of sensors is a different-type transducer. The preamplification unit includes, for each channel, an input stage, including an amplifier circuit and an equalization circuit, and an output stage including at least a weighted adder circuit and at least two volume controls with arbitrary logarithmic response curve. At least the input stage for the channel of the piezoelectric transducer is a charge amplifier circuit and at least one of the other input stages can be configured both as a charge amplifier and as non-inverting amplifier with high input impedance. The equalization circuit includes an RC circuit.

112. 发明申请

US20170055056A1 Microphone Assembly and Method of Manufacturing a Microphone Assembly 审中-公开
标题翻译：麦克风组合和制造麦克风组件的方法
公开(公告)号：US20170055056A1
公开(公告)日：2017-02-23
申请号：US15306928
申请日：2014-05-12
申请人： EPCOS AG
发明人： Gino Rocca
IPC分类号： H04R1/04 , H03F3/183 , H03G3/30 , H04R19/04 , H03F3/45
CPC分类号： H04R1/04 , H03F3/183 , H03F3/45071 , H03F2200/03 , H03F2200/267 , H03G3/3005 , H04R19/005 , H04R19/04 , H04R2201/003
摘要： A microphone assembly and a method for manufacturing a microphone assembly are disclosed. In an embodiment, the microphone assembly includes a MEMS dual backplate microphone configured to provide a differential output signal, an ASIC including a differential amplifier configured to receive the differential output signal and a control element configured to adjust at least one of a setting of the MEMS dual backplate microphone and a setting of the ASIC.
摘要翻译：公开了麦克风组件和用于制造麦克风组件的方法。在一个实施例中，麦克风组件包括被配置为提供差分输出信号的MEMS双背板麦克风，包括被配置为接收差分输出信号的差分放大器的ASIC，以及被配置为调整MEMS的设置中的至少一个的控制元件双背板麦克风和ASIC的设置。

113. 发明申请

US20160373076A1 AVERAGE CURRENT-MODE FEEDBACK CONTROL OF MULTI-CHANNEL CLASS-D AUDIO AMPLIFIER 有权
标题翻译：多通道等级音频放大器的平均电流模式反馈控制
公开(公告)号：US20160373076A1
公开(公告)日：2016-12-22
申请号：US15185637
申请日：2016-06-17
申请人： Crestron Electronics, Inc.
发明人： Robert Buono
IPC分类号： H03F3/217 , H04R3/04 , H04R3/02 , H03F3/183 , H03F1/34
CPC分类号： H03F3/2173 , H03F1/34 , H03F3/183 , H03F3/68 , H03F2200/03 , H03F2200/351 , H04R3/02 , H04R3/04
摘要： Described herein are several configurations of Class-D audio amplifiers, including a single-ended and a bridge-tied load (BTL) configuration, in which voltage-mode control and average current-mode control circuitry in feedback loops can be included to control the outputs of the Class-D amplifier to reduce open-loop errors and maintain a relatively high loop gain over an expected audio frequency range. The average current-mode control circuitry monitors current through a resistor common to both a current flow into a positive terminal of a loudspeaker associated with the amplifier and a current flow into a negative terminal of the loudspeaker. The voltage-mode control circuitry works with the average current-mode control circuitry in controlling the output of the Class-D audio amplifier.
摘要翻译：这里描述了D类音频放大器的几种配置，包括单端和桥接负载（BTL）配置，其中可以包括反馈回路中的电压模式控制和平均电流模式控制电路以控制 D类放大器的输出，以减少开环误差，并在预期音频范围内保持较高的环路增益。平均电流模式控制电路通过与放大器相关联的扬声器的正极中的电流和流入扬声器的负极的电流的电流来监视电流。电压模式控制电路与平均电流模式控制电路一起工作，以控制D类音频放大器的输出。

114. 发明申请

US20160360315A1 AUDIO APPARATUS, AND CURRENT CONTROL METHOD 有权
标题翻译：音频设备和电流控制方法
公开(公告)号：US20160360315A1
公开(公告)日：2016-12-08
申请号：US15151630
申请日：2016-05-11
申请人： ALPINE ELECTRONICS, INC.
发明人： Minoru Matsuyama
IPC分类号： H04R3/00 , H03F1/02 , H03F3/21 , H04R29/00 , H03F3/183
CPC分类号： H04R3/007 , H03F1/0211 , H03F3/183 , H03F3/21 , H03F2200/03 , H03F2200/462 , H03F2200/465 , H03F2200/471 , H03G3/3005 , H03G7/002 , H03G7/06 , H03G7/08 , H04R29/001 , H04R2499/13
摘要： An audio apparatus includes a signal processor, a power amplifier, a speaker, and a controller. A current consumption prediction unit in the controller predicts current consumption on the basis of a monitoring result of an output level monitoring unit in the signal processor and/or a monitoring result of a power supply voltage monitoring unit in the controller. A limiter control unit in the controller controls a limiter in the signal processor in a normal mode or a current limiting mode on the basis of predicted current consumption. In the current limiting mode, the limiter is controlled so that an attenuation speed higher than that in the normal mode and a threshold value smaller than that in the normal mode are obtained.
摘要翻译：音频装置包括信号处理器，功率放大器，扬声器和控制器。控制器中的电流消耗预测单元基于信号处理器中的输出电平监视单元的监视结果和/或控制器中的电源电压监视单元的监视结果来预测电流消耗。控制器中的限制器控制单元基于预测的电流消耗以正常模式或限流模式控制信号处理器中的限制器。在电流限制模式中，限制器被控制，使得衰减速度高于正常模式，并且获得比正常模式小的阈值。

115. 发明授权

US09515620B2 Amplifier arrangement comprising a master amplifier and at least one slave amplifier 有权
标题翻译：放大器装置包括主放大器和至少一个从放大器
公开(公告)号：US09515620B2
公开(公告)日：2016-12-06
申请号：US14598343
申请日：2015-01-16
申请人： Robert Bosch GmbH
发明人： Josef Plager , Patrick Engl , Thomas Stein
IPC分类号： H03F3/217 , H03F3/183 , H03F3/21 , H03F3/181 , H03F3/68
CPC分类号： H03F3/183 , H03F3/181 , H03F3/211 , H03F3/217 , H03F3/2178 , H03F3/68 , H03F2200/03 , H03F2200/129 , H03F2200/171 , H03F2200/432
摘要： An amplifier arrangement for amplifying at least one first and one second audio input signal. In one embodiment, the arrangement includes a master amplifier designed as a class D amplifier. The first audio input signal is applied to the master audio input and a master audio output signal is applied to the master audio output. The arrangement also includes a master feedback loop; thus enabling the master amplifier to be designed as a self-oscillating class D amplifier having a master oscillation frequency, at least one slave amplifier, a slave feedback loop, wherein a slave audio output signal or signal portions thereof are fed back into a slave audio input, and a master-slave coupling loop, wherein the master audio output signal or signal portions thereof is coupled into the slave audio input, so that the slave amplifier has the master oscillation frequency as its oscillation frequency.
摘要翻译：一种用于放大至少一个第一和一个第二音频输入信号的放大器装置。在一个实施例中，该装置包括被设计为D类放大器的主放大器。第一音频输入信号被施加到主音频输入，并且主音频输出信号被施加到主音频输出。该装置还包括主反馈回路; 从而使得主放大器被设计为具有主振荡频率的自激振荡D类放大器，至少一个从放大器，从反馈回路，其中从属音频输出信号或其信号部分被反馈到从属音频输入和主从耦合回路，其中主音频输出信号或其信号部分耦合到从属音频输入，使得从放大器具有主振荡频率作为其振荡频率。

116. 发明申请

US20160329868A1 HIGH EFFICIENCY CLASS D AMPLIFIER WITH REDUCED GENERATION OF EMI 有权
标题翻译：具有降低EMI产生的高效级D放大器
公开(公告)号：US20160329868A1
公开(公告)日：2016-11-10
申请号：US14715879
申请日：2015-05-19
申请人： STMicroelectronics (Shenzhen) R&D Co. Ltd
发明人： Qi Yu Liu , Hong Wu Lin
IPC分类号： H03F3/217 , H03F3/45 , H03F3/183
CPC分类号： H03F3/183 , H03F3/217 , H03F3/2171 , H03F3/2173 , H03F3/45475 , H03F2200/03 , H03F2203/45138
摘要： A class-D amplifier includes a signal processing block. The signal processing block generates a first processed signal representing a difference between a first differential signal and a second differential signal, when a duty cycle of the first differential signal is greater than that of the second differential signal. The signal processing block generates the first processed signal representing a reference DC level, when the duty cycle of the first differential signal is less than that of the second differential signal. A second processed signal representing a difference between the second differential signal and the first differential signal is generated when the duty cycle of the second differential signal is greater than that of the first differential signal, and the second processed signal representing the reference DC level is generated when the duty cycle of the second differential signal is less than that of the first differential signal.
摘要翻译： D类放大器包括信号处理块。当第一差分信号的占空比大于第二差分信号的占空比时，信号处理块产生表示第一差分信号和第二差分信号之间的差的第一处理信号。当第一差分信号的占空比小于第二差分信号的占空比时，信号处理块产生表示参考DC电平的第一处理信号。当第二差分信号的占空比大于第一差分信号的占空比时，产生表示第二差分信号和第一差分信号之间的差的第二处理信号，并且生成表示参考DC电平的第二处理信号当第二差分信号的占空比小于第一差分信号的占空比时。

117. 发明申请

US20160322946A1 Power Decrease Based on Packet Type 审中-公开
标题翻译：基于分组类型的功率降低
公开(公告)号：US20160322946A1
公开(公告)日：2016-11-03
申请号：US14977597
申请日：2015-12-21
申请人： Sonos, Inc.
发明人： Steve F. Holmgren , John L. MacFarlane
IPC分类号： H03G1/00 , H04R27/00 , H03F3/183 , G06F3/16 , H03F1/52
CPC分类号： G06F1/3296 , G06F1/3209 , G06F1/3246 , G06F3/162 , G06F3/165 , H03F1/52 , H03F3/183 , H03F21/00 , H03F2200/03 , H03G1/0088 , H04L69/22 , H04R27/00 , H04R2227/003 , H04R2227/005 , H04R2420/01
摘要： Techniques for controlling one or more audio amplifiers in or associated with a device coupled on a local area network are disclosed. The device receives at least one selected source from other devices also coupled on the network According to one aspect of the techniques, an automatic shutdown control module is provided in the device to power down the audio amplifiers when there is no audio data flow coming to the device or power up the audio amplifiers when there is audio data flow coming to the device. In one embodiment, the procedure to power down or power up the amplifiers is in accordance with a hysteresis, wherein the hysteresis, being lagging of an effect behind its cause, protects the amplifiers and makes the powering-down or powering-up procedure unnoticeable to a user.
摘要翻译：公开了用于控制耦合在局域网上的设备中或与其相关联的一个或多个音频放大器的技术。该设备从也在网络上耦合的其他设备接收至少一个选择的源。根据该技术的一个方面，在该设备中提供自动关机控制模块，以便在没有音频数据流到达当音频数据流进入设备时，设备或加电音频放大器。在一个实施例中，放大器断电或上电的过程与迟滞相一致，其中迟滞其原因的滞后保护放大器，并且使掉电或上电过程不明显，一个用户

118. 发明申请

US20160309274A1 IMPLEMENTATION METHOD AND DEVICE OF MULTI-BIT MODULATION-BASED DIGITAL SPEAKER SYSTEM 有权
标题翻译：基于多点调制的数字扬声器系统的实现方法和设备
公开(公告)号：US20160309274A1
公开(公告)日：2016-10-20
申请号：US15101147
申请日：2014-12-02
申请人： SUZHOU SONAVOX ELECTRONICS CO., LTD.
发明人： DENGYONG MA , JUN YANG , JIANMING ZHOU , GUOQIANG CHAI , YEFENG CAI , YONGSHENG MU
IPC分类号： H04S5/00 , H04R5/04 , H03F3/183 , H03M3/00 , H03F3/21 , H04R5/02 , H04R3/04
CPC分类号： H04S5/00 , G06F3/16 , H03F3/183 , H03F3/185 , H03F3/21 , H03F3/217 , H03F3/2175 , H03F3/68 , H03F2200/03 , H03F2200/331 , H03M3/04 , H03M3/338 , H03M3/424 , H03M3/508 , H04R1/005 , H04R3/04 , H04R5/02 , H04R5/04 , H04R2201/403
摘要： The present invention discloses an implementation method and a device of a multi-bit Δ-Σ modulation-based digital speaker system. The method comprises, 1) digital format converting; 2) oversampling interpolation filtering; 3) multi-bit Δ-Σ modulating; 4) thermometer coding; 5) multi-channel mismatch shaping; 6) coding format converting; 7) multi-channel digital power-amplifying; 8) driving a speaker array or a multiple voice coil speaker to sound. The device comprises: a digital input interface, an oversampling interpolation filter, a multi-bit Δ-Σ modulator, a thermometer coder, a multi-channel mismatch shaper, a coding format converter, a multi-channel digital power-amplifier, and a speaker array or a multiple voice coil speaker; each portion being connected in proper order. The present invention can achieve a high-power output under a low-voltage power supply, save power consumption, implement a single-chip integration of a multi-channel reproducing system, reduce the volume and weight of the system and the implementing cost, and improve the quality of the reproduced sound.
摘要翻译：本发明公开了一种基于多位Δ-Σ调制的数字扬声器系统的实现方法和装置。该方法包括：1）数字格式转换; 2）过采样内插滤波; 3）多位Δ-Σ调制; 4）温度计编码; 5）多通道失配成形; 6）编码格式转换; 7）多通道数字功率放大; 8）驱动扬声器阵列或多个音圈扬声器发出声音。该装置包括：数字输入接口，过采样内插滤波器，多位Δ-Σ调制器，温度计编码器，多通道失配整形器，编码格式转换器，多通道数字功率放大器和扬声器阵列或多个音圈扬声器; 每个部分按正确的顺序连接。本发明可以在低电压电源下实现大功率输出，节省功耗，实现多通道再现系统的单芯片集成，降低系统的体积和重量以及实施成本，提高再现声音的质量。

119. 发明授权

US09467100B2 Reference amplifier coupled to a voltage divider circuit to provide feedback for an amplifier 有权
标题翻译：参考放大器耦合到分压器电路以为放大器提供反馈
公开(公告)号：US09467100B2
公开(公告)日：2016-10-11
申请号：US14334442
申请日：2014-07-17
申请人： QUALCOMM Incorporated
发明人： Vijayakumar Dhanasekaran
IPC分类号： H03F1/36 , H03F3/183 , H03F3/21 , H03F3/45 , H03F3/187
CPC分类号： H03F3/183 , H03F3/187 , H03F3/211 , H03F3/45071 , H03F3/45475 , H03F3/45941 , H03F2200/03 , H03F2200/156 , H03F2203/45116 , H03F2203/45512 , H03F2203/45521 , H03F2203/45528
摘要： An apparatus includes a voltage divider circuit and a reference amplifier coupled to the voltage divider circuit. The reference amplifier is configured to provide a feedback voltage to input circuitry of an amplifier.
摘要翻译：一种装置包括分压器电路和耦合到分压器电路的参考放大器。参考放大器被配置为向放大器的输入电路提供反馈电压。

120. 发明申请

US20160276984A1 SIGNAL ENVELOPE PROCESSING 有权
公开(公告)号：US20160276984A1
公开(公告)日：2016-09-22
申请号：US15165737
申请日：2016-05-26
申请人： Cirrus Logic International Semiconductor Ltd.
发明人： Malcolm BLYTH , Graeme Gordon MACKAY
IPC分类号： H03F1/02 , H03F3/183
CPC分类号： H03F1/0227 , H03F3/183 , H03F3/68 , H03F2200/03 , H03F2200/102
摘要： Methods and apparatus for detection and tracking of a signal envelope. The circuit comprises absolute value circuitry configured to receive data samples and output a first value corresponding to the magnitude of said data samples. An envelope tracker maintains an envelope output value and compares the first value to the current envelope output value and modifies the envelope output value based on said comparison to provide the envelope output value with predetermined attack and decay characteristics. The absolute value circuitry has a first input for receiving a first digital signal at a first sample rate and a second input for receiving an interpolated version of the first digital signal at a second sample rate which is higher than the first sample rate and outputs the first value based on the magnitudes of the samples received at the first input and the samples received at the second input. Using the first digital signal provides an early indication of any increases in signal envelope whereas the second digital signal can allow a more accurate estimation.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式