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111. 发明授权

US06972836B2 Measuring method of illuminance unevenness of exposure apparatus, correcting method of illuminance unevenness, manufacturing method of semiconductor device, and exposure apparatus 失效
标题翻译：曝光装置的照度不均匀的测量方法，照度不均匀的校正方法，半导体装置的制造方法和曝光装置
公开(公告)号：US06972836B2
公开(公告)日：2005-12-06
申请号：US10131083
申请日：2002-04-25
申请人： Kazuya Sato , Soichi Inoue , Satoshi Tanaka
发明人： Kazuya Sato , Soichi Inoue , Satoshi Tanaka
IPC分类号： G01J1/26 , G03F1/00 , G03F1/70 , G03F7/20 , H01L21/027 , G01J1/00
CPC分类号： G03F7/70125 , G01J1/26 , G03F7/70133
摘要： There is disclosed a measuring method of illuminance unevenness of an exposure apparatus in which the illuminance unevenness resulting from a projection optical system, to project the light passed through the photomask onto the finite area on the photosensitive substrate via the projection optical system and to expose the photomask to the light, the method comprising calculating an average value of transmittance of the projection optical system of each path of the light emitted from one point of the photomask and reaching an imaging point for each of a plurality of imaging points in the finite area on the photosensitive substrate, and calculating the illuminance unevenness in the finite area on the photosensitive substrate from the average value of the transmittance obtained for each imaging point.
摘要翻译：公开了一种曝光装置的照度不均匀性的测量方法，其中由投影光学系统产生的照度不均匀性将通过光掩模的光投影到经由投影光学系统的感光基板上的有限区域上，光掩模，该方法包括计算从光掩模的一个点发射的光的每个路径的投影光学系统的透射率的平均值，并且到达有限区域中的多个成像点中的每一个的成像点感光基板，并且根据对于每个成像点获得的透射率的平均值计算感光基板上的有限区域中的照度不均匀度。

112. 发明授权

US06806941B2 Pattern forming method and pattern forming apparatus 失效
标题翻译：图案形成方法和图案形成装置
公开(公告)号：US06806941B2
公开(公告)日：2004-10-19
申请号：US10006133
申请日：2001-12-10
申请人： Soichi Inoue , Iwao Higashikawa , Yoji Ogawa , Shigehiro Hara , Kazuko Yamamoto
发明人： Soichi Inoue , Iwao Higashikawa , Yoji Ogawa , Shigehiro Hara , Kazuko Yamamoto
IPC分类号： G03B2742
CPC分类号： G03F7/70425
摘要： A method of forming a pattern for a semiconductor device comprises the steps of forming a photosensitive film on a substrate and radiating the photosensitive film on the substrate with a beam of a predetermined shape consisting of one of a charged particle beam and an electromagnetic beam, thereby forming an exposed region of a desired shape, the latter step including the step of exposing each of unit regions by a single shot of the beam of the predetermined shape for a predetermined period of time, repeating the exposure a plurality of times, and butt-joining the exposed unit regions to thereby form the exposed region of the desired shape, wherein, in the step of forming the exposed region of the desired shape, butting portions of the unit regions are situated in a first area of a layer to be formed other than a second area in the layer in which predetermined characteristics of a function of the semiconductor device are determined by a pattern width of the exposed region in association with another pattern formed in another layer.
摘要翻译：一种形成半导体器件的图案的方法包括以下步骤：在基片上形成感光膜，并用由带电粒子束和电磁束之一构成的预定形状的光束将光敏膜照射在基片上，由此形成期望形状的曝光区域，后一步骤包括通过预定时间段的光束的单次曝光曝光每个单元区域的步骤，重复曝光多次，接合曝光的单元区域，从而形成所需形状的曝光区域，其中在形成所需形状的曝光区域的步骤中，单元区域的对接部分位于待形成的层的第一区域中比在半导体器件的功能的预定特性由相关联中的暴露区域的图案宽度确定的层中的第二区域 n在另一层中形成另一图案。

113. 发明授权

US06727028B2 Pattern formation method, mask for exposure used for pattern formation, and method of manufacturing the same 有权
标题翻译：图案形成方法，用于图案形成的曝光用掩模及其制造方法
公开(公告)号：US06727028B2
公开(公告)日：2004-04-27
申请号：US10132197
申请日：2002-04-26
申请人： Toshiya Kotani , Satoshi Tanaka , Soichi Inoue
发明人： Toshiya Kotani , Satoshi Tanaka , Soichi Inoue
IPC分类号： G03F900
CPC分类号： G03F1/36 , G03F7/70433 , G03F7/70441
摘要： In a pattern forming method, a cell pattern of each of memory cells is separated into a first pattern group provided at a predetermined position inside from an endmost portion of a cell and a second pattern group excluding the first pattern group. A mask size of the second pattern group is determined such that the second pattern group secures a sufficient process margin relative to a given size and size accuracy. A mask size of the first pattern group is optimized according to a peripheral pattern environment such that the first pattern group has a desired size under the above condition. A mask pattern of the memory cell is formed according to the mask size of the second pattern group and the first pattern group. The cell pattern is formed on a semiconductor wafer, using the mask pattern.
摘要翻译：在图案形成方法中，每个存储单元的单元图案被分离成设置在从单元的最末端部分的内部的预定位置处的第一图案组和除了第一图案组之外的第二图案组。确定第二图案组的掩模尺寸，使得第二图案组相对于给定的尺寸和尺寸精度确保足够的加工余量。根据周边图案环境优化第一图案组的掩模尺寸，使得第一图案组在上述条件下具有期望的尺寸。根据第二图案组和第一图案组的掩模尺寸形成存储单元的掩模图案。使用掩模图案在半导体晶片上形成电池图案。

114. 发明授权

US06536032B1 Method of processing exposure mask-pattern data, simulation using this method, and recording medium 失效
标题翻译：曝光掩模图案数据的处理方法，使用该方法的模拟以及记录介质
公开(公告)号：US06536032B1
公开(公告)日：2003-03-18
申请号：US09510245
申请日：2000-02-22
申请人： Satoshi Tanaka , Soichi Inoue
发明人： Satoshi Tanaka , Soichi Inoue
IPC分类号： G06F1750
CPC分类号： G03F1/36
摘要： Disclosed herein is a method of processing exposure mask-pattern data. The method comprises the steps of performing a re-sizing process of adding a prescribed positive bias &Dgr; to design data of an exposure mask pattern, thereby forming first mask-pattern data, performing a corner process on each corner represented by the first mask-pattern data, thereby forming second mask-pattern data, and performing a re-sizing process of adding a prescribed negative bias &Dgr;′ to the second mask-pattern data, thereby forming third mask-pattern data.
摘要翻译：本文公开了一种处理曝光掩模图案数据的方法。该方法包括以下步骤：执行将规定的正偏置DELTA相加以设计曝光掩模图案的数据的重新尺寸化处理，从而形成第一掩模图案数据，对由第一掩模图案表示的每个拐角进行拐角处理数据，从而形成第二掩模图案数据，并且执行将规定的负偏置DELTA'添加到第二掩模图案数据的重新尺寸化处理，从而形成第三掩模图案数据。

115. 发明授权

US06507931B2 Semiconductor integrated circuit designing method and system 有权
公开(公告)号：US06507931B2
公开(公告)日：2003-01-14
申请号：US09892572
申请日：2001-06-28
申请人： Toshiya Kotani , Satoshi Tanaka , Soichi Inoue
发明人： Toshiya Kotani , Satoshi Tanaka , Soichi Inoue
IPC分类号： G06F1750
CPC分类号： G06F17/5081
摘要： A method for designing a semiconductor integrated circuit is provided which comprises compacting a design layout of a semiconductor integrated circuit on the basis of a given design rule to obtain a compacted pattern, predicting a pattern to be formed at a surface area of a wafer for forming the semiconductor integrated circuit on the basis of the compacted pattern, obtaining an evaluated value by comparing the predicted pattern with the compacted pattern, deciding whether the evaluated value satisfies a predetermined condition, and modifying the design rule when the evaluated value is decided as not satisfying the predetermined condition.

116. 发明授权

US06251544B1 Exposure dose measuring method and exposure dose measuring mask 有权
标题翻译：曝光剂量测量方法和曝光剂量测量面膜
公开(公告)号：US06251544B1
公开(公告)日：2001-06-26
申请号：US09334941
申请日：1999-06-17
申请人： Soichi Inoue , Shinichi Ito , Kei Hayasaki
发明人： Soichi Inoue , Shinichi Ito , Kei Hayasaki
IPC分类号： G03F900
CPC分类号： G03F7/70558 , G03F1/44
摘要： In an exposure dose measuring method for measuring an effective exposure dose on a wafer by printing mask patterns formed on a mask onto a resist coated on the wafer by exposure, each of the mask patterns has light transmitting sections and light shielding sections repeated in a period p, a ratio of areas of the light transmitting sections to areas of the light shielding sections of each of the mask patterns differs from ratios of those of the others of the mask patterns, and the period p is set so as to satisfy a relationship of p/M≦&lgr;/(1+&sgr;)NA, where an exposure light wavelength at the time of exposing the mask patterns is &lgr;, a numerical aperture at a wafer side is NA, an illumination coherence factor is &sgr;, and a mask pattern magnification for patterns to be formed on the wafer is M.
摘要翻译：在曝光剂量测量方法中，通过将掩模上形成的掩模图案通过曝光印刷在涂覆在晶片上的抗蚀剂上来测量晶片上的有效曝光剂量，每个掩模图案具有在一段时间内重复的透光部分和遮光部分 p，光透射部分的面积与每个掩模图案的遮光部分的面积的比率与其他掩模图案的比率的比率不同，并且周期p被设定为满足其中的关系曝光掩模图案时的曝光光波长为羔羊，晶圆侧的数值孔径为NA，照度相干系数为西格玛，在晶片上形成的图案的掩模图案放大率为M.

117. 发明授权

US06245466B1 Mask pattern design method and a photomask 失效
标题翻译：面膜图案设计方法和光掩模
公开(公告)号：US06245466B1
公开(公告)日：2001-06-12
申请号：US09358769
申请日：1999-07-22
申请人： Toshiya Kotani , Satoshi Tanaka , Soichi Inoue
发明人： Toshiya Kotani , Satoshi Tanaka , Soichi Inoue
IPC分类号： G03F900
CPC分类号： G03F1/36
摘要： A rectangular supplemental pattern having two edges of dimensions s1 and s2 is added to a main pattern corresponding to a design pattern. Where a change amount of shortening with respect to small changes &Dgr;s1 and &Dgr;s2 of the plan shape of the supplemental pattern, the plan shape of the supplemental pattern is determined such that the change amount s′={(±&Dgr;x/±&Dgr;s1)2+(±&Dgr;x/±&Dgr;s1)2}½ of the pattern plan shape on a wafer after transfer becomes a predetermined value or less.
摘要翻译：将具有尺寸s1和s2的两个边缘的矩形补充图案添加到对应于设计图案的主图案。在对补充模式的计划形状的小变化DELTAs1和DELTA2进行缩短的变化量的情况下，确定补充模式的计划形状，使得变化量s'= {（±DELTAx /±DELTAs1）2+ 转印后的晶片上的图形平面形状的（±DELTAx /±DELTAs1）2} 1/2成为规定值以下。

118. 发明授权

US06221539B1 Mask pattern correction method and a recording medium which records a mask pattern correction program 有权
标题翻译：掩模图案校正方法和记录掩模图案校正程序的记录介质
公开(公告)号：US06221539B1
公开(公告)日：2001-04-24
申请号：US09358824
申请日：1999-07-22
申请人： Toshiya Kotani , Satoshi Tanaka , Soichi Inoue
发明人： Toshiya Kotani , Satoshi Tanaka , Soichi Inoue
IPC分类号： G03F900
CPC分类号： G03F7/70441 , G03F1/36
摘要： All edge positions constituting a first mask pattern are shifted by a predetermined change amount, to obtain a second mask pattern. A first finished plan shape transferred by the fist mask pattern and a second finished plan shape transferred by the second mask pattern are obtained by a calculation. Coefficients, which are obtained by respectively dividing dimensional differences between the edge positions of the first and second finished plan shapes by the change amount, are respectively calculated and assigned for edges. A corrected pattern is prepared by shifting the edge positions of the first mask pattern in accordance with magnitude of division of differences between a design pattern and the first finished plan shape by the coefficients assigned to the edges.
摘要翻译：构成第一掩模图案的所有边缘位置偏移预定的变化量，以获得第二掩模图案。通过计算获得通过第一掩模图案传送的第一完成平面形状和通过第二掩模图案传送的第二完成平面形状。通过分别计算第一和第二完成平面形状的边缘位置之间的尺寸差异所得到的系数，并分配给边缘。通过根据分配给边缘的系数，根据设计图案和第一完成平面形状之间的差分的大小来移动第一掩模图案的边缘位置来准备校正图案。

119. 发明授权

US6060368A Mask pattern correction method 失效
标题翻译：掩模图案校正方法和系统
公开(公告)号：US6060368A
公开(公告)日：2000-05-09
申请号：US206364
申请日：1998-12-07
申请人： Koji Hashimoto , Hisako Aoyama , Soichi Inoue , Kazuko Yamamoto , Sachiko Kobayashi
发明人： Koji Hashimoto , Hisako Aoyama , Soichi Inoue , Kazuko Yamamoto , Sachiko Kobayashi
IPC分类号： G03F1/36 , G03F1/72 , G03F7/20 , H01L21/027 , H01L21/76
CPC分类号： G03F7/70441 , G03F1/36
摘要： This invention is provided to eliminate the optical proximity effect which will occur because of different rates of dimensional change between before and after etching when a plurality of gate materials are etched in a single device. After a to-be-corrected region is extracted, an n.sup.+ -type polysilicon gate layer is extracted. Then, the distance is calculated from the n.sup.+ -type polysilicon gate layer to a pattern adjacent thereto which can be a p.sup.+ -type polysilicon gate layer, thereby correcting the size of the n.sup.+ -type polysilicon gate layer with reference to a correction table for the pattern adjacent to the n.sup.+ -type polysilicon gate layer. After that, a p.sup.+ -type polysilicon gate layer is extracted. Then, the distance is calculated from the p.sup.+ -type polysilicon gate layer to a pattern adjacent thereto which can be an n.sup.+ -type polysilicon gate layer, thereby correcting the size of the p.sup.+ -type polysilicon gate layer with reference to a correction table for the pattern adjacent to the p.sup.+ -type polysilicon gate layer.
摘要翻译：提供本发明以消除当在单个器件中蚀刻多个栅极材料时在蚀刻之前和之后不同的尺寸变化率而将发生的光学邻近效应。在提取待校正区域之后，提取n +型多晶硅栅极层。然后，从n +型多晶硅栅极层到可以是p +型多晶硅栅极层的与其相邻的图案计算距离，从而参照n +型多晶硅栅极层的校正表来校正n +型多晶硅栅极层的尺寸图案与n +型多晶硅栅极层相邻。之后，提取p +型多晶硅栅极层。然后，从p +型多晶硅栅极层到与其相邻的图案，其可以是n +型多晶硅栅极层，从而根据用于的p +型多晶硅栅极层的校正表来校正p +型多晶硅栅极层的尺寸，图案与p +型多晶硅栅极层相邻。

120. 发明授权

US6045981A Method of manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US6045981A
公开(公告)日：2000-04-04
申请号：US19925
申请日：1998-02-06
申请人： Kentaro Matsunaga , Akiko Mimotogi , Shoji Mimotogi , Soichi Inoue
发明人： Kentaro Matsunaga , Akiko Mimotogi , Shoji Mimotogi , Soichi Inoue
IPC分类号： G03F7/26 , G03F7/38 , H01L21/027 , G03F7/00
CPC分类号： G03F7/265 , G03F7/38
摘要： A method of manufacturing a semiconductor device, which comprises the steps of, selectively silylating a photosensitive resin film by exposing the photosensitive resin film according to an exposure pattern thereby to form a silylated portion having a glass transition temperature which is lower than that of the photosensitive resin film and at the same time exposing the photosensitive resin film to an intermediate temperature between the glass transition temperature of the silylated portion and the glass transition temperature of the photosensitive resin film thereby fluidizing the silylated portion so as to cover a portion of the photosensitive resin film neighboring the silylated portion with the fluidized silylated portion, and developing the photosensitive resin film by making use of the silylated portion and the portion of photosensitive resin film covered by the fluidized silylated portion as a mask.
摘要翻译：一种制造半导体器件的方法，其包括以下步骤：通过根据曝光图案曝光感光性树脂膜来选择性地使感光性树脂膜甲硅烷化，从而形成玻璃化转变温度低于光敏树脂膜的甲硅烷基化部分同时使感光性树脂膜暴露于甲硅烷基化部分的玻璃化转变温度与感光性树脂膜的玻璃化转变温度之间的中间温度，由此使甲硅烷基化部分流化，从而覆盖一部分感光性树脂膜与甲硅烷基化部分相邻，并且通过使用甲硅烷基化部分和被流化的甲硅烷基化部分覆盖的部分感光树脂膜作为掩模来显影感光树脂膜。

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