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101. 发明申请

US20090250690A1 ORGANIC THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：有机薄膜晶体管基板及其制造方法
公开(公告)号：US20090250690A1
公开(公告)日：2009-10-08
申请号：US12326650
申请日：2008-12-02
申请人： Jung-Han SHIN , Seung-Hwan CHO , Seong-Sik SHIN , Keun-Kyu SONG , Jung-Hun NOH
发明人： Jung-Han SHIN , Seung-Hwan CHO , Seong-Sik SHIN , Keun-Kyu SONG , Jung-Hun NOH
IPC分类号： H01L51/05 , H01L51/40
CPC分类号： H01L27/283 , G02F1/1368 , G02F2202/02 , H01L51/0545 , H01L51/105
摘要： In an organic thin film transistor (TFT) substrate, the organic TFT substrate includes gate lines, data lines, a gate electrode, a source electrode, a drain electrode, a gate insulating layer, an organic semiconductor layer, and an organic protective layer. The gate and data lines are insulated from each other and cross each other to define pixel areas. The gate electrode is connected to the gate line. The source electrode is connected to the data line. The drain electrode faces the source electrode with the gate electrode disposed therebetween. The gate insulating layer covers the gate electrode and exposes a portion of the source and drain electrodes. The organic semiconductor layer contacts the source and drain electrodes. The organic protective layer is disposed on the organic semiconductor layer to protect the organic semiconductor layer.
摘要翻译：在有机薄膜晶体管（TFT）基板中，有机TFT基板包括栅极线，数据线，栅电极，源电极，漏电极，栅绝缘层，有机半导体层和有机保护层。栅极和数据线彼此绝缘并且彼此交叉以限定像素区域。栅电极连接到栅极线。源电极连接到数据线。漏电极面对源电极，栅电极位于其间。栅极绝缘层覆盖栅极并暴露出源极和漏极的一部分。有机半导体层接触源极和漏极。有机保护层设置在有机半导体层上以保护有机半导体层。

102. 发明授权

US07598544B2 Hybrid carbon nanotude FET(CNFET)-FET static RAM (SRAM) and method of making same 有权
标题翻译：混合碳[纳米管]纳米管FET（CNFET）-FET静态RAM（SRAM）及其制造方法
公开(公告)号：US07598544B2
公开(公告)日：2009-10-06
申请号：US11332080
申请日：2006-01-13
申请人： Claude L. Bertin , Mitchell Meinhold , Steven L. Konsek , Thomas Rueckes , Frank Guo
发明人： Claude L. Bertin , Mitchell Meinhold , Steven L. Konsek , Thomas Rueckes , Frank Guo
IPC分类号： H01L27/11 , H01L21/8244
CPC分类号： G11C13/0033 , B82Y10/00 , G11C11/412 , G11C13/025 , G11C2213/17 , H01L27/0688 , H01L27/11 , H01L27/1104 , H01L27/1108 , H01L27/283 , H01L51/0048 , H01L51/0516 , H01L51/0545 , Y10S257/903 , Y10S977/762 , Y10S977/938
摘要： Hybrid carbon nanotube FET (CNFET), static ram (SRAM) and method of making same. A static ram memory cell has two cross-coupled semiconductor-type field effect transistors (FETs) and two nanotube FETs (NTFETs), each having a channel region made of at least one semiconductive nanotube, a first NTFET connected to the drain or source of the first semiconductor-type FET and the second NTFET connected to the drain or source of the second semiconductor-type FET.
摘要翻译：混合碳纳米管FET（CNFET），静态RAM（SRAM）及其制造方法。静态柱式存储单元具有两个交叉耦合半导体型场效应晶体管（FET）和两个纳米管FET（NTFET），每个具有由至少一个半导体纳米管制成的沟道区域，第一NTFET连接到漏极或源极连接到第二半导体型FET的漏极或源极的第一半导体型FET和第二NTFET。

103. 发明授权

US07575951B2 Flat panel display and method for fabricating the same 有权
标题翻译：平板显示器及其制造方法
公开(公告)号：US07575951B2
公开(公告)日：2009-08-18
申请号：US11486685
申请日：2006-07-14
申请人： Tae-young Choi , Jun-hyung Kim , Keun-kyu Song , Mun-pyo Hong
发明人： Tae-young Choi , Jun-hyung Kim , Keun-kyu Song , Mun-pyo Hong
IPC分类号： H01L51/40
CPC分类号： H01L27/283 , H01L27/3244 , H01L51/0545
摘要： A method for fabricating a flat panel display, comprising preparing an insulating substrate; forming separated source and drain electrodes on the insulating substrate to define a channel region; forming a first passivation layer on the source and drain electrodes; forming a metal layer having an opening corresponding to the channel region on the first passivation layer; forming a deposition opening in the passivation layer by using the metal layer as a mask to expose the channel region; forming an organic semiconductor layer and a second passivation layer, in turn, in the deposition opening and on the metal layer; and removing the metal layer, the organic semiconductor layer and the second passivation layer while allowing the layers formed in the deposition opening to remain.
摘要翻译：一种制造平板显示器的方法，包括制备绝缘基板; 在所述绝缘基板上形成分离的源极和漏极以限定沟道区; 在源极和漏极上形成第一钝化层; 在所述第一钝化层上形成具有与所述沟道区对应的开口的金属层; 通过使用金属层作为掩模在钝化层中形成沉积开口以暴露沟道区; 在沉积开口和金属层上依次形成有机半导体层和第二钝化层; 并且在保留形成在沉积开口中的层的同时去除金属层，有机半导体层和第二钝化层。

104. 发明授权

US07571529B2 Method for forming an electronic device in multi-layer structure 有权
标题翻译：用于形成多层结构的电子装置的方法
公开(公告)号：US07571529B2
公开(公告)日：2009-08-11
申请号：US10398442
申请日：2001-10-04
申请人： Henning Sirringhaus , Richard Henry Friend , Natalie Stutzmann , Paul Smith
发明人： Henning Sirringhaus , Richard Henry Friend , Natalie Stutzmann , Paul Smith
IPC分类号： B23P17/00
CPC分类号： H01L51/0508 , B82Y30/00 , H01L27/283 , H01L51/0005 , H01L51/0014 , H01L51/0022 , H01L51/0037 , H01L51/0039 , H01L51/055 , H01L51/057 , H01L2251/105 , Y10T29/14 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49798
摘要： A method for forming an organic or partly organic switching device, comprising: depositing layers of conducting, semiconducting and/or insulating layers by solution processing and direct printing; defining microgrooves in the multilayer structure by solid state embossing; and forming a switching device inside the microgroove.
摘要翻译：一种用于形成有机或部分有机开关器件的方法，包括：通过溶液处理和直接印刷沉积导电，半导体和/或绝缘层的层; 通过固态压花在多层结构中限定微槽; 以及在所述微槽内形成开关装置。

105. 发明授权

US07566633B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07566633B2
公开(公告)日：2009-07-28
申请号：US11354810
申请日：2006-02-16
申请人： Jun Koyama , Koji Dairiki , Susumu Okazaki , Yoshitaka Moriya , Shunpei Yamazaki
发明人： Jun Koyama , Koji Dairiki , Susumu Okazaki , Yoshitaka Moriya , Shunpei Yamazaki
IPC分类号： H01L21/46
CPC分类号： H01L27/1266 , H01L27/1214 , H01L27/1218 , H01L27/1255 , H01L27/283 , H01L29/78603 , H01L51/0097 , H01L2224/16225 , H01L2924/12044 , Y02E10/549 , Y02P70/521 , H01L2924/00
摘要： An object of the present invention is to provide a semiconductor device which has flexibility and resistance to a physical change such as bending and a method for manufacturing the semiconductor device. A semiconductor device of the present invention includes a plurality of transistors provided over a flexible substrate, each of which has a semiconductor film, a gate electrode provided over the semiconductor film with a gate insulating film therebetween, and an interlayer insulating film provided to cover the gate electrode, and a bending portion provided between the plurality of transistors, in which the bending portion is provided by filling an opening formed in the interlayer insulating film with a material having a lower elastic modulus, a material having a lower glass transition point, or a material having a higher plasticity than that of the interlayer insulating film.
摘要翻译：本发明的目的是提供一种具有柔性和抗弯曲等物理变化的半导体器件以及半导体器件的制造方法。本发明的半导体器件包括设置在柔性基板上的多个晶体管，每个晶体管具有半导体膜，在半导体膜之间设置有栅极绝缘膜的栅电极和设置成覆盖该半导体膜的层间绝缘膜栅电极和设置在多个晶体管之间的弯曲部分，其中通过用具有较低弹性模量的材料填充形成在层间绝缘膜中的开口，具有较低玻璃化转变点的材料，或者具有比层间绝缘膜高的塑性的材料。

106. 发明申请

US20090179193A1 CARBON NANOTUBE BASED INTEGRATED SEMICONDUCTOR CIRCUIT 失效
标题翻译：基于碳纳米管的集成半导体电路
公开(公告)号：US20090179193A1
公开(公告)日：2009-07-16
申请号：US11972669
申请日：2008-01-11
申请人： Joerg Appenzeller , AJ Kleinosowski , Edward J. Nowak , Richard Q. Williams
发明人： Joerg Appenzeller , AJ Kleinosowski , Edward J. Nowak , Richard Q. Williams
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L51/0541 , B82Y10/00 , H01L27/11 , H01L27/1104 , H01L27/283 , H01L51/0048 , H01L51/0558 , Y10S977/742 , Y10S977/75 , Y10S977/751 , Y10S977/752
摘要： Gate electrodes are formed on a semiconducting carbon nanotube, followed by deposition and patterning of a hole-inducing material layer and an electron inducing material layer on the carbon nanotube according to the pattern of a one dimensional circuit layout. Electrical isolation may be provided by cutting a portion of the carbon nanotube, forming a reverse biased junction of a hole-induced region and an electron-induced region of the carbon nanotube, or electrically biasing a region through a dielectric layer between two device regions of the carbon nanotube. The carbon nanotubes may be arranged such that hole-inducing material layer and electron-inducing material layer may be assigned to each carbon nanotube to form periodic structures such as a static random access memory (SRAM) array.
摘要翻译：在半导体碳纳米管上形成栅电极，然后根据一维电路布局的图案在碳纳米管上沉积和图案化空穴诱导材料层和电子诱导材料层。可以通过切割碳纳米管的一部分来形成电气隔离，形成空穴诱导区域和碳纳米管的电子诱导区域的反向偏置接合点，或者通过介电层在两个器件区域之间电气偏置区域碳纳米管。碳纳米管可以被布置为使得可以将空穴诱导材料层和电子诱导材料层分配给每个碳纳米管以形成诸如静态随机存取存储器（SRAM）阵列的周期性结构。

107. 发明申请

US20090170238A1 Printed organic logic circuits using a floating gate transister as a load device 有权
标题翻译：使用浮动栅极转换器作为负载器件的印刷有机逻辑电路
公开(公告)号：US20090170238A1
公开(公告)日：2009-07-02
申请号：US11964549
申请日：2007-12-26
申请人： Viorel Olariu
发明人： Viorel Olariu
IPC分类号： H01L51/40
CPC分类号： H01L51/102 , C08G2261/3223 , C08G2261/92 , H01L27/283 , H01L51/0036 , H01L51/0541 , H01L51/0545 , H01L51/055
摘要： A method of forming an organic inverter includes providing a first metal layer having a first portion for coupling a source of a first OFET to a first power supply voltage, a second portion for coupling a drain of the first OFET to an output terminal and to a source of a second OFET, and a third portion for coupling a drain of the second OFET to a second power supply voltage, providing a semiconductor layer for overlapping a portion of the first and second first metal layer portions to form a first OFET active area, and for overlapping a portion of the second and third metal layer portions to form a second OFET active area, providing a dielectric layer for overlapping the active area and isolates the first metal layer and semiconductor layer from the second metal layer, and providing a second metal layer for overlapping the active area of the first OFET to form a gate of the first OFET and an input terminal, and for overlapping the active area of the second OFET to form a floating gate for the second OFET.
摘要翻译：一种形成有机逆变器的方法包括提供第一金属层，其具有用于将第一OFET的源耦合到第一电源电压的第一部分，用于将第一OFET的漏极耦合到输出端子的第二部分和源的第二OFET，以及第三部分，用于将第二OFET的漏极耦合到第二电源电压，提供用于重叠第一和第二第一金属层部分的一部分以形成第一OFET有源区的半导体层，并且用于使第二和第三金属层部分的一部分重叠以形成第二OFET有源区，提供用于重叠有源区的电介质层，并将第一金属层和半导体层与第二金属层隔离，并提供第二金属层，用于与第一OFET的有效区域重叠以形成第一OFET的栅极和输入端子，并且用于与第二OFET的有源区域重叠以形成浮置栅极为第二个OFET。

108. 发明申请

US20090140254A1 THIN FILM TRANSISTOR AND FLAT PANEL DISPLAY DEVICE INCLUDING THE SAME 有权
标题翻译：薄膜晶体管和平板显示装置，包括它们
公开(公告)号：US20090140254A1
公开(公告)日：2009-06-04
申请号：US12365090
申请日：2009-02-03
申请人： Tack Ahn , Min-Chul Suh , Jae-Bon Koo
发明人： Tack Ahn , Min-Chul Suh , Jae-Bon Koo
IPC分类号： H01L33/00
CPC分类号： H01L27/1214 , H01L27/12 , H01L27/283 , H01L29/78681 , H01L51/0545
摘要： A flat panel display device is disclosed. In one embodiment, the flat panel display device includes i) a semiconductor layer including a channel region and a groove, wherein the channel region electrically connects a source electrode and a drain electrode, and the groove is configured to separate the channel region from adjacent thin film transistors and ii) a stop layer formed below at least a portion of the semiconductor layer. According to one embodiment of the invention, a semiconductor layer can be easily patterned without using a dry or wet etching technique such as photolithography.
摘要翻译：公开了一种平板显示装置。在一个实施例中，平板显示装置包括i）包括沟道区域和沟槽的半导体层，其中沟道区域电连接源电极和漏电极，并且沟槽被配置为将沟道区域与相邻薄层薄膜晶体管和ii）形成在半导体层的至少一部分下方的停止层。根据本发明的一个实施例，半导体层可以容易地图案化，而不使用诸如光刻的干法或湿蚀刻技术。

109. 发明授权

US07521299B2 Method of manufacturing transistor, method of manufacturing electro-optical device, and method of manufacturing electronic device 失效
标题翻译：晶体管的制造方法，电光装置的制造方法以及电子装置的制造方法
公开(公告)号：US07521299B2
公开(公告)日：2009-04-21
申请号：US11140748
申请日：2005-06-01
申请人： Hideki Tanaka , Takashi Masuda , Ichio Yudasaka , Takashi Aoki
发明人： Hideki Tanaka , Takashi Masuda , Ichio Yudasaka , Takashi Aoki
IPC分类号： H01L21/84
CPC分类号： B82Y10/00 , B82Y30/00 , H01L27/1292 , H01L27/283 , H01L29/66757 , H01L51/0005 , H01L51/0022 , H01L51/0541
摘要： A method of manufacturing a transistor includes disposing a droplet containing a bank material as a solute or a dispersoid on a substrate, drying the droplet to form a bank, ejecting a conductive material on a part of the bank to form a first conductive region and a second conductive region with the part of the bank interposed therebetween, removing the bank to form a groove between the first and second conductive regions, supplying a semiconductor material into the groove to form a semiconductor film, forming a gate insulating film on the semiconductor film, and forming a gate electrode at a position on the gate insulating film facing the semiconductor film.
摘要翻译：一种晶体管的制造方法，其特征在于，在基板上设置含有作为溶质或分散质的堤料的液滴，干燥所述液滴以形成堤，在所述堤的一部分上排出导电性物质，形成第一导电性区域和第二导电区域，其中一部分插入其间，去除堤以在第一和第二导电区域之间形成沟槽，将半导体材料供应到沟槽中以形成半导体膜，在半导体膜上形成栅极绝缘膜，以及在面对半导体膜的栅极绝缘膜上的位置处形成栅电极。

110. 发明申请

US20090026444A1 Organic thin film transistor array panel and manufacturing method of the same 有权
标题翻译：有机薄膜晶体管阵列面板及其制造方法相同
公开(公告)号：US20090026444A1
公开(公告)日：2009-01-29
申请号：US12148485
申请日：2008-04-17
申请人： Tae-Young Choi , Soo-Wan Yoon , Bo-Kyoung Ahn
发明人： Tae-Young Choi , Soo-Wan Yoon , Bo-Kyoung Ahn
IPC分类号： H01L51/52 , H01L51/56
CPC分类号： H01L51/0003 , H01L27/283 , H01L51/0545
摘要： An organic thin film transistor array panel includes a substrate, a gate line formed on the substrate and including a gate electrode. A gate insulating layer is formed on the gate electrode and a data line is formed on the gate insulating layer, intersecting the gate line, and including a drain electrode. A source electrode is formed on the gate insulating layer and is spaced apart from the drain electrode, enclosed by the drain electrode. A bank insulating layer includes a first opening exposing the drain electrode and the source electrode and a second opening which exposes at least a portion of the source electrode. An organic semiconductor is formed in the first opening and contacts the drain electrode and the source electrode. A pixel electrode contacts the source electrode through the second opening.
摘要翻译：有机薄膜晶体管阵列面板包括基板，形成在基板上并包括栅电极的栅极线。在栅电极上形成栅极绝缘层，并且在栅极绝缘层上形成数据线，与栅极线相交，并且包括漏电极。源电极形成在栅极绝缘层上，并与漏电极间隔开，由漏电极包围。堤绝缘层包括露出漏电极和源电极的第一开口和暴露源电极的至少一部分的第二开口。在第一开口中形成有机半导体，并与漏电极和源电极接触。像素电极通过第二开口接触源电极。

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