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101. 发明授权

US06814087B2 Accelerated plasma clean 有权
标题翻译：加速等离子清洁
公开(公告)号：US06814087B2
公开(公告)日：2004-11-09
申请号：US10115665
申请日：2002-04-03
申请人： Shankar W. Chandran , Scott Hendrickson , Gwendolyn D. Jones , Shankar Venkataraman , Ellie Yieh
发明人： Shankar W. Chandran , Scott Hendrickson , Gwendolyn D. Jones , Shankar Venkataraman , Ellie Yieh
IPC分类号： B08B700
CPC分类号： C23C16/4405 , Y10S134/902 , Y10S438/905
摘要： A method of removing residue from a substrate processing chamber. In one embodiment the method comprises flowing an inert gas into a remote plasma chamber and forming a plasma within the chamber; maintaining the plasma while creating a plurality of reactive fluorine species by flowing a fluorine-containing gas into the remote plasma chamber and increasing a flow rate of a fluorine-containing gas from a first flow rate to a second flow rate higher than the first flow rate; and introducing the plurality of reactive fluorine species into the substrate processing chamber.

102. 发明授权

US06753258B1 Integration scheme for dual damascene structure 失效
标题翻译：双镶嵌结构的整合方案
公开(公告)号：US06753258B1
公开(公告)日：2004-06-22
申请号：US09706298
申请日：2000-11-03
申请人： Frederic Gaillard , Li-Qun Xia , Ellie Yieh , Paul Fisher , Margaret Gotuaco
发明人： Frederic Gaillard , Li-Qun Xia , Ellie Yieh , Paul Fisher , Margaret Gotuaco
IPC分类号： H01L21302
CPC分类号： H01L21/76801 , H01L21/31608 , H01L21/76807 , H01L21/76834 , H01L21/76885 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A method and apparatus for processing a substrate to form a feature in low k dielectric materials. One aspect of the invention provides a method for processing a substrate including forming a feature definition in a dielectric material deposited on a surface of a substrate, depositing one or more conductive materials to fill at least a portion of the feature definition, planarizing the substrate surface to expose the dielectric material, removing at least a portion of the dielectric material, and depositing a low k dielectric material.
摘要翻译：一种用于处理基底以在低k电介质材料中形成特征的方法和装置。本发明的一个方面提供一种处理衬底的方法，包括在沉积在衬底的表面上的电介质材料中形成特征定义，沉积一种或多种导电材料以填充特征定义的至少一部分，平坦化衬底表面以暴露电介质材料，去除介电材料的至少一部分，以及沉积低k电介质材料。

103. 发明授权

US06680164B2 Solvent free photoresist strip and residue removal processing for post etching of low-k films 失效
标题翻译：无溶剂的光致抗蚀剂条和残留物去除处理用于低k膜的后蚀刻
公开(公告)号：US06680164B2
公开(公告)日：2004-01-20
申请号：US10006563
申请日：2001-11-30
申请人： Huong Thanh Nguyen , Mark Naoshi Kawaguchi , Mehul B. Naik , Li-Qun Xia , Ellie Yieh
发明人： Huong Thanh Nguyen , Mark Naoshi Kawaguchi , Mehul B. Naik , Li-Qun Xia , Ellie Yieh
IPC分类号： G03F742
CPC分类号： H01L21/02063 , G03F7/427 , H01L21/31138
摘要： A photoresist or a residue of the photoresist may by removed by the hydrogen and water plasma mixture. The process may be performed at a temperature range between about 150° C. and about 450° C., preferably about 250° C., and a power range between about 500 W and about 3000 W, preferably about 1400 W.
摘要翻译：可以通过氢和水等离子体混合物去除光致抗蚀剂或光致抗蚀剂的残余物。该方法可以在约150℃至约450℃，优选约250℃的温度范围和约500W至约3000W，优选约1400W的功率范围内进行。

104. 发明授权

US06569257B1 Method for cleaning a process chamber 失效
标题翻译：清洁处理室的方法
公开(公告)号：US06569257B1
公开(公告)日：2003-05-27
申请号：US09710357
申请日：2000-11-09
申请人： Huong Thanh Nguyen , Michael Barnes , Li-Qun Xia , Ellie Yieh
发明人： Huong Thanh Nguyen , Michael Barnes , Li-Qun Xia , Ellie Yieh
IPC分类号： B08B300
CPC分类号： H01J37/32862 , C23C16/4405
摘要： A method for cleaning silicon carbide and/or organosilicate layers from interior surfaces of a process chamber is disclosed. In one aspect, silicon carbide and/or organosilicate layers are cleaned from interior surfaces of a process chamber by treating it with a hydrogen/fluorine-based plasma. In another aspect, silicon carbide and/or organosilicate layer are cleaned from interior surfaces of the process chamber by treating it with a hydrogen-based plasma followed by a fluorine-based plasma. Alternatively, silicon carbide and/or organosilicate layers are cleaned from interior surfaces of the chamber by treating it with a fluorine-based plasma followed by a hydrogen-based plasma.
摘要翻译：公开了一种从处理室的内表面清洁碳化硅和/或有机硅酸盐层的方法。在一个方面，通过用氢/氟基等离子体处理碳化硅和/或有机硅酸盐层，从处理室的内表面清洗。另一方面，通过用基于氢的等离子体处理它，随后用氟基等离子体处理碳化硅和/或有机硅酸盐层，从处理室的内表面清洗。或者，通过用氟基等离子体处理，然后用氢基等离子体来清洗碳化硅和/或有机硅酸盐层，从室的内表面清洗。

105. 发明授权

US06500773B1 Method of depositing organosilicate layers 失效
标题翻译：沉积有机硅酸盐层的方法
公开(公告)号：US06500773B1
公开(公告)日：2002-12-31
申请号：US09723886
申请日：2000-11-27
申请人： Frederic Gaillard , Li-Qun Xia , Ellie Yieh
发明人： Frederic Gaillard , Li-Qun Xia , Ellie Yieh
IPC分类号： H01L2131
CPC分类号： H01L21/02126 , C23C16/30 , C23C16/401 , H01L21/02216 , H01L21/02274 , H01L21/0276 , H01L21/3086 , H01L21/31144 , H01L21/3121 , H01L21/3122 , H01L21/31612 , H01L21/31629 , H01L21/31633 , H01L21/32139 , H01L21/76807
摘要： A method of forming an organosilicate layer is disclosed. The organosilicate layer is formed by reacting a gas mixture comprising a phenyl-based alkoxysilane compound. The gas mixture may be reacted by applying an electric field thereto. The gas mixture may optionally include an organosilane compound as well as an oxidizing gas. The organosilicate layer is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the organosilicate layer is used as an anti-reflective coating (ARC). In another integrated circuit fabrication process, the organosilicate layer is used as a hardmask. In yet another integrated circuit fabrication process, the organosilicate layer is incorporated into a damascene structure.
摘要翻译：公开了形成有机硅酸盐层的方法。有机硅酸盐层通过使包含苯基烷氧基硅烷化合物的气体混合物反应而形成。可以通过向其施加电场而使气体混合物反应。气体混合物可以任选地包括有机硅烷化合物以及氧化气体。有机硅酸盐层与集成电路制造工艺兼容。在一个集成电路制造工艺中，有机硅酸盐层用作抗反射涂层（ARC）。在另一集成电路制造工艺中，有机硅酸盐层用作硬掩模。在又一集成电路制造工艺中，有机硅酸盐层被结合到镶嵌结构中。

106. 发明授权

US06261975B1 Method for depositing and planarizing fluorinated BPSG films 有权
标题翻译：氟化BPSG膜的沉积和平面化方法
公开(公告)号：US06261975B1
公开(公告)日：2001-07-17
申请号：US09262782
申请日：1999-03-04
申请人： Li-Qun Xia , Francimar Campana , Ellie Yieh
发明人： Li-Qun Xia , Francimar Campana , Ellie Yieh
IPC分类号： H01L2131
CPC分类号： H01L21/02131 , C23C16/401 , C23C16/56 , H01L21/02271 , H01L21/02304 , H01L21/0234 , H01L21/02362 , H01L21/31051 , H01L21/31625 , H01L21/31629
摘要： A method for improving the reflow characteristics of a BPSG film. According to the method, a fluorine- or other halogen-doped BPSG layer is deposited over a substrate and reflowed using a rapid thermal pulse (RTP) method. The use of such an RTP reflow method results in superior reflow characteristics as compared to a 20-40 minute conventional furnace reflow process. The inventors discovered that reflowing FBPSG films in a conventional furnace may result in the highly mobile fluorine atoms diffusing from the film prior to completion of the anneal. Thus, the FBPSG layer loses the improved reflow characteristics provided by the incorporation of fluorine into the film. The RTP reflow reflows the film in a minimal amount of time (e.g., 10-90 seconds depending on the temperature used to reflow the layer and the degree of planarization required among other factors). Thus, the fluorine atoms within the FBPSG layer do not have sufficient time to migrate from the layer even if the layer is deposited over a PETEOS oxide or similar layer.
摘要翻译：一种改善BPSG膜的回流特性的方法。根据该方法，将氟或其它卤素掺杂的BPSG层沉积在衬底上并使用快速热脉冲（RTP）方法回流。与20-40分钟的常规炉回流工艺相比，使用这种RTP回流方法导致优异的回流特性。本发明人发现，在常规炉中回流FBPSG膜可能导致高度可移动的氟原子在退火完成之前从膜扩散。因此，FBPSG层失去了通过将氟结合到膜中而提供的改进的回流特性。 RTP回流以最小的时间（例如10-90秒，取决于用于回流层的温度和其他因素所需的平坦化程度）来回流薄膜。因此，即使该层沉积在PETEOS氧化物或类似层上，FBPSG层内的氟原子也不具有从该层迁移的足够时间。

107. 发明授权

US6153261A Dielectric film deposition employing a bistertiarybutylaminesilane precursor 有权
标题翻译：使用二乙基丁基胺硅烷前体的介电薄膜沉积
公开(公告)号：US6153261A
公开(公告)日：2000-11-28
申请号：US322709
申请日：1999-05-28
申请人： Li-Qun Xia , Ellie Yieh
发明人： Li-Qun Xia , Ellie Yieh
IPC分类号： C23C16/34 , C23C16/40 , C23C16/52 , H01L21/312 , H01L21/314 , H01L21/316 , H01L21/318 , C23C16/30
CPC分类号： H01L21/0214 , C23C16/345 , C23C16/402 , C23C16/52 , H01L21/0217 , H01L21/02222 , H01L21/02271 , H01L21/3145 , H01L21/31612 , H01L21/3185 , H01L21/3122
摘要： A method and an apparatus for increasing a deposition rate of dielectric films deposited on a substrate for a given temperature while providing the same with good step coverage and gap-fill properties. This is achieved by employing bistertiarybutylaminesilane as a silicon source to react with an oxidizing agent to form a dielectric film on a substrate that includes silicon.
摘要翻译：一种用于提高沉积在基底上的介电膜在给定温度下的沉积速率的方法和装置，同时提供良好的阶梯覆盖和间隙填充性能。这通过使用二乙基丁基胺硅作为硅源与氧化剂反应以在包括硅的衬底上形成电介质膜来实现。

108. 发明授权

US6117244A Deposition resistant lining for CVD chamber 失效
标题翻译： CVD室的防沉积衬里
公开(公告)号：US6117244A
公开(公告)日：2000-09-12
申请号：US47284
申请日：1998-03-24
申请人： Won B. Bang , Ellie Yieh , Thanh Pham
发明人： Won B. Bang , Ellie Yieh , Thanh Pham
IPC分类号： C23C16/44 , C23C16/00
CPC分类号： C23C16/4412 , C23C16/4401 , Y10S156/914 , Y10S156/916
摘要： A deposition resistant lining assembly is provided for a chemical vapor deposition chamber, the deposition resistant lining assembly including a first ceramic liner for mounting adjacent a substrate holder within the chemical vapor deposition chamber to protect a portion of an interior wall of the chemical vapor deposition chamber from deposition of material on the portion of said interior wall of the chemical vapor deposition chamber. The deposition resistant lining assembly also includes a second ceramic liner for mounting in a pumping channel formed in a peripheral region of the chemical vapor deposition chamber to protect a portion of said pumping channel from deposition of the material on the portion of the pumping channel. The first ceramic liner and the second ceramic liner are more resistant to deposition of the material than aluminum and easier and faster to clean of the material deposited thereon than aluminum.
摘要翻译：为化学气相沉积室提供防沉积衬里组件，该防沉积衬里组件包括用于安装在化学气相沉积室内的衬底保持器附近的第一陶瓷衬套，以保护化学气相沉积室的内壁的一部分从材料沉积在化学气相沉积室的所述内壁的部分上。耐沉积衬里组件还包括第二陶瓷衬套，用于安装在形成在化学气相沉积室的周边区域中的泵送通道中，以保护所述泵送通道的一部分不被材料沉积在泵送通道的部分上。第一陶瓷衬里和第二陶瓷衬垫比铝更能抵抗材料的沉积，并且比铝更容易且更快地清洁沉积在其上的材料。

109. 发明授权

US6110556A Lid assembly for a process chamber employing asymmetric flow geometries 失效
标题翻译：采用不对称流动几何形状的处理室的盖组件
公开(公告)号：US6110556A
公开(公告)日：2000-08-29
申请号：US953444
申请日：1997-10-17
申请人： Won Bang , Ellie Yieh , Thanh Pham
发明人： Won Bang , Ellie Yieh , Thanh Pham
IPC分类号： C23C16/44 , C23C16/455 , H01L21/00 , H01L21/205 , B32B3/02 , C23C16/00
CPC分类号： C23C16/45565 , C23C16/455 , H01L21/67069 , Y10T428/21 , Y10T428/218
摘要： A chemical vapor deposition (CVD) system of the type having an enclosure housing a process chamber and a supply of cleaning gas, features a lid having a base plate with opposed first and second major surfaces and a plurality of throughways extending therebetween to provide an asymmetric flow of cleaning gas into the chamber. Specifically, a subportion of the second major surface lies in a plane of truncation and faces the process chamber when the lid is in a closed position. The remaining portions of the second major surface are recessed, defining central and annular recesses. The annular recess has a base surface and two spaced-apart side surfaces extending from the base surface and terminating proximate to the plane of truncation. The plurality of throughways consists of primary and secondary throughways, each of which extends from an opening in the first major surface and terminates in an orifice. The orifices associated with the secondary throughways are positioned in one of the side surfaces of the annular recess. The orifices associated with the primary throughways lie in the plane that extends orthogonally to the spaced-apart side surfaces.
摘要翻译：具有容纳处理室和清洁气体供应的外壳的类型的化学气相沉积（CVD）系统具有盖，其具有带有相对的第一和第二主表面的基板和在其之间延伸的多个通道，以提供不对称的清洁气体流入室内。具体地说，当盖子处于关闭位置时，第二主表面的一个子部分位于截面上并面向处理室。第二主表面的其余部分是凹进的，限定中心和环形凹槽。环形凹部具有基部表面和从基部表面延伸并且接近截面的端部延伸的两个间隔开的侧表面。多个通道由主通道和次通道组成，每个通道从第一主表面中的开口延伸并且终止于孔中。与次级通道相关联的孔定位在环形凹槽的一个侧表面中。与主通道相关联的孔口位于与间隔开的侧表面垂直延伸的平面中。

110. 发明授权

US5935340A Method and apparatus for gettering fluorine from chamber material surfaces 失效
标题翻译：从室材料表面吸除氟的方法和设备
公开(公告)号：US5935340A
公开(公告)日：1999-08-10
申请号：US747892
申请日：1996-11-13
申请人： Li-Qun Xia , Visweswaren Sivaramakrishnan , Srinivas Nemani , Ellie Yieh , Gary Fong
发明人： Li-Qun Xia , Visweswaren Sivaramakrishnan , Srinivas Nemani , Ellie Yieh , Gary Fong
IPC分类号： B08B7/00 , C23C16/44 , H01L21/00 , B08B6/00
CPC分类号： H01L21/67017 , B08B7/0035 , C23C16/4405
摘要： The present invention provides systems, methods and apparatus for high temperature (at least about 500-800.degree. C.) processing of semiconductor wafers. The systems, methods and apparatus of the present invention allow multiple process steps to be performed in situ in the same chamber to reduce total processing time and to ensure high quality processing for high aspect ratio devices. Performing multiple process steps in the same chamber also increases the control of the process parameters and reduces device damage. In particular, the present invention can provide high temperature deposition, heating and efficient cleaning for forming dielectric films having thickness uniformity, good gap fill capability, high density, low moisture, and other desired characteristics.
摘要翻译：本发明提供用于半导体晶片的高温（至少约500-800℃）处理的系统，方法和装置。本发明的系统，方法和装置允许多个工艺步骤在相同的腔室中原位进行，以减少总处理时间，并确保对高纵横比器件的高质量处理。在同一个室内执行多个工艺步骤也可以增加工艺参数的控制并减少设备损坏。特别地，本发明可以提供用于形成具有厚度均匀性，良好间隙填充能力，高密度，低湿度和其它所需特性的介电膜的高温沉积，加热和有效清洁。

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