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    • 91. 发明申请
    • Semiconductor device
    • 半导体器件
    • US20050024900A1
    • 2005-02-03
    • US10895083
    • 2004-07-21
    • Yoshiaki Hachiya
    • Yoshiaki Hachiya
    • G05F1/66G05F3/26H02M1/00H02M3/155H02M3/156H02M3/335
    • H02M3/156H02M1/32H02M2001/0032Y02B70/16
    • The present invention relates to a semiconductor device that is employed in a switching power supply for which a higher output is required, prevents noise from the coil, transformer, and so forth and implements a high efficiency power supply. By connecting a current mirror circuit including a p-type MOSFET, an overcurrent detection level tuning circuit, an overcurrent detection circuit, and an intermittent oscillation control circuit to an FB terminal peripheral circuit that is a feedback signal input terminal, PWM control capable of varying the IDRAIN peak value is implemented for the transition from a heavy load state to a light load state and intermittent oscillation control is implemented for the transition between a light load state to a loadless state, such that noise from the coil, transformer, and the like is suppressed and higher efficiency is realized.
    • 本发明涉及一种用于需要更高输出的开关电源,防止来自线圈,变压器等的噪声并实现高效率电源的半导体器件。 通过将包括p型MOSFET,过电流检测电平调谐电路,过电流检测电路和间歇振荡控制电路的电流镜像电路连接到作为反馈信号输入端子的FB端子外围电路,能够变化的PWM控制 实现了从重负载状态到轻负载状态的过渡的IDRAIN峰值,并且实现了轻负载状态到无负载状态之间的转换的间歇振荡控制,使得来自线圈,变压器等的噪声 被抑制并且实现更高的效率。
    • 92. 发明申请
    • Switching power supply
    • 开关电源
    • US20040264221A1
    • 2004-12-30
    • US10754604
    • 2004-01-12
    • Matsushita Elec. Ind. Co. Ltd.
    • Yoshihiro Mori
    • H02J001/02
    • H02M3/33523H02M1/32H02M2001/009
    • The present invention provides a switching power supply which has an overcurrent protection characteristic with a small number of components. The switching power supply includes a regulator from a drain and an auxiliary winding VCC, a drain current detection circuit for detecting a current applied to a switching element, an oscillation circuit for outputting a clock signal of a constant frequency, a feedback signal control circuit for detecting a control signal from the secondary side and controlling current applied to the switching element, a clamping circuit for controlling the maximum value of current applied to the switching element, and a clamp voltage variable circuit for changing a clamp voltage of the clamping circuit and an oscillation frequency of the oscillation circuit according to a voltage of VCC.
    • 本发明提供一种具有少数部件的过电流保护特性的开关电源。 开关电源包括来自漏极和辅助绕组VCC的调节器,用于检测施加到开关元件的电流的漏极电流检测电路,用于输出恒定频率的时钟信号的振荡电路,反馈信号控制电路 检测来自次级侧的控制信号并控制施加到开关元件的电流,用于控制施加到开关元件的电流的最大值的钳位电路和用于改变钳位电路的钳位电压的钳位电压可变电路和 振荡电路的振荡频率根据VCC的电压。
    • 93. 发明申请
    • Nonvolatile semiconductor memory device
    • 非易失性半导体存储器件
    • US20040245567A1
    • 2004-12-09
    • US10860112
    • 2004-06-04
    • Matsushita Elec. Ind. Co. Ltd.
    • Toshiaki Kawasaki
    • G11C011/34
    • G11C16/0416G11C2216/10H01L27/115H01L27/11558Y10S257/909
    • In a memory cell, the substrate contact region of an NMOS transistor and the well contact region of a PMOS transistor are arranged perpendicularly to a floating gate. In a cell array, the memory cell and another memory cell arranged axisymmetrically with respect to the memory cell are alternately arranged in the column direction to constitute a sub array, and the sub arrays arranged in the column direction are arranged in parallel or axisymmetically in the row direction. With this arrangement, the substrate contact region, the well contact region, and the diffusion region of the PMOS transistor can be shared between the adjacent memory cells, thereby reducing the area of the cell array.
    • 在存储单元中,NMOS晶体管的衬底接触区域和PMOS晶体管的阱接触区域垂直于浮置栅极布置。 在单元阵列中,存储单元和相对于存储单元轴对称布置的另一个存储单元在列方向上交替布置以构成子阵列,并且沿列方向排列的子阵列平行或轴对称地布置在 行方向。 利用这种布置,可以在相邻的存储单元之间共享衬底接触区域,阱接触区域和PMOS晶体管的扩散区域,从而减小单元阵列的面积。
    • 94. 发明申请
    • Manufacturing method of semiconductor device
    • 半导体器件的制造方法
    • US20040229389A1
    • 2004-11-18
    • US10843364
    • 2004-05-12
    • Matsushita Elec. Ind. Co. Ltd.
    • Masahiro Joei
    • G01R031/26H01L021/4763H01L021/66
    • H01L22/20H01L21/76802H01L21/76805H01L21/76814H01L21/76838H01L23/5226H01L2924/0002Y10S438/906H01L2924/00
    • A manufacturing method of a semiconductor device, including the steps of forming a metal wire on a circuit formed on a semiconductor substrate, forming an insulating film on the metal wire, forming a via hole in the insulating film so as to expose a surface of the metal wire by selectively etching the insulating film by a plasma dry etching method, measuring a first level difference between the surface of the metal wire and the surface of the insulating film by a non-contact measurement method, removing the metal oxide film on the surface of the metal film by cleaning the surface of the metal film, measuring a second level difference between the surface of the metal film and the surface of the insulating film by a non-contact measurement method, and determining an amount of oxidation of the metal wire from a difference between the first and the second level differences.
    • 一种半导体器件的制造方法,包括以下步骤:在形成在半导体衬底上的电路上形成金属线,在所述金属线上形成绝缘膜,在所述绝缘膜中形成通孔,以暴露所述绝缘膜的表面 金属线通过等离子体干法蚀刻法选择性地蚀刻绝缘膜,通过非接触测量方法测量金属线表面与绝缘膜表面之间的第一级差,去除表面上的金属氧化物膜 通过清洁金属膜的表面,通过非接触测量方法测量金属膜的表面和绝缘膜的表面之间的第二水平差,并且确定金属线的氧化量 从第一和第二水平差异的差异。