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    • 95. 发明授权
      US06436805B1 Local interconnect structures and methods for making the same 有权
    • Local interconnect structures and methods for making the same
    • 局部互连结构和制作方法
    • US06436805B1
    • 2002-08-20
    • US09388832
    • 1999-09-01
    • Jigish D. Trivedi
    • Jigish D. Trivedi
    • H01L2144
    • H01L21/32053 , H01L21/28518 , H01L21/76895 , H01L2924/0002 , H01L2924/00
    • The present invention provides methods of forming local interconnect structures for integrated circuits. A representative embodiment includes depositing a silicon source layer over a substrate having at least one topographical structure thereon. The silicon source layer preferably comprising silicon rich silicon nitride, silicon oxynitride or other silicon source having sufficient free silicon to form a silicide but not so much free silicon as to result in formation of stringers (i.e., does not comprise polysilicon). The silicon source layer is preferably deposited over an active area in the substrate and at least a portion of the topographical structure. A silicide forming material, e.g., a refractory metal, is deposited directly on selected regions of the silicon source layer and over the topographical structure. A silicide layer is made from the silicide forming material and the silicon source layer preferably by annealing the structure. The silicide layer defines a portion of the local interconnect structure, unreacted silicide forming material is removed and an interlevel dielectric is formed over the silicide layer. The interlevel dielectric includes a recess defined substantially over the active area and an electrically conductive material is deposited in the recess. The present invention also provides local interconnect structures.
    • 本发明提供了形成用于集成电路的局部互连结构的方法。 代表性的实施例包括在其上具有至少一个形貌结构的衬底上沉积硅源层。 硅源层优选地包括富硅的氮化硅，氮氧化硅或具有足够的游离硅的其它硅源，以形成硅化物而不是太多的游离硅，从而导致桁条的形成（即不包括多晶硅）。 硅源层优选沉积在衬底中的有源区域和形貌结构的至少一部分上。 形成硅化物的材料，例如难熔金属，直接沉积在硅源层的选定区域上并且在形貌结构上。 硅化物层由硅化物形成材料和硅源层制成，优选通过退火该结构。 硅化物层限定局部互连结构的一部分，去除未反应的硅化物形成材料，并在硅化物层之上形成层间电介质。 层间电介质包括基本上在有源区域上限定的凹部，并且导电材料沉积在凹部中。 本发明还提供局部互连结构。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Espacenet 法律信息 同族专利 专利引用
    • 96. 发明授权
      US06417546B2 P-type FET in a CMOS with nitrogen atoms in the gate dielectric 有权
    • P-type FET in a CMOS with nitrogen atoms in the gate dielectric
    • 在栅极电介质中具有氮原子的CMOS中的P型FET
    • US06417546B2
    • 2002-07-09
    • US09444024
    • 1999-11-19
    • Jigish D. Trivedi , Zhongze Wang , Rongsheng Yang
    • Jigish D. Trivedi , Zhongze Wang , Rongsheng Yang
    • H01L2994
    • H01L21/823462
    • In accordance with an aspect of the invention, a semiconductor processing method of forming field effect transistors includes forming a first gate dielectric layer over a first area configured for forming p-type field effect transistors and a second area configured for forming n-type field effect transistors, both areas on a semiconductor substrate. The first gate dielectric layer is silicon dioxide having a nitrogen concentration of 0.1% molar to 10.0% molar within the first gate dielectric layer, the nitrogen atoms being higher in concentration within the first gate dielectric layer at one elevational location as compared to another elevational location. The first gate dielectric layer is removed from over the second area while leaving the first gate dielectric layer over the first area, and a second gate dielectric layer is formed over the second area. The second gate dielectric layer is a silicon dioxide material substantially void of nitrogen atoms. Transistor gates are formed over the first and second gate dielectric layers, and then p-type source/drain regions are formed proximate the transistor gates in the first area and n-type source/drain regions are formed proximate the transistor gates in the second area.
    • 根据本发明的一个方面，形成场效应晶体管的半导体处理方法包括在被配置用于形成p型场效应晶体管的第一区域上形成第一栅极电介质层，以及第二区域，用于形成n型场效应 晶体管，半导体衬底上的两个区域。 第一栅极电介质层是在第一栅极介电层内的氮浓度为0.1％摩尔至10.0％摩尔浓度的二氧化硅，与另一个高度位置相比，在一个高度位置处的第一栅极介电层内的氮原子的浓度较高 。 第一栅介质层在第二区域上被移除，同时在第一区域上留下第一栅极介质层，并且在第二区域上形成第二栅极电介质层。 第二栅极电介质层是基本上不含氮原子的二氧化硅材料。 在第一和第二栅极电介质层上形成晶体管栅极，然后在第一区域中的晶体管栅极附近形成p型源极/漏极区域，并且在第二区域中的晶体管栅极附近形成n型源极/漏极区域 。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Espacenet 法律信息 同族专利 专利引用
    • 98. 发明授权
      US6120915A Methods of forming refractory metal silicide components and methods of restricting silicon surface migration of a silicon structure 失效
    • Methods of forming refractory metal silicide components and methods of restricting silicon surface migration of a silicon structure
    • 形成难熔金属硅化物组分的方法和限制硅结构硅表面迁移的方法
    • US6120915A
    • 2000-09-19
    • US20591
    • 1998-02-04
    • Yongjun Hu , Jigish D. Trivedi
    • Yongjun Hu , Jigish D. Trivedi
    • H01L21/768 , H01L23/498 , B32B15/00 , B32B15/04 , B32B18/00
    • H01L21/76895 , H01L21/76889 , H01L23/49866 , H01L2924/0002 , Y10S257/915 , Y10T428/12576
    • Methods of forming refractory metal silicide components are described. In accordance with one implementation, a refractory metal layer is formed over a substrate. A silicon-containing structure is formed over the refractory metal layer and a silicon diffusion restricting layer is formed over at least some of the silicon-containing structure. The substrate is subsequently annealed at a temperature which is sufficient to cause a reaction between at least some of the refractory metal layer and at least some of the silicon-containing structure to at least partially form a refractory metal silicide component. In accordance with one aspect of the invention, a silicon diffusion restricting layer is formed over or within the refractory metal layer in a step which is common with the forming of the silicon diffusion restricting layer over the silicon-containing structure. In a preferred implementation, the silicon diffusion restricting layers are formed by exposing the substrate to nitridizing conditions which are sufficient to form a nitride-containing layer over the silicon-containing structure, and a refractory metal nitride compound within the refractory metal layer. A preferred refractory metal is titanium.
    • 描述形成难熔金属硅化物组分的方法。 根据一个实施方案，在衬底上形成难熔金属层。 在难熔金属层之上形成含硅结构，并且在至少一些含硅结构上形成硅扩散限制层。 随后在足以使至少一些难熔金属层与至少一些含硅结构之间的反应至少部分地形成难熔金属硅化物组分的温度下进行退火。 根据本发明的一个方面，在与含硅结构上形成硅扩散限制层相同的步骤中，在难熔金属层之上或之内形成硅扩散限制层。 在优选的实施方案中，硅扩散限制层是通过将衬底暴露于足以在含硅结构上形成含氮化物层的氮化条件和难熔金属层内的难熔金属氮化物化合物而形成的。 优选的难熔金属是钛。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Global Dossier Espacenet 法律信息 同族专利 专利引用
    • 100. 发明授权
      US5981380A Method of forming a local interconnect including selectively etched conductive layers and recess formation 失效
    • Method of forming a local interconnect including selectively etched conductive layers and recess formation
    • US5981380A
    • 1999-11-09
    • US27537
    • 1998-02-23
    • Jigish D. Trivedi , Ravi Iyer
    • Jigish D. Trivedi , Ravi Iyer
    • H01L21/60 , H01L21/768 , H01L23/485 , H01L23/532 , H01L29/45 , H01L21/70
    • H01L21/76865 , H01L21/76843 , H01L21/76846 , H01L21/7685 , H01L21/76855 , H01L21/76856 , H01L21/76864 , H01L21/76895 , H01L21/76897 , H01L23/485 , H01L23/53223 , H01L23/53238 , H01L23/53257 , H01L29/456 , H01L2221/1078 , H01L2924/0002
    • A method of forming a local interconnect structure is provided. A first barrier layer comprising sputtered titanium nitride is formed over a topographical structure situated upon a field oxide region within a semiconductor substrate. A hard mask layer comprising tungsten silicide is formed over the first barrier layer. A photoresist layer is then formed over the hard mask layer. The hard mask layer is selectively removed from above an adjacent gate stack on the semiconductor substrate using an etch that is selective to the first barrier layer. The first barrier layer is selectively removed using an etch that is selective to the hard mask layer. A silica layer is formed over the hard mask layer. A recess is formed in the silica layer that is aligned with an active area within the semiconductor substrate. The recess is filled with an electrically conductive material. A second method of forming a local interconnect structure is provided comprising forming a first barrier layer comprising sputter titanium nitride over a semiconductor substrate having a topographical structure situated upon a field oxide region within the semiconductor substrate. A first electrically conductive layer comprising tungsten is then formed over the first barrier layer using chemical vapor deposition. The first electrically conductive layer provides good step coverage over the topographical structure. A second barrier layer comprising sputtered titanium nitride is formed over the first electrically conductive layer. A hard mask layer comprising polysilicon or silica is then formed over the second barrier layer. The hard mask is selectively removed from above an adjacent gate stack on the semiconductor substrate with an etch that is selective to the second barrier layer. The second barrier layer, the first conductive layer, and the first barrier layer are selectively removed, thereby exposing the underlying gate stack on the semiconductor substrate using a chemical etch selective to the hard mask layer. A silica layer is then formed with a recess therein that is filled with an electrically conductive material to form an active area contact through the local interconnect structure.
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Global Dossier Espacenet 法律信息 同族专利 专利引用
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