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91. 发明授权

US09502288B2 Method of forming an interconnect structure 有权
标题翻译：形成互连结构的方法
公开(公告)号：US09502288B2
公开(公告)日：2016-11-22
申请号：US13420728
申请日：2012-03-15
申请人： Son Van Nguyen , Alfred Grill , Thomas J. Haigh, Jr. , Hosadurga Shobha , Tuan A. Vo
发明人： Son Van Nguyen , Alfred Grill , Thomas J. Haigh, Jr. , Hosadurga Shobha , Tuan A. Vo
IPC分类号： H05K3/02 , H05K3/10 , H01L21/768
CPC分类号： H01L21/76849 , H01L21/76846 , H01L21/76864 , H01L21/76867
摘要： An interconnect structure is provided that has improved electromigration resistance as well as methods of forming such an interconnect structure. The interconnect structure includes a composite M-MOx cap located at least on the upper surface of the Cu-containing material within the at least one opening. The composite M-MOx cap includes an upper region that is composed of the metal having a higher affinity for oxygen than copper and copper oxide and a lower region that is composed of a non-stoichiometric oxide of said metal.
摘要翻译：提供了具有改进的电迁移阻力的互连结构以及形成这种互连结构的方法。互连结构包括至少位于至少一个开口内的含Cu材料的上表面上的复合M-MOx帽。复合M-MOx帽包括由与氧和氧化铜相比具有比氧更高的亲和性的金属构成的上部区域和由所述金属的非化学计量氧化物构成的下部区域。

92. 发明申请

US20130333923A1 MODULATED COMPOSITIONAL AND STRESS CONTROLLED MULTILAYER ULTRATHIN CONFORMAL SiNx DIELECTRICS USED IN NANO DEVICE FABRICATION 审中-公开
标题翻译：在纳米器件制造中使用的调制组合和应力控制的多层超大规模SiNx电介质
公开(公告)号：US20130333923A1
公开(公告)日：2013-12-19
申请号：US13495545
申请日：2012-06-13
申请人： Mihaela Balseanu , Stephan A. Cohen , Alfred Grill , Thomas J. Haigh, JR. , Son V. Nguyen , Mei-Yee Shek , Hosadurga Shobha , Li-Qun Xia
发明人： Mihaela Balseanu , Stephan A. Cohen , Alfred Grill , Thomas J. Haigh, JR. , Son V. Nguyen , Mei-Yee Shek , Hosadurga Shobha , Li-Qun Xia
IPC分类号： C23C16/34 , H05K1/02
CPC分类号： C23C16/345 , C23C16/56 , H01L21/4803 , H05K1/0298 , Y10T428/24975
摘要： A layer of silicon nitride having a thickness from 0.5 nanometers to 2.4 nanometers is deposited on a substrate. A plasma nitridation process is carried out on the layer. These steps are repeated for a plurality of additional layers of silicon nitride, until a predetermined thickness is attained. Such steps can be used to provide a multilayer silicon nitride dielectric formed on a substrate having an upper surface of dielectric material with Cu and other conductors embedded within, and a plurality of steps. The multilayer silicon nitride dielectric has a plurality of individual layers each having a thickness from 0.5 nanometers to 2.4 nanometers, and the multilayer silicon nitride dielectric conformally covers the steps of the substrate with a conformality of at least seventy percent. A multilayer silicon nitride dielectric, and a multilevel back end of line interconnect wiring structure using same, are also provided.
摘要翻译：将厚度为0.5纳米至2.4纳米的氮化硅层沉积在基底上。在层上进行等离子体氮化处理。对于多个附加氮化硅层重复这些步骤，直到达到预定厚度。可以使用这样的步骤来提供形成在具有介电材料的上表面的衬底上的多层氮化硅电介质，其中Cu和其它导体嵌入其中并且多个步骤。多层氮化硅电介质具有各自具有0.5纳米至2.4纳米厚度的多个单独层，多层氮化硅电介质保形地覆盖具有至少百分之七十的保形度的基底的步骤。还提供了多层氮化硅电介质，以及使用该多层氮化硅电介质的多层后端的布线结构。

93. 发明申请

US20130043514A1 MULTIPHASE ULTRA LOW K DIELECTRIC MATERIAL 有权
标题翻译：多相超低K电介质材料
公开(公告)号：US20130043514A1
公开(公告)日：2013-02-21
申请号：US13214157
申请日：2011-08-19
申请人： Alfred Grill , Thomas J. Haigh, JR. , Kelly Malone , Son V. Nguyen , Vishnubhai V. Patel , Hosadurga Shobha
发明人： Alfred Grill , Thomas J. Haigh, JR. , Kelly Malone , Son V. Nguyen , Vishnubhai V. Patel , Hosadurga Shobha
IPC分类号： H01L29/78 , H01L23/48 , C08J9/26 , H01L21/31
CPC分类号： H01L29/511 , C08J9/26 , C08J2201/042 , C08J2383/04 , H01L21/02126 , H01L21/02203 , H01L21/02216 , H01L21/02274 , H01L21/02304 , H01L21/02337 , H01L21/02348 , H01L21/02351 , H01L21/76801 , H01L21/76825 , H01L21/76829 , H01L21/76832 , H01L23/5329 , H01L29/515 , H01L2924/0002 , H01L2924/00
摘要： A multiphase ultra low k dielectric process incorporating an organo-silicon precursor including an organic porogen, high frequency radio frequency power just above plasma initiation in a PECVD chamber and energy post treatment. A porous SiCOH dielectric material having a k less than 2.7 and a modulus of elasticity greater than 7 GPa. A graded carbon adhesion layer of SiO2 and porous SiCOH.
摘要翻译：包含有机硅前驱体的多相超低k电介质工艺，其包括有机致孔剂，在PECVD腔室中等离子体起始之前的高频射频功率和能量后处理。具有k小于2.7且弹性模量大于7GPa的多孔SiCOH电介质材料。 SiO2和多孔SiCOH的分级碳粘附层。

94. 发明授权

US08362596B2 Engineered interconnect dielectric caps having compressive stress and interconnect structures containing same 有权
标题翻译：具有压缩应力的工程互连电介质盖和包含它们的互连结构
公开(公告)号：US08362596B2
公开(公告)日：2013-01-29
申请号：US12502690
申请日：2009-07-14
申请人： Stephan A. Cohen , Alfred Grill , Thomas J. Haigh, Jr. , Xiao H. Liu , Son V. Nguyen , Thomas M. Shaw , Hosadurga Shobha
发明人： Stephan A. Cohen , Alfred Grill , Thomas J. Haigh, Jr. , Xiao H. Liu , Son V. Nguyen , Thomas M. Shaw , Hosadurga Shobha
IPC分类号： H01L23/58 , H01L21/302
CPC分类号： H01L23/5329 , H01L21/76825 , H01L21/76832 , H01L21/76834 , H01L23/53223 , H01L23/53238 , H01L23/53266 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A dielectric capping layer having a dielectric constant of less than 4.2 is provided that exhibits a higher mechanical and electrical stability to UV and/or E-Beam radiation as compared to conventional dielectric capping layers. Also, the dielectric capping layer maintains a consistent compressive stress upon post-deposition treatments. The dielectric capping layer includes a tri-layered dielectric material in which at least one of the layers has good oxidation resistance, is resistance to conductive metal diffusion, and exhibits high mechanical stability under at least UV curing. The low k dielectric capping layer also includes nitrogen content layers that contain electron donors and double bond electrons. The low k dielectric capping layer also exhibits a high compressive stress and high modulus and is stable under post-deposition curing treatments, which leads to less film and device cracking and improved device reliability.
摘要翻译：提供具有小于4.2的介电常数的介电覆盖层，与传统的介电覆盖层相比，其对UV和/或E-Beam辐射具有更高的机械和电学稳定性。此外，介电覆盖层在沉积后处理时保持一致的压应力。电介质覆盖层包括三层介电材料，其中至少一层具有良好的抗氧化性，耐导电性金属扩散，并且在至少UV固化下表现出高机械稳定性。低k电介质封盖层还包括含有电子给体和双键电子的氮含量层。低k电介质覆盖层还具有高压缩应力和高模量，并且在后沉积固化处理中是稳定的，这导致较少的膜和器件开裂和改进的器件可靠性。

95. 发明申请

US20120329287A1 LOW k POROUS SiCOH DIELECTRIC AND INTEGRATION WITH POST FILM FORMATION TREATMENT 有权
标题翻译：低k多孔SiCOH电介质和后期成膜处理的整合
公开(公告)号：US20120329287A1
公开(公告)日：2012-12-27
申请号：US13603008
申请日：2012-09-04
申请人： Stephen M. Gates , Alfred Grill , Son Nguyen , Satyanarayana V. Nitta , Thomas M. Shaw
发明人： Stephen M. Gates , Alfred Grill , Son Nguyen , Satyanarayana V. Nitta , Thomas M. Shaw
IPC分类号： H01L21/312
CPC分类号： H01L23/5329 , C23C16/401 , C23C16/505 , C23C16/511 , C23C16/56 , H01J2237/336 , H01J2237/338 , H01J2237/3382 , H01L21/02126 , H01L21/02203 , H01L21/02205 , H01L21/02216 , H01L21/02274 , H01L21/0234 , H01L21/02345 , H01L21/02348 , H01L21/02351 , H01L21/31633 , H01L21/31695 , H01L21/76825 , H01L21/76826 , H01L21/76828 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A porous SiCOH dielectric film in which the stress change caused by increased tetrahedral strain is minimized by post treatment in unsaturated Hydrocarbon ambient. The p-SiCOH dielectric film has more —(CHx) and less Si—O—H and Si—H bonding moieties. Moreover, a stable pSiOCH dielectric film is provided in which the amount of Si—OH (silanol) and Si—H groups at least within the pores has been reduced by about 90% or less by the post treatment. A p-SiCOH dielectric film is produced that is flexible since the pores include stabilized crosslinking —(CHx)— chains wherein x is 1, 2 or 3 therein. The dielectric film is produced utilizing an annealing step subsequent deposition that includes a gaseous ambient that includes at least one C—C double bond and/or at least one C—C triple bond.
摘要翻译：通过在不饱和烃环境中后处理，使四面体应变增加引起的应力变化最小化的多孔SiCOH介电膜。 p-SiCOH电介质膜具有更多的（（CH x））和更少的Si-O-H和Si-H键合部分。此外，提供稳定的pSiOCH电介质膜，其中至少在孔内的Si-OH（硅烷醇）和Si-H基团的量通过后处理减少约90％以下。由于气孔包括其中x为1,2或3的稳定的交联 - （CH x） - 链，因此制备柔性的p-SiCOH介电膜。介电膜是利用包括至少一个C-C双键和/或至少一个C-C三键的气态环境的退火步骤进行的。

96. 发明申请

US20120329269A1 METHODS TO MITIGATE PLASMA DAMAGE IN ORGANOSILICATE DIELECTRICS 有权
标题翻译：减轻有机电介质中等离子体损伤的方法
公开(公告)号：US20120329269A1
公开(公告)日：2012-12-27
申请号：US13602119
申请日：2012-09-01
申请人： John C. Arnold , Griselda Bonilla , William J. Cote , Geraud Dubois , Daniel C. Edelstein , Alfred Grill , Elbert Huang , Robert D. Miller , Satya V. Nitta , Sampath Purushothaman , E. Todd Ryan , Muthumanickam Sankarapandian , Terry A. Spooner , Willi Volksen
发明人： John C. Arnold , Griselda Bonilla , William J. Cote , Geraud Dubois , Daniel C. Edelstein , Alfred Grill , Elbert Huang , Robert D. Miller , Satya V. Nitta , Sampath Purushothaman , E. Todd Ryan , Muthumanickam Sankarapandian , Terry A. Spooner , Willi Volksen
IPC分类号： H01L21/768
CPC分类号： H01L21/76808 , H01L21/02063 , H01L21/02126 , H01L21/02203 , H01L21/02274 , H01L21/02304 , H01L21/02348 , H01L21/02362 , H01L21/31138 , H01L21/31144 , H01L21/31633 , H01L21/76814 , H01L21/76826 , H01L21/76831
摘要： Methods of minimizing or eliminating plasma damage to low k and ultra low k organosilicate intermetal dielectric layers are provided. The reduction of the plasma damage is effected by interrupting the etch and strip process flow at a suitable point to add an inventive treatment which protects the intermetal dielectric layer from plasma damage during the plasma strip process. Reduction or elimination of a plasma damaged region in this manner also enables reduction of the line bias between a line pattern in a photoresist and a metal line formed therefrom, and changes in the line width of the line trench due to a wet clean after the reactive ion etch employed for formation of the line trench and a via cavity. The reduced line bias has a beneficial effect on electrical yields of a metal interconnect structure.
摘要翻译：提供了最小化或消除对低k和超低k有机硅酸盐金属间电介质层的等离子体损伤的方法。等离子体损伤的降低通过在合适的点处中断蚀刻和剥离工艺流程来实现，以增加本发明的处理，其保护金属间电介质层免受等离子体条带处理期间的等离子体损伤。以这种方式减少或消除等离子体损伤区域还能够减少光致抗蚀剂中的线图案和由其形成的金属线之间的线偏压，并且由于在反应性之后的湿清洁而改变线沟槽的线宽用于形成线沟槽和通孔腔的离子蚀刻。减少的线偏压对金属互连结构的电产量具有有益的影响。

97. 发明授权

US08212337B2 Advanced low k cap film formation process for nano electronic devices 有权
标题翻译：用于纳米电子器件的高级低k帽成膜工艺
公开(公告)号：US08212337B2
公开(公告)日：2012-07-03
申请号：US11972175
申请日：2008-01-10
申请人： Alfred Grill , Joshua L. Herman , Son Nguyen , E. Todd Ryan , Hosadurga K. Shobha
发明人： Alfred Grill , Joshua L. Herman , Son Nguyen , E. Todd Ryan , Hosadurga K. Shobha
IPC分类号： H01L23/58 , H01L23/48
CPC分类号： H01L21/02263 , C23C16/325 , C23C16/56 , H01L21/76825 , H01L21/76826 , H01L21/76829 , H01L21/76832 , H01L21/76834
摘要： A carbon-rich silicon carbide-like dielectric film having a carbon concentration of greater than, or equal to, about 30 atomic % C and a dielectric constant of less than, or equal to, about 4.5 is provided. In some embodiments, the dielectric film may optionally include nitrogen. When nitrogen is present, the carbon-rich silicon carbide-like dielectric film has a concentration nitrogen that is less than, or equal, to about 5 atomic % nitrogen. The carbon-rich silicon carbide-like dielectric film can be used as a dielectric cap layer in an interconnect structure. The inventive dielectric film is highly robust to UV curing and remains compressively stressed after UV curing. Moreover, the inventive dielectric film has good oxidation resistance and prevents metal diffusion into an interconnect dielectric layer. The present invention also provides an interconnect structure including the inventive dielectric film as a dielectric cap. A method of fabricating the inventive dielectric film is also provided.
摘要翻译：提供碳浓度大于或等于约30原子％C并且介电常数小于或等于约4.5的富含碳的碳化硅状电介质膜。在一些实施例中，电介质膜可以任选地包括氮。当存在氮时，富含碳的碳化硅状电介质膜具有小于或等于约5原子％氮的浓度氮。富碳碳化硅状电介质膜可以用作互连结构中的电介质盖层。本发明的电介质膜对UV固化具有很强的鲁棒性，并且在UV固化后保持压缩应力。此外，本发明的电介质膜具有良好的抗氧化性，并且防止金属扩散到互连电介质层中。本发明还提供一种互连结构，其包括作为电介质盖的本发明的电介质膜。还提供了制造本发明的电介质膜的方法。

98. 发明授权

US08101150B2 Control of carbon nanotube diameter using CVD or PECVD growth 有权
标题翻译：使用CVD或PECVD生长控制碳纳米管直径
公开(公告)号：US08101150B2
公开(公告)日：2012-01-24
申请号：US12483757
申请日：2009-06-12
申请人： Alfred Grill , Deborah Neumayer , Dinkar Singh
发明人： Alfred Grill , Deborah Neumayer , Dinkar Singh
IPC分类号： D01C5/00
CPC分类号： B82Y30/00 , B82Y10/00 , B82Y40/00 , C01B32/162 , C01B2202/36 , C30B25/00 , C30B25/105 , C30B29/605 , H01J9/025 , H01J2201/30469 , Y10S977/843
摘要： The diameter of carbon nanotubes grown by chemical vapor deposition is controlled independent of the catalyst size by controlling the residence time of reactive gases in the reactor.
摘要翻译：通过化学气相沉积生长的碳纳米管的直径通过控制反应性气体在反应器中的停留时间独立于催化剂的尺寸来控制。

99. 发明申请

US20090278114A1 CONTROL OF CARBON NANOTUBE DIAMETER USING CVD OR PECVD GROWTH 有权
标题翻译：使用CVD或PECVD增长控制碳纳米管直径
公开(公告)号：US20090278114A1
公开(公告)日：2009-11-12
申请号：US12483757
申请日：2009-06-12
申请人： Alfred Grill , Deborah Neumayer , Dinkar Singh
发明人： Alfred Grill , Deborah Neumayer , Dinkar Singh
IPC分类号： H01L29/66 , C23C16/00 , C23C16/50 , C01B31/02 , C40B40/18 , H01L21/335 , B82B1/00 , B82B3/00
CPC分类号： B82Y30/00 , B82Y10/00 , B82Y40/00 , C01B32/162 , C01B2202/36 , C30B25/00 , C30B25/105 , C30B29/605 , H01J9/025 , H01J2201/30469 , Y10S977/843
摘要： The diameter of carbon nanotubes grown by chemical vapor deposition is controlled independent of the catalyst size by controlling the residence time of reactive gases in the reactor.
摘要翻译：通过化学气相沉积生长的碳纳米管的直径通过控制反应性气体在反应器中的停留时间独立于催化剂尺寸来控制。

100. 发明申请

US20090181178A1 SiCOH DIELECTRIC MATERIAL WITH IMPROVED TOUGHNESS AND IMPROVED Si-C BONDING, SEMICONDUCTOR DEVICE CONTAINING THE SAME, AND METHOD TO MAKE THE SAME 有权
标题翻译：具有改进的韧性和改进的Si-C键合的SiCOH电介质材料，含有它们的半导体器件及其制造方法
公开(公告)号：US20090181178A1
公开(公告)日：2009-07-16
申请号：US12355316
申请日：2009-01-16
申请人： Daniel C. Edelstein , Stephen M. Gates , Alfred Grill , Michael Lane , Qinghuang Lin , Robert D. Miller , Deborah A. Neumayer , Son Van Nguyen
发明人： Daniel C. Edelstein , Stephen M. Gates , Alfred Grill , Michael Lane , Qinghuang Lin , Robert D. Miller , Deborah A. Neumayer , Son Van Nguyen
IPC分类号： C23C16/22
CPC分类号： H01L31/103 , Y10T428/31663
摘要： A low-k dielectric material with increased cohesive strength for use in electronic structures including interconnect and sensing structures is provided that includes atoms of Si, C, O, and H in which a fraction of the C atoms are bonded as Si—CH3 functional groups, and another fraction of the C atoms are bonded as Si—R—Si, wherein R is phenyl, —[CH2]n— where n is greater than or equal to 1, HC═CH, C═CH2, C═C or a [S]n linkage, where n is a defined above.
摘要翻译：提供了一种用于包括互连和感测结构的电子结构中具有增强的内聚强度的低k电介质材料，其包括其中一部分C原子键合为Si-CH 3官能团的Si，C，O和H的原子，另一部分C原子键合为Si-R-Si，其中R为苯基， - [CH2] n-，其中n大于或等于1，HC-CH，C-CH2，CC或[ S] n连接，其中n是上面定义的。

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